clash-lib 0.99.3 → 1.0.0

raw patch · 210 files changed

+23219/−14064 lines, 210 filesdep +ansi-terminaldep +binarydep +exceptionsdep −fgldep −unbound-genericsdep ~basedep ~clash-preludedep ~ghcnew-uploaderPVP ok

version bump matches the API change (PVP)

Dependencies added: ansi-terminal, binary, exceptions, hint, interpolate, temporary, text-show, vector-binary-instances

Dependencies removed: fgl, unbound-generics

Dependency ranges changed: base, clash-prelude, ghc, hashable, lens, template-haskell, text, transformers, trifecta

API changes (from Hackage documentation)

Files

• CHANGELOG.md +126/−0
• LICENSE +1/−1
• README.md +6/−6
• clash-lib.cabal +61/−24
• prims/common/Clash_Annotations_BitRepresentation_Deriving.json +9/−0
• prims/common/Clash_Class_BitPack.json +12/−4
• prims/common/Clash_Explicit_Signal.json +8/−6
• prims/common/Clash_GHC_GHC2Core.json +5/−1
• prims/common/Clash_Intel_ClockGen.json +17/−0
• prims/common/Clash_Magic.json +16/−0
• prims/common/Clash_Promoted_Nat.json +9/−0
• prims/common/Clash_Promoted_Nat_Unsafe.json +3/−1
• prims/common/Clash_Promoted_Symbol.json +6/−2
• prims/common/Clash_Signal_BiSignal.json +30/−0
• prims/common/Clash_Signal_Bundle.json +1/−0
• prims/common/Clash_Signal_Internal.json +37/−0
• prims/common/Clash_Sized_Internal_BitVector.json +43/−0
• prims/common/Clash_Sized_Internal_Index.json +8/−0
• prims/common/Clash_Sized_Internal_Signed.json +22/−0
• prims/common/Clash_Sized_Internal_Unsigned.json +22/−0
• prims/common/Clash_Sized_RTree.json +7/−0
• prims/common/Clash_Sized_Vector.json +47/−0
• prims/common/Clash_Transformations.json +11/−1
• prims/common/Clash_XException.json +15/−3
• prims/common/Control_Exception_Base.json +56/−8
• prims/common/Debug_Trace.json +3/−1
• prims/common/GHC_Base.json +14/−0
• prims/common/GHC_CString.json +7/−2
• prims/common/GHC_Classes.json +29/−0
• prims/common/GHC_Err.json +9/−3
• prims/common/GHC_IO_Exception.json +3/−1
• prims/common/GHC_Integer_Type.json +50/−0
• prims/common/GHC_Magic.json +9/−0
• prims/common/GHC_Natural.json +32/−8
• prims/common/GHC_Prim.json +54/−4
• prims/common/GHC_Real.json +9/−3
• prims/common/GHC_TypeNats.json +3/−1
• prims/common/GHC_Typelits.json +3/−1
• prims/common/GHC_Types.json +31/−0
• prims/common/Unsafe_Coerce.json +3/−1
• prims/commonverilog/Clash_Class_Exp.json +29/−0
• prims/commonverilog/Clash_Intel_DDR.json +49/−0
• prims/commonverilog/Clash_Promoted_Nat.json +36/−33
• prims/commonverilog/Clash_Signal_Internal.json +27/−0
• prims/commonverilog/Clash_Sized_Internal_BitVector.json +281/−55
• prims/commonverilog/Clash_Sized_Internal_Index.json +45/−26
• prims/commonverilog/Clash_Sized_Internal_Signed.json +172/−7
• prims/commonverilog/Clash_Sized_Internal_Unsigned.json +155/−7
• prims/commonverilog/Clash_Sized_Vector.json +17/−0
• prims/commonverilog/Clash_Transformations.json +8/−0
• prims/commonverilog/Clash_Xilinx_ClockGen.json +47/−0
• prims/commonverilog/GHC_Base.json +8/−0
• prims/commonverilog/GHC_Classes.json +36/−0
• prims/commonverilog/GHC_Int.json +30/−0
• prims/commonverilog/GHC_Integer_Logarithms.json +11/−9
• prims/commonverilog/GHC_Integer_Type.json +189/−0
• prims/commonverilog/GHC_Natural.json +31/−0
• prims/commonverilog/GHC_Prim.json +398/−0
• prims/commonverilog/GHC_Word.json +30/−0
• prims/systemverilog/Clash_Explicit_BlockRam.json +122/−26
• prims/systemverilog/Clash_Explicit_BlockRam_File.json +31/−27
• prims/systemverilog/Clash_Explicit_DDR.json +60/−95
• prims/systemverilog/Clash_Explicit_RAM.json +19/−20
• prims/systemverilog/Clash_Explicit_ROM.json +18/−14
• prims/systemverilog/Clash_Explicit_ROM_File.json +17/−14
• prims/systemverilog/Clash_Explicit_Testbench.json +45/−12
• prims/systemverilog/Clash_Intel_ClockGen.json +0/−37
• prims/systemverilog/Clash_Intel_DDR.json +33/−74
• prims/systemverilog/Clash_Prelude_ROM.json +3/−2
• prims/systemverilog/Clash_Prelude_ROM_File.json +2/−1
• prims/systemverilog/Clash_Signal_BiSignal.json +34/−0
• prims/systemverilog/Clash_Signal_Internal.json +83/−145
• prims/systemverilog/Clash_Sized_Internal_BitVector.json +18/−180
• prims/systemverilog/Clash_Sized_Internal_Signed.json +14/−168
• prims/systemverilog/Clash_Sized_Internal_Unsigned.json +10/−140
• prims/systemverilog/Clash_Sized_RTree.json +9/−3
• prims/systemverilog/Clash_Sized_Vector.json +88/−59
• prims/systemverilog/Clash_Xilinx_ClockGen.json +0/−39
• prims/systemverilog/Clash_Xilinx_DDR.json +35/−35
• prims/systemverilog/GHC_Base.json +5/−20
• prims/systemverilog/GHC_Classes.json +4/−56
• prims/systemverilog/GHC_Int.json +0/−25
• prims/systemverilog/GHC_Integer_Type.json +4/−152
• prims/systemverilog/GHC_Prim.json +242/−597
• prims/systemverilog/GHC_Types.json +0/−24
• prims/systemverilog/GHC_Word.json +0/−25
• prims/verilog/Clash_Explicit_BlockRam.json +129/−28
• prims/verilog/Clash_Explicit_BlockRam_File.json +29/−25
• prims/verilog/Clash_Explicit_DDR.json +57/−100
• prims/verilog/Clash_Explicit_RAM.json +19/−21
• prims/verilog/Clash_Explicit_ROM.json +21/−17
• prims/verilog/Clash_Explicit_ROM_File.json +17/−14
• prims/verilog/Clash_Explicit_Testbench.json +45/−12
• prims/verilog/Clash_Intel_ClockGen.json +0/−37
• prims/verilog/Clash_Intel_DDR.json +33/−74
• prims/verilog/Clash_Prelude_ROM.json +3/−2
• prims/verilog/Clash_Prelude_ROM_File.json +2/−1
• prims/verilog/Clash_Signal_BiSignal.json +34/−0
• prims/verilog/Clash_Signal_Internal.json +83/−150
• prims/verilog/Clash_Sized_Internal_BitVector.json +17/−180
• prims/verilog/Clash_Sized_Internal_Signed.json +14/−168
• prims/verilog/Clash_Sized_Internal_Unsigned.json +10/−140
• prims/verilog/Clash_Sized_RTree.json +9/−3
• prims/verilog/Clash_Sized_Vector.json +101/−79
• prims/verilog/Clash_Xilinx_ClockGen.json +0/−39
• prims/verilog/Clash_Xilinx_DDR.json +37/−37
• prims/verilog/GHC_Base.json +5/−20
• prims/verilog/GHC_Classes.json +4/−56
• prims/verilog/GHC_Int.json +0/−25
• prims/verilog/GHC_Integer_Type.json +4/−152
• prims/verilog/GHC_Prim.json +257/−612
• prims/verilog/GHC_Types.json +0/−24
• prims/verilog/GHC_Word.json +0/−25
• prims/vhdl/Clash_Class_Exp.json +29/−0
• prims/vhdl/Clash_Explicit_BlockRam.json +160/−57
• prims/vhdl/Clash_Explicit_BlockRam_File.json +48/−48
• prims/vhdl/Clash_Explicit_DDR.json +86/−212
• prims/vhdl/Clash_Explicit_RAM.json +29/−38
• prims/vhdl/Clash_Explicit_ROM.json +20/−37
• prims/vhdl/Clash_Explicit_ROM_File.json +20/−20
• prims/vhdl/Clash_Explicit_Testbench.json +123/−22
• prims/vhdl/Clash_Intel_ClockGen.json +0/−59
• prims/vhdl/Clash_Intel_DDR.json +33/−37
• prims/vhdl/Clash_Prelude_ROM.json +3/−2
• prims/vhdl/Clash_Prelude_ROM_File.json +2/−1
• prims/vhdl/Clash_Promoted_Nat.json +9/−9
• prims/vhdl/Clash_Signal_BiSignal.json +34/−0
• prims/vhdl/Clash_Signal_Internal.json +147/−176
• prims/vhdl/Clash_Sized_Internal_BitVector.json +181/−111
• prims/vhdl/Clash_Sized_Internal_Index.json +45/−26
• prims/vhdl/Clash_Sized_Internal_Signed.json +73/−50
• prims/vhdl/Clash_Sized_Internal_Unsigned.json +65/−47
• prims/vhdl/Clash_Sized_RTree.json +9/−3
• prims/vhdl/Clash_Sized_Vector.json +86/−42
• prims/vhdl/Clash_Transformations.json +8/−0
• prims/vhdl/Clash_Xilinx_ClockGen.json +24/−16
• prims/vhdl/Clash_Xilinx_DDR.json +39/−45
• prims/vhdl/GHC_Base.json +7/−15
• prims/vhdl/GHC_Classes.json +14/−31
• prims/vhdl/GHC_Int.json +12/−4
• prims/vhdl/GHC_Integer_Logarithms.json +2/−1
• prims/vhdl/GHC_Integer_Type.json +108/−62
• prims/vhdl/GHC_Natural.json +32/−0
• prims/vhdl/GHC_Prim.json +154/−126
• prims/vhdl/GHC_Types.json +0/−24
• prims/vhdl/GHC_Word.json +12/−4
• src/Clash/Annotations/BitRepresentation/ClashLib.hs +55/−0
• src/Clash/Annotations/TopEntity/Extra.hs +22/−0
• src/Clash/Backend.hs +64/−60
• src/Clash/Backend/SystemVerilog.hs +544/−272
• src/Clash/Backend/VHDL.hs +2005/−1206
• src/Clash/Backend/Verilog.hs +439/−149
• src/Clash/Core/DataCon.hs +29/−76
• src/Clash/Core/Evaluator.hs +335/−184
• src/Clash/Core/FreeVars.hs +312/−13
• src/Clash/Core/Literal.hs +3/−10
• src/Clash/Core/Name.hs +35/−54
• src/Clash/Core/Pretty.hs +333/−234
• src/Clash/Core/Subst.hs +784/−46
• src/Clash/Core/Subst.hs-boot +21/−0
• src/Clash/Core/Term.hs +173/−33
• src/Clash/Core/Term.hs-boot +1/−0
• src/Clash/Core/TyCon.hs +34/−57
• src/Clash/Core/TyCon.hs-boot +1/−2
• src/Clash/Core/Type.hs +228/−180
• src/Clash/Core/Type.hs-boot +2/−8
• src/Clash/Core/TysPrim.hs +55/−62
• src/Clash/Core/Util.hs +715/−230
• src/Clash/Core/Var.hs +126/−19
• src/Clash/Core/VarEnv.hs +556/−0
• src/Clash/Driver.hs +370/−124
• src/Clash/Driver/Types.hs +77/−24
• src/Clash/Netlist.hs +507/−296
• src/Clash/Netlist.hs-boot +24/−8
• src/Clash/Netlist/BlackBox.hs +577/−283
• src/Clash/Netlist/BlackBox/Parser.hs +39/−19
• src/Clash/Netlist/BlackBox/Types.hs +166/−51
• src/Clash/Netlist/BlackBox/Util.hs +648/−269
• src/Clash/Netlist/Id.hs +39/−39
• src/Clash/Netlist/Types.hs +285/−91
• src/Clash/Netlist/Types.hs-boot +22/−0
• src/Clash/Netlist/Util.hs +1834/−1121
• src/Clash/Normalize.hs +185/−210
• src/Clash/Normalize/DEC.hs +164/−121
• src/Clash/Normalize/PrimitiveReductions.hs +650/−304
• src/Clash/Normalize/Strategy.hs +56/−38
• src/Clash/Normalize/Strategy.hs-boot +6/−0
• src/Clash/Normalize/Transformations.hs +2289/−1743
• src/Clash/Normalize/Types.hs +26/−14
• src/Clash/Normalize/Util.hs +213/−73
• src/Clash/Pretty.hs +20/−0
• src/Clash/Primitives/GHC/Int.hs +61/−0
• src/Clash/Primitives/GHC/Literal.hs +77/−0
• src/Clash/Primitives/GHC/Word.hs +49/−0
• src/Clash/Primitives/Intel/ClockGen.hs +119/−0
• src/Clash/Primitives/Sized/Vector.hs +92/−0
• src/Clash/Primitives/Types.hs +221/−38
• src/Clash/Primitives/Util.hs +171/−19
• src/Clash/Rewrite/Combinators.hs +79/−81
• src/Clash/Rewrite/Types.hs +106/−66
• src/Clash/Rewrite/Util.hs +500/−379
• src/Clash/Unique.hs +397/−0
• src/Clash/Util.hs +201/−41
• src/Clash/Util/Graph.hs +127/−0
• src/ClashDebug.h +5/−0
• src/Data/Aeson/Extra.hs +35/−17
• src/Data/Text/Prettyprint/Doc/Extra.hs +13/−3
• src/GHC/BasicTypes/Extra.hs +2/−0
• src/GHC/SrcLoc/Extra.hs +19/−7
• src/Unbound/Generics/LocallyNameless/Extra.hs +0/−115

@@ -1,5 +1,131 @@ # Changelog for the [`clash-lib`](http://hackage.haskell.org/package/clash-lib) package +## 1.0.0 *September 3rd 2019*+* 10x - 50x faster compile times+* New features:+  * API changes: check the migration guide at the end of `Clash.Tutorial`+  * All memory elements now have an (implicit) enable line; "Gated" clocks have+    been removed as the clock wasn't actually gated, but implemented as an+    enable line.+  * Circuit domains are now configurable in:+    * (old) The clock period+    * (new) Clock edge on which memory elements latch their inputs+      (rising edge or falling edge)+    * (new) Whether the reset port of a memory element is level sensitive+      (asynchronous reset) or edge sensitive (synchronous reset)+    * (new) Whether the reset port of a memory element is active-high or+      active-low (negated reset)+    * (new) Whether memory element power on in a configurable/defined state+      (common on FPGAs) or in an undefined state (ASICs)++    * See the [blog post](https://clash-lang.org/blog/0005-synthesis-domain/) on this new feature+  * Data types can now be given custom bit-representations: http://hackage.haskell.org/package/clash-prelude/docs/Clash-Annotations-BitRepresentation.html+  * Annotate expressions with attributes that persist in the generated HDL,+    e.g. synthesis directives: http://hackage.haskell.org/package/clash-prelude/docs/Clash-Annotations-SynthesisAttributes.html+  * Control (System)Verilog module instance, and VHDL entity instantiation names+    in generated code: http://hackage.haskell.org/package/clash-prelude/docs/Clash-Magic.html+  * Much improved infrastructure for handling of unknown values: defined spine,+    but unknown leafs: http://hackage.haskell.org/package/clash-prelude/docs/Clash-XException.html#t:NFDataX+  * Experimental: Multiple hidden clocks. Can be enabled by compiling+    `clash-prelude` with `-fmultiple-hidden`+  * Experimental: Limited GADT support (pattern matching on vectors, or custom+    GADTs as longs as their usage can be statically removed; no support of+    recursive GADTs)+  * Experimental: Use regular Haskell functions to generate HDL black boxes for+    primitives (in an addition to existing string templates for HDL black boxes)+    See for example: http://hackage.haskell.org/package/clash-lib/docs/Clash-Primitives-Intel-ClockGen.html++* Fixes issues:+  * [#316](https://github.com/clash-lang/clash-prelude/issues/316)+  * [#319](https://github.com/clash-lang/clash-prelude/issues/319)+  * [#323](https://github.com/clash-lang/clash-prelude/issues/323)+  * [#324](https://github.com/clash-lang/clash-prelude/issues/324)+  * [#329](https://github.com/clash-lang/clash-prelude/issues/329)+  * [#331](https://github.com/clash-lang/clash-prelude/issues/331)+  * [#332](https://github.com/clash-lang/clash-prelude/issues/332)+  * [#335](https://github.com/clash-lang/clash-prelude/issues/335)+  * [#348](https://github.com/clash-lang/clash-prelude/issues/348)+  * [#349](https://github.com/clash-lang/clash-prelude/issues/349)+  * [#350](https://github.com/clash-lang/clash-prelude/issues/350)+  * [#351](https://github.com/clash-lang/clash-prelude/issues/351)+  * [#352](https://github.com/clash-lang/clash-prelude/issues/352)+  * [#353](https://github.com/clash-lang/clash-prelude/issues/353)+  * [#358](https://github.com/clash-lang/clash-prelude/issues/358)+  * [#359](https://github.com/clash-lang/clash-prelude/issues/359)+  * [#363](https://github.com/clash-lang/clash-prelude/issues/363)+  * [#364](https://github.com/clash-lang/clash-prelude/issues/364)+  * [#365](https://github.com/clash-lang/clash-prelude/issues/365)+  * [#371](https://github.com/clash-lang/clash-prelude/issues/371)+  * [#372](https://github.com/clash-lang/clash-prelude/issues/372)+  * [#373](https://github.com/clash-lang/clash-prelude/issues/373)+  * [#378](https://github.com/clash-lang/clash-prelude/issues/378)+  * [#380](https://github.com/clash-lang/clash-prelude/issues/380)+  * [#381](https://github.com/clash-lang/clash-prelude/issues/381)+  * [#382](https://github.com/clash-lang/clash-prelude/issues/382)+  * [#383](https://github.com/clash-lang/clash-prelude/issues/383)+  * [#387](https://github.com/clash-lang/clash-prelude/issues/387)+  * [#393](https://github.com/clash-lang/clash-prelude/issues/393)+  * [#396](https://github.com/clash-lang/clash-prelude/issues/396)+  * [#398](https://github.com/clash-lang/clash-prelude/issues/398)+  * [#399](https://github.com/clash-lang/clash-prelude/issues/399)+  * [#401](https://github.com/clash-lang/clash-prelude/issues/401)+  * [#403](https://github.com/clash-lang/clash-prelude/issues/403)+  * [#407](https://github.com/clash-lang/clash-prelude/issues/407)+  * [#412](https://github.com/clash-lang/clash-prelude/issues/412)+  * [#413](https://github.com/clash-lang/clash-prelude/issues/413)+  * [#420](https://github.com/clash-lang/clash-prelude/issues/420)+  * [#422](https://github.com/clash-lang/clash-prelude/issues/422)+  * [#423](https://github.com/clash-lang/clash-prelude/issues/423)+  * [#424](https://github.com/clash-lang/clash-prelude/issues/424)+  * [#438](https://github.com/clash-lang/clash-prelude/issues/438)+  * [#450](https://github.com/clash-lang/clash-prelude/issues/450)+  * [#452](https://github.com/clash-lang/clash-prelude/issues/452)+  * [#455](https://github.com/clash-lang/clash-prelude/issues/455)+  * [#460](https://github.com/clash-lang/clash-prelude/issues/460)+  * [#461](https://github.com/clash-lang/clash-prelude/issues/461)+  * [#463](https://github.com/clash-lang/clash-prelude/issues/463)+  * [#468](https://github.com/clash-lang/clash-prelude/issues/468)+  * [#475](https://github.com/clash-lang/clash-prelude/issues/475)+  * [#476](https://github.com/clash-lang/clash-prelude/issues/476)+  * [#500](https://github.com/clash-lang/clash-prelude/issues/500)+  * [#507](https://github.com/clash-lang/clash-prelude/issues/507)+  * [#512](https://github.com/clash-lang/clash-prelude/issues/512)+  * [#516](https://github.com/clash-lang/clash-prelude/issues/516)+  * [#517](https://github.com/clash-lang/clash-prelude/issues/517)+  * [#526](https://github.com/clash-lang/clash-prelude/issues/526)+  * [#556](https://github.com/clash-lang/clash-prelude/issues/556)+  * [#560](https://github.com/clash-lang/clash-prelude/issues/560)+  * [#566](https://github.com/clash-lang/clash-prelude/issues/566)+  * [#567](https://github.com/clash-lang/clash-prelude/issues/567)+  * [#569](https://github.com/clash-lang/clash-prelude/issues/569)+  * [#573](https://github.com/clash-lang/clash-prelude/issues/573)+  * [#575](https://github.com/clash-lang/clash-prelude/issues/575)+  * [#581](https://github.com/clash-lang/clash-prelude/issues/581)+  * [#582](https://github.com/clash-lang/clash-prelude/issues/582)+  * [#586](https://github.com/clash-lang/clash-prelude/issues/586)+  * [#588](https://github.com/clash-lang/clash-prelude/issues/588)+  * [#591](https://github.com/clash-lang/clash-prelude/issues/591)+  * [#596](https://github.com/clash-lang/clash-prelude/issues/596)+  * [#601](https://github.com/clash-lang/clash-prelude/issues/601)+  * [#607](https://github.com/clash-lang/clash-prelude/issues/607)+  * [#629](https://github.com/clash-lang/clash-prelude/issues/629)+  * [#637](https://github.com/clash-lang/clash-prelude/issues/637)+  * [#644](https://github.com/clash-lang/clash-prelude/issues/644)+  * [#647](https://github.com/clash-lang/clash-prelude/issues/647)+  * [#661](https://github.com/clash-lang/clash-prelude/issues/661)+  * [#668](https://github.com/clash-lang/clash-prelude/issues/668)+  * [#677](https://github.com/clash-lang/clash-prelude/issues/677)+  * [#678](https://github.com/clash-lang/clash-prelude/issues/678)+  * [#682](https://github.com/clash-lang/clash-prelude/issues/682)+  * [#691](https://github.com/clash-lang/clash-prelude/issues/691)+  * [#703](https://github.com/clash-lang/clash-prelude/issues/703)+  * [#713](https://github.com/clash-lang/clash-prelude/issues/713)+  * [#715](https://github.com/clash-lang/clash-prelude/issues/715)+  * [#727](https://github.com/clash-lang/clash-prelude/issues/727)+  * [#730](https://github.com/clash-lang/clash-prelude/issues/730)+  * [#736](https://github.com/clash-lang/clash-prelude/issues/736)+  * [#738](https://github.com/clash-lang/clash-prelude/issues/738)+ ## 0.99.3 *July 28th 2018* * Fixes bugs:   * Evaluator recognizes `Bit` literals [#329](https://github.com/clash-lang/clash-compiler/issues/329)

@@ -1,6 +1,6 @@ Copyright (c) 2012-2016, University of Twente,               2016-2017, Myrtle Software Ltd,-              2017     , QBayLogic, Google Inc.+              2017-2019, QBayLogic B.V., Google Inc. All rights reserved.  Redistribution and use in source and binary forms, with or without

@@ -1,14 +1,14 @@-# `clash-lib` - CλaSH compiler, as a library+# `clash-lib` - Clash compiler, as a library    * See the LICENSE file for license and copyright details -# CλaSH - A functional hardware description language-CλaSH (pronounced ‘clash’) is a functional hardware description language that-borrows both its syntax and semantics from the functional programming language-Haskell. The CλaSH compiler transforms these high-level descriptions to+# Clash - A functional hardware description language+Clash is a functional hardware description language that borrows both+its syntax and semantics from the functional programming language+Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog. -Features of CλaSH:+Features of Clash:    * Strongly typed (like VHDL), yet with a very high degree of type inference,     enabling both safe and fast prototying using consise descriptions (like

@@ -1,13 +1,13 @@ Name:                 clash-lib-Version:              0.99.3+Version:              1.0.0 Synopsis:             CAES Language for Synchronous Hardware - As a Library Description:-  CλaSH (pronounced ‘clash’) is a functional hardware description language that-  borrows both its syntax and semantics from the functional programming language-  Haskell. The CλaSH compiler transforms these high-level descriptions to-  low-level synthesizable VHDL, Verilog, or SystemVerilog.+  Clash is a functional hardware description language that borrows both its+  syntax and semantics from the functional programming language Haskell. The+  Clash compiler transforms these high-level descriptions to low-level+  synthesizable VHDL, Verilog, or SystemVerilog.   .-  Features of CλaSH:+  Features of Clash:   .   * Strongly typed, but with a very high degree of type inference, enabling both     safe and fast prototyping using concise descriptions.@@ -46,17 +46,18 @@ bug-reports:          http://github.com/clash-lang/clash-compiler/issues License:              BSD2 License-file:         LICENSE-Author:               Christiaan Baaij-Maintainer:           Christiaan Baaij <christiaan.baaij@gmail.com>+Author:               The Clash Authors+Maintainer:           QBayLogic B.V. <devops@qbaylogic.com> Copyright:            Copyright © 2012-2016, University of Twente,-                                  2016-2017, Myrtle Software Ltd,-                                  2017     , QBayLogic, Google Inc.+                                  2016-2019, Myrtle Software Ltd,+                                  2017-2019, QBayLogic B.V., Google Inc. Category:             Hardware Build-type:           Simple  Extra-source-files:   README.md,   CHANGELOG.md+  src/ClashDebug.h  Data-files:   prims/common/*.json,@@ -71,6 +72,18 @@   type: git   location: https://github.com/clash-lang/clash-compiler.git +flag debug+   description:+     Build a debug compiler+   default: False+   manual: True++flag history+   description:+     Emit rewrite history to disk+   default: False+   manual: True+ Library   HS-Source-Dirs:     src @@ -97,39 +110,47 @@                       ViewPatterns    Build-depends:      aeson                   >= 0.6.2.0  && < 1.5,+                      ansi-terminal           >= 0.8.0.0  && < 0.10,                       ansi-wl-pprint          >= 0.6.8.2  && < 1.0,                       attoparsec              >= 0.10.4.0 && < 0.14,-                      base                    >= 4.8      && < 5,+                      base                    >= 4.10     && < 5,+                      binary                  >= 0.8.5    && < 0.11,                       bytestring              >= 0.10.0.2 && < 0.11,-                      clash-prelude           >= 0.11.1   && < 1.0,+                      clash-prelude           >= 1.0      && < 1.1,                       concurrent-supply       >= 0.1.7    && < 0.2,                       containers              >= 0.5.0.0  && < 0.7,                       data-binary-ieee754     >= 0.4.4    && < 0.6,                       deepseq                 >= 1.3.0.2  && < 1.5,                       directory               >= 1.2.0.1  && < 1.4,                       errors                  >= 1.4.2    && < 2.4,-                      fgl                     >= 5.4.2.4  && < 5.7,+                      exceptions              >= 0.8.3    && < 0.11.0,                       filepath                >= 1.3.0.1  && < 1.5,-                      ghc                     >= 8.0.2    && < 8.6,-                      hashable                >= 1.2.1.0  && < 1.3,+                      ghc                     >= 8.2.0    && < 8.9,+                      hashable                >= 1.2.1.0  && < 1.4,+                      hint                    >= 0.7      && < 0.10,                       integer-gmp             >= 1.0      && < 1.1,-                      lens                    >= 3.9.2    && < 4.18,+                      interpolate             >= 0.2.0    && < 1.0,+                      lens                    >= 3.9.2    && < 4.19,                       mtl                     >= 2.1.2    && < 2.3,                       parsers                 >= 0.12.8   && < 1.0,                       prettyprinter           >= 1.2.0.1  && < 2.0,                       primitive               >= 0.5.0.1  && < 1.0,                       process                 >= 1.1.0.2  && < 1.7,                       reducers                >= 3.12.2   && < 4.0,-                      template-haskell        >= 2.8.0.0  && < 2.14,-                      text                    >= 0.11.3.1 && < 1.3,+                      template-haskell        >= 2.8.0.0  && < 2.16,+                      temporary               >= 1.2.1    && < 1.4,+                      text                    >= 1.2.2    && < 1.3,+                      text-show               >= 3.7      && < 3.9,                       time                    >= 1.4.0.1  && < 1.10,-                      transformers            >= 0.3.0.0  && < 0.6,-                      trifecta                >= 1.7.1.1  && < 2.0,+                      transformers            >= 0.5.2.0  && < 0.6,+                      trifecta                >= 1.7.1.1  && < 2.1,                       vector                  >= 0.11     && < 1.0,-                      unbound-generics        >= 0.1      && < 0.4,+                      vector-binary-instances >= 0.2.3.5  && < 0.3,                       unordered-containers    >= 0.2.3.3  && < 0.3 -  Exposed-modules:    Clash.Backend+  Exposed-modules:    Clash.Annotations.BitRepresentation.ClashLib++                      Clash.Backend                       Clash.Backend.SystemVerilog                       Clash.Backend.Verilog                       Clash.Backend.VHDL@@ -147,6 +168,7 @@                       Clash.Core.TysPrim                       Clash.Core.Util                       Clash.Core.Var+                      Clash.Core.VarEnv                        Clash.Driver                       Clash.Driver.Types@@ -171,18 +193,33 @@                       Clash.Primitives.Types                       Clash.Primitives.Util +                      Clash.Primitives.GHC.Int+                      Clash.Primitives.GHC.Literal+                      Clash.Primitives.GHC.Word+                      Clash.Primitives.Intel.ClockGen+                      Clash.Primitives.Sized.Vector+                       Clash.Rewrite.Combinators                       Clash.Rewrite.Types                       Clash.Rewrite.Util +                      Clash.Unique                       Clash.Util+                      Clash.Util.Graph+                      Clash.Pretty +                      Data.Text.Prettyprint.Doc.Extra+   Other-Modules:      Clash.Annotations.TopEntity.Extra                       Data.Aeson.Extra                       Data.Semigroup.Monad.Extra-                      Data.Text.Prettyprint.Doc.Extra                       Data.Vector.Primitive.Extra                       GHC.BasicTypes.Extra                       GHC.SrcLoc.Extra                       Paths_clash_lib-                      Unbound.Generics.LocallyNameless.Extra++  if flag(debug)+    cpp-options:      -DDEBUG++  if flag(history)+    cpp-options:      -DHISTORY

@@ -0,0 +1,9 @@+[ { "BlackBox" :+    { "name"      : "Clash.Annotations.BitRepresentation.Deriving.dontApplyInHDL"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "dontApplyInHDL :: (a -> b) -> a -> b"+    , "template"  : "~ARG[1]"+    }+  }+]

@@ -1,29 +1,37 @@ [ { "BlackBox" :     { "name"      : "Clash.Class.BitPack.packFloat#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type" : "packFloat# :: Float -> BitVector 32"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Class.BitPack.unpackFloat#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type" : "packFloat# :: BitVector 32 -> Float"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Class.BitPack.packDouble#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type" : "packFloat# :: Double -> BitVector 64"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Class.BitPack.unpackDouble#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type" : "packFloat# :: BitVector 64 -> Double"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } ]

@@ -1,12 +1,14 @@ [ { "BlackBox" :-    { "name"      : "Clash.Explicit.Signal.unsafeSynchronizer"+    { "name"      : "Clash.Explicit.Signal.veryUnsafeSynchronizer"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type" :-"unsafeSynchronizer-  :: Clock dom1 g1-  -> Clock dom2 g2-  -> Signal dom1 a -- ARG[2]+"veryUnsafeSynchronizer+  :: Int                         -- ARG[0]+  -> Int                         -- ARG[1]+  -> Signal dom1 a               -- ARG[2]   -> Signal dom2 a"-    , "templateE" : "~ARG[2]"+    , "template"  : "~ARG[2]"     }   } ]

@@ -1,15 +1,19 @@ [ { "BlackBox" :     { "name"      : "EmptyCase"-    , "templateE" : "~ERRORO"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "template"  : "~ERRORO"     }   } , { "Primitive" :     { "name"     : "_CO_"+    , "workInfo"  : "Constant"     , "primType" : "Constructor"     }   } , { "Primitive" :     { "name"     : "_TY_"+    , "workInfo"  : "Constant"     , "primType" : "Constructor"     }   }

@@ -0,0 +1,17 @@+[ { "BlackBox" :+    { "name"      : "Clash.Intel.ClockGen.altpll"+    , "workInfo"  : "Always"+    , "kind"      : "Declaration"+    , "format"    : "Haskell"+    , "templateFunction" : "Clash.Primitives.Intel.ClockGen.altpllTF"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Intel.ClockGen.alteraPll"+    , "workInfo"  : "Always"+    , "kind"      : "Declaration"+    , "format"    : "Haskell"+    , "templateFunction" : "Clash.Primitives.Intel.ClockGen.alteraPllTF"+    }+  }+]

@@ -0,0 +1,16 @@+[ { "Primitive" :+    { "name"      : "Clash.Magic.prefixName"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Magic.suffixName"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Magic.setName"+    , "primType"  : "Function"+    }+  }+]

@@ -0,0 +1,9 @@+[ { "BlackBox" :+    { "name"      : "Clash.Promoted.Nat.powSNat"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "Clash.Promoted.Nat.powSNat :: SNat a -> SNat b -> SNat (a^b)"+    , "template"  : "~LIT[0] ** ~LIT[1]"+    }+  }+]

@@ -1,7 +1,9 @@ [ { "BlackBox" :     { "name"      : "Clash.Promoted.Nat.Unsafe.unsafeSNat"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "Clash.Promoted.Nat.Unsafe.unsafeSNat :: Integer -> SNat k"-    , "templateE" : "~LIT[0]"+    , "template"  : "~LIT[0]"     }   } ]

@@ -1,13 +1,17 @@ [ { "BlackBox" :     { "name"      : "Clash.Promoted.Symbol.SSymbol"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "SSymbol :: KnownNat n => Proxy n -> SSymbol n"-    , "templateE" : "~LIT[0]"+    , "template"  : "~LIT[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Promoted.Symbol.symbolToString"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "symbolToString :: SSymbol n -> String"-    , "templateE" : "~LIT[0]"+    , "template"  : "~LIT[0]"     }   } ]

@@ -0,0 +1,30 @@+[ { "BlackBox" :+    { "name" : "Clash.Signal.BiSignal.veryUnsafeToBiSignalIn"+    , "workInfo" : "Never"+    , "kind" : "Declaration"+    , "type" :+"veryUnsafeToBiSignalIn+  :: ( HasCallStack                -- ARG[0]+     , KnownNat n                  -- ARG[1]+     , Given (SBiSignalDefault ds) -- ARG[2]+     )+  => BiSignalOut ds d n            -- ARG[3]+  -> BiSignalIn ds d n"+    , "template" : "~DEVNULL[~ARG[3]]"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Signal.BiSignal.mergeBiSignalOuts"+    , "workInfo" : "Never"+    , "kind" : "Expression"+    , "type" :+"mergeBiSignalOuts+  :: ( HasCallStack                         -- ARG[0]+     , KnownNat n                           -- ARG[1]+     )+  => Vec n (BiSignalOut defaultState dom m) -- ARG[2]+  -> BiSignalOut defaultState dom m"+    , "template" : "~DEVNULL[~ARG[2]]"+    }+  }+]

@@ -1,5 +1,6 @@ [ { "Primitive" :     { "name"      : "Clash.Signal.Bundle.vecBundle#"+    , "workInfo"  : "Never"     , "primType"  : "Function"     }   }

@@ -0,0 +1,37 @@+[ { "Primitive" :+    { "name"      : "Clash.Signal.Internal.signal#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Signal.Internal.mapSignal#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Signal.Internal.appSignal#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Signal.Internal.foldr#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Signal.Internal.traverse#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Signal.Internal.joinSignal#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+]

@@ -0,0 +1,43 @@+[ { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.undefined#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "undefined# :: forall n . KnownNat n => BitVector n"+    , "template"  : "~ERRORO"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Sized.Internal.BitVector.checkUnpackUndef"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.lt##"+    , "kind"      : "Expression"+    , "type"      : "lt## :: Bit -> Bit -> Bool"+    , "template"  : "~ARG[0] < ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.ge##"+    , "kind"      : "Expression"+    , "type"      : "ge## :: Bit -> Bit -> Bool"+    , "template"  : "~ARG[0] >= ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.gt##"+    , "kind"      : "Expression"+    , "type"      : "gt## :: Bit -> Bit -> Bool"+    , "template"  : "~ARG[0] > ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.le##"+    , "kind"      : "Expression"+    , "type"      : "le## :: Bit -> Bit -> Bool"+    , "template"  : "~ARG[0] <= ~ARG[1]"+    }+  }+]

@@ -0,0 +1,8 @@+[ { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Index.quot#"+    , "kind"      : "Expression"+    , "type"      : "quot# :: Index n -> Index n -> Index n"+    , "template"  : "~ARG[0] / ~ARG[1]"+    }+  }+]

@@ -0,0 +1,22 @@+[ { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.+#"+    , "kind"      : "Expression"+    , "type"      : "(+#) :: KnownNat n => Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[1] + ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.-#"+    , "kind"      : "Expression"+    , "type"      : "(-#) :: KnownNat n => Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[1] - ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.quot#"+    , "kind"      : "Expression"+    , "type"      : "quot# :: Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[0] / ~ARG[1]"+    }+  }+]

@@ -0,0 +1,22 @@+[ { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.+#"+    , "kind"      : "Expression"+    , "type"      : "(+#) :: KnownNat n => Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[1] + ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.-#"+    , "kind"      : "Expression"+    , "type"      : "(-#) :: KnownNat n => Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[1] - ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.quot#"+    , "kind"      : "Expression"+    , "type"      : "quot# :: Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[0] / ~ARG[1]"+    }+  }+]

@@ -0,0 +1,7 @@+[ { "Primitive" :+    { "name"      : "Clash.Sized.RTree.tdfold"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+]

@@ -0,0 +1,47 @@+[+  {+    "BlackBox": {+      "name": "Clash.Sized.Vector.lazyV",+      "workInfo" : "Never",+      "kind": "Expression",+      "type": "lazyV :: KnownNat n => Vec n a -> Vec n a",+      "template": "~ARG[1]"+    }+  },+  {+    "BlackBox": {+      "name": "Clash.Sized.Vector.seqV",+      "workInfo" : "Never",+      "kind": "Expression",+      "type": "seqV :: KnownNat n => Vec n a -> b -> b",+      "template": "~ARG[2]"+    }+  },+  {+    "BlackBox": {+      "name": "Clash.Sized.Vector.seqVX",+      "workInfo" : "Never",+      "kind": "Expression",+      "type": "seqVX :: KnownNat n => Vec n a -> b -> b",+      "template": "~ARG[2]"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Sized.Vector.dfold"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Sized.Vector.dtfold"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :+    { "name"      : "Clash.Sized.Vector.traverse#"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+]

@@ -1,7 +1,17 @@ [ { "BlackBox" :     { "name"      : "Clash.Transformations.removedArg"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "removedArg :: a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Transformations.undefined"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "undefined :: forall a . a"+    , "template"  : "~ERRORO"     }   } ]

@@ -1,13 +1,25 @@ [ { "BlackBox" :     { "name"      : "Clash.XException.seqX"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "seqX :: a -> b -> b"-    , "templateE" : "~ARG[1]"+    , "template"  : "~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.XException.errorX"-    , "type"      : "errorX :: HasCallStack -> String -> a"-    , "templateE" : "~ERRORO"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "errorX :: HasCallStack => String -> a"+    , "template"  : "~ERRORO"     }+  }+, { "BlackBox" :+     { "name"      : "Clash.XException.deepseqX"+     , "workInfo"  : "Never"+     , "kind"      : "Expression"+     , "type"      : "deepseqX :: Undefined a => a -> b -> b"+     , "template"  : "~ARG[2]"+     }   } ]

@@ -1,25 +1,73 @@ [ { "BlackBox" :-    { "name"      : "Control.Exception.Base.patError"-    , "type"      : "patError :: Addr# -> a"-    , "templateE" : "~ERRORO"+    { "name"      : "Control.Exception.Base.recSelError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "recSelError :: Addr# -> a"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :+   { "name"      : "Control.Exception.Base.recConError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "recConError :: Addr# -> a"+    , "template"  : "~ERRORO"+    }+  }+, { "BlackBox" :     { "name"      : "Control.Exception.Base.irrefutPatError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "irrefutPatError :: Addr# -> a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :-    { "name"      : "Control.Exception.Base.recSelError"-    , "type"      : "recSelError :: Addr# -> a"-    , "templateE" : "~ERRORO"+    { "name"      : "Control.Exception.Base.runtimeError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "runtimeError :: Addr# -> a"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :+    { "name"      : "Control.Exception.Base.nonExhaustiveGuardsError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "nonExhaustiveGuardsError :: Addr# -> a"+    , "template"  : "~ERRORO"+    }+  }+, { "BlackBox" :+   { "name"      : "Control.Exception.Base.patError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "patError :: Addr# -> a"+    , "template"  : "~ERRORO"+    }+  }+, { "BlackBox" :+    { "name"      : "Control.Exception.Base.noMethodBindingError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "noMethodBindingError :: Addr# -> a"+    , "template"  : "~ERRORO"+    }+  }+, { "BlackBox" :     { "name"      : "Control.Exception.Base.absentError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "absentError :: Addr# -> a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"+    }+  }+, { "BlackBox" :+    { "name"      : "Control.Exception.Base.typeError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "typeError :: Addr# -> a"+    , "template"  : "~ERRORO"     }   } ]

@@ -1,7 +1,9 @@ [ { "BlackBox" :     { "name"      : "Debug.Trace.trace"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "trace :: String -> a -> a"-    , "templateE" : "~ARG[1]"+    , "template"  : "~ARG[1]"     }   } ]

@@ -0,0 +1,14 @@+[ { "Primitive" :+    { "name"      : "GHC.Base.$"+    , "workInfo"  : "Never"+    , "primType"  : "Function"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Base.quotInt"+    , "kind"      : "Expression"+    , "type"      : "quotInt :: Int -> Int -> Int"+    , "template"  : "~ARG[0] / ~ARG[1]"+    }+  }+]

@@ -1,15 +1,20 @@ [ { "BlackBox" :     { "name"      : "GHC.CString.unpackCString#"-    , "templateE" : "~LIT[0]"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "template"  : "~LIT[0]"     }   } , { "BlackBox" :     { "name"      : "GHC.CString.unpackFoldrCString#"-    , "templateE" : "~LIT[0]"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "template"  : "~LIT[0]"     }   } , { "Primitive" :     { "name"     : "GHC.CString.unpackCStringUtf8#"+    , "workInfo"  : "Never"     , "primType" : "Function"     }   }

@@ -0,0 +1,29 @@+[ { "BlackBox" :+    { "name"      : "GHC.Classes.gtInt"+    , "kind"      : "Expression"+    , "type"      : "gtInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] > ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.geInt"+    , "kind"      : "Expression"+    , "type"      : "geInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] >= ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.ltInt"+    , "kind"      : "Expression"+    , "type"      : "ltInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] < ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.leInt"+    , "kind"      : "Expression"+    , "type"      : "leInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] <= ~ARG[1]"+    }+  }+]

@@ -1,19 +1,25 @@ [ { "BlackBox" :     { "name"      : "GHC.Err.error"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "error :: [Char] -> a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :     { "name"      : "GHC.Err.errorWithoutStackTrace"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "errorWithoutStackTrace :: [Char] -> a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :     { "name"      : "GHC.Err.undefined"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "undefined :: a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } ]

@@ -1,12 +1,14 @@ [ { "BlackBox" :     { "name"      : "GHC.IO.Exception.assertError"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "assertError :: HasCallStack => Bool -> a -> a"     , "comment"   : "It would be nice if we could use a HDL assertion, however,                      because in HDL, case alternatives are evaluated                      concurrently, we would end up with the assertion being                      triggered, even when the result of that branch is not                      chosen in the multiplexer"-    , "templateE" : "~ARG[2]"+    , "template"  : "~ARG[2]"     }   } ]

@@ -0,0 +1,50 @@+[ { "BlackBox" :+    { "name"      : "GHC.Integer.Type.plusInteger"+    , "kind"      : "Expression"+    , "type"      : "plusInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] + ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.minusInteger"+    , "kind"      : "Expression"+    , "type"      : "minusInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] - ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.quotInteger"+    , "kind"      : "Expression"+    , "type"      : "quotInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] / ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.leInteger"+    , "kind"      : "Expression"+    , "type"      : "leInteger :: Integer -> Integer -> Bool"+    , "template"  : "~ARG[0] <= ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.gtInteger"+    , "kind"      : "Expression"+    , "type"      : "gtInteger :: Integer -> Integer -> Bool"+    , "template"  : "~ARG[0] > ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.ltInteger"+    , "kind"      : "Expression"+    , "type"      : "ltInteger :: Integer -> Integer -> Bool"+    , "template"  : "~ARG[0] < ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.geInteger"+    , "kind"      : "Expression"+    , "type"      : "geInteger :: Integer -> Integer -> Bool"+    , "template"  : "~ARG[0] >= ~ARG[1]"+    }+  }+]

@@ -1,10 +1,19 @@ [ { "Primitive" :     { "name"      : "GHC.Magic.lazy"+    , "workInfo"  : "Never"     , "primType"  : "Function"     }   } , { "Primitive" :+    { "name"      : "GHC.Magic.noinline"+    , "workInfo"  : "Never"+    , "type"      : "forall a. a -> a"+    , "primType"  : "Function"+    }+  }+, { "Primitive" :     { "name"      : "GHC.Magic.runRW#"+    , "workInfo"  : "Never"     , "primType"  : "Function"     }   }

@@ -1,12 +1,36 @@-[ { "Primitive" :-    { "name"      : "GHC.Natural.NatS#"-    , "primType"  : "Constructor"+[+  {+    "Primitive": {+      "name": "GHC.Natural.NatS#",+      "workInfo" : "Never",+      "primType": "Constructor"     }-  }-, { "BlackBox" :-    { "name"      : "GHC.Natural.underflowError"-    , "type"      : "underflowError :: a"-    , "templateE" : "~ERRORO"+  },+  {+    "BlackBox": {+      "name": "GHC.Natural.underflowError",+      "workInfo" : "Constant",+      "kind": "Expression",+      "type": "underflowError :: a",+      "template": "~ERRORO"+    }+  },+  {+    "BlackBox": {+      "name": "GHC.Natural.plusNatural",+      "kind": "Expression",+      "type": "plusNatural :: Natural -> Natural -> Natural",+      "template": "~ARG[0] + ~ARG[1]",+      "warning": "GHC.Natural.plusNatural: Naturals are dynamically sized in simulation, but fixed-length after synthesization. Use carefully."+    }+  },+  {+    "BlackBox": {+      "name": "GHC.Natural.minusNatural",+      "kind": "Expression",+      "type": "minusNatural :: Natural -> Natural -> Natural",+      "template": "~ARG[0] - ~ARG[1]",+      "warning": "GHC.Natural.minusNatural: Naturals are dynamically sized in simulation, but fixed-length after synthesization. Use carefully."     }   } ]

@@ -1,11 +1,61 @@ [ { "Primitive" :-    { "name"      : "GHC.Prim.newByteArray#"-    , "primType"  : "Function"+    { "name"     : "GHC.Prim.dataToTag#"+    , "primType" : "Function"     }   } , { "Primitive" :-    { "name"      : "GHC.Prim.realWorld#"-    , "primType"  : "Function"+    { "name"     : "GHC.Prim.tagToEnum#"+    , "primType" : "Function"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.unsafeCoerce#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "unsafeCoerce# :: a -> b"+    , "template"  : "~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.+#"+    , "kind"      : "Expression"+    , "type"      : "(+#) :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] + ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.-#"+    , "kind"      : "Expression"+    , "type"      : "(-#) :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] - ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.quotInt#"+    , "kind"      : "Expression"+    , "type"      : "quotInt# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] / ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.plusWord#"+    , "kind"      : "Expression"+    , "type"      : "plusWord# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] + ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.minusWord#"+    , "kind"      : "Expression"+    , "type"      : "minusWord# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] - ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.quotWord#"+    , "kind"      : "Expression"+    , "type"      : "quotWord# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] / ~ARG[1]"     }   } ]

@@ -1,19 +1,25 @@ [ { "BlackBox" :     { "name"      : "GHC.Real.divZeroError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "divZeroError :: a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :     { "name"      : "GHC.Real.ratioZeroDenominatorError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "ratioZeroDenominatorError :: a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } , { "BlackBox" :     { "name"      : "GHC.Real.overflowError"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "overflowError :: a"-    , "templateE" : "~ERRORO"+    , "template"  : "~ERRORO"     }   } ]

@@ -1,7 +1,9 @@ [ { "BlackBox" :     { "name"      : "GHC.TypeNats.natVal"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "natVal :: forall n proxy. KnownNat n => proxy n -> Natural"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } ]

@@ -1,7 +1,9 @@ [ { "BlackBox" :     { "name"      : "GHC.TypeLits.natVal"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "natVal :: forall n proxy. KnownNat n => proxy n -> Integer"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } ]

@@ -0,0 +1,31 @@+[ { "Primitive" :+    { "name"      : "GHC.Types.MkCoercible"+    , "workInfo"  : "Never"+    , "primType"  : "Constructor"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Types.C#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "I# :: Char# -> Char"+    , "template"  : "~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Types.I#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "I# :: Int# -> Int"+    , "template"  : "~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Types.W#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "W# :: Word# -> Word"+    , "template"  : "~ARG[0]"+    }+  }+]

@@ -1,7 +1,9 @@ [ { "BlackBox" :     { "name"      : "Unsafe.Coerce.unsafeCoerce"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "unsafeCoerce :: a -> b"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } ]

@@ -0,0 +1,29 @@+[+  {+    "BlackBox": {+      "name": "Clash.Class.Exp.expIndex#",+      "kind": "Declaration",+      "type": "expIndex# :: KnownNat m => Index m -> SNat n -> Index (m^n)",+      "template": "assign ~RESULT = ~DEVNULL[~ARG[0]]$signed(~ARG[1] ** ~LIT[2]);",+      "warning": "Exponentiation is only supported on relatively small constructs (< 32 bits). Ideally, Clash should have constant folded your expression. See https://github.com/clash-lang/clash-compiler/issues/593."+    }+  },+  {+    "BlackBox": {+      "name": "Clash.Class.Exp.expSigned#",+      "kind": "Declaration",+      "type": "expSigned# :: KnownNat m => Signed m -> SNat n -> Signed (m*n)",+      "template": "assign ~RESULT = ~DEVNULL[~ARG[0]]$signed(~ARG[1] ** ~LIT[2]);",+      "warning": "Exponentiation is only supported on relatively small constructs (< 32 bits). Ideally, Clash should have constant folded your expression. See https://github.com/clash-lang/clash-compiler/issues/593."+    }+  },+  {+    "BlackBox": {+      "name": "Clash.Class.Exp.expUnsigned#",+      "kind": "Declaration",+      "type": "expUnsigned# :: KnownNat m => Unsigned m -> SNat n -> Unsigned (m*n)",+      "template": "assign ~RESULT = ~DEVNULL[~ARG[0]]$unsigned(~ARG[1] ** ~LIT[2]);",+      "warning": "Exponentiation is only supported on relatively small constructs (< 32 bits). Ideally, Clash should have constant folded your expression. See https://github.com/clash-lang/clash-compiler/issues/593."+    }+  }+]

@@ -0,0 +1,49 @@+[ { "BlackBox" :+    { "name" : "Clash.Intel.DDR.altddioOut#"+    , "kind" : "Declaration"+    , "type" :+"altddioOut#+  :: ( HasCallStack             -- ARG[0]+     , KnownConfi~ fast domf    -- ARG[1]+     , KnownConfi~ slow doms    -- ARG[2]+     , KnownNat m )             -- ARG[3]+  => SSymbol deviceFamily       -- ARG[4]+  -> Clock slow                 -- ARG[5]+  -> Reset slow                 -- ARG[6]+  -> Enable slow                -- ARG[7]+  -> Signal slow (BitVector m)  -- ARG[8]+  -> Signal slow (BitVector m)  -- ARG[9]+  -> Signal fast (BitVector m)"+    , "libraries" : ["altera_mf"]+    , "template" :+"// altddioOut begin+altddio_out+  #(+    .extend_oe_disable (\"OFF\"),+    .intended_device_family (~LIT[4]),+    .invert_output (\"OFF\"),+    .lpm_hint (\"UNUSED\"),+    .lpm_type (\"altddio_out\"),+    .oe_reg (\"UNREGISTERED\"),+    .power_up_high (\"OFF\"),+    .width (~SIZE[~TYPO])+  )+  ~GENSYM[~COMPNAME_ALTDDIO_OUT][7] (~IF ~ISSYNC[2] ~THEN+    .sclr (~ARG[6]),+    .aclr (1'b0),~ELSE+    .aclr (~ARG[6]),+    .sclr (1'b0),~FI+    .datain_h (~ARG[8]),+    .datain_l (~ARG[9]),+    .outclock (~ARG[5]),+    .outclocken (~IF ~ISACTIVEENABLE[7] ~THEN ~ARG[7] ~ELSE 1'b1 ~FI),+    .dataout (~RESULT),+    .aset (1'b0),+    .sset (1'b0),+    .oe (1'b1),+    .oe_out ()+  );+// altddioOut end"+    }+  }+]

@@ -1,75 +1,78 @@ [ { "BlackBox" :-    { "name"      : "Clash.Promoted.Nat.powSNat"-    , "type"      : "Clash.Promoted.Nat.powSNat :: SNat a -> SNat b -> SNat (a^b)"-    , "templateE" : "~LIT[0] ** ~LIT[1]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Promoted.Nat.flogBaseSNat"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "Clash.Promoted.Nat.flogBaseSNat :: (2 <= base, 1 <= x)                                                      => SNat base -- ARG[2]                                                      -> SNat x    -- ARG[3]                                                      -> SNat (FLog base x"-    , "imports"   : ["~INCLUDENAME.inc"]-    , "include" :-      { "name" : "flogBase"-      , "extension" : "inc"-      , "content" :+    , "imports"   : ["~INCLUDENAME[0].inc"]+    , "includes" :+      [ { "name" : "flogBase"+        , "extension" : "inc"+        , "template" : "// floor of logBase-function integer ~INCLUDENAME;+function integer ~INCLUDENAME[0];   input integer base, value;   begin-    for (~INCLUDENAME = 0; value >= base; ~INCLUDENAME=~INCLUDENAME+1)+    for (~INCLUDENAME[0] = 0; value >= base; ~INCLUDENAME[0]=~INCLUDENAME[0]+1)       value = value / base;   end endfunction"-      }-    , "templateE" : "~INCLUDENAME(~LIT[2],~LIT[3])"+        }+      ]+    , "template"  : "~INCLUDENAME[0](~LIT[2],~LIT[3])"     }   } , { "BlackBox" :     { "name"      : "Clash.Promoted.Nat.clogBaseSNat"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "Clash.Promoted.Nat.clogBaseSNat :: (2 <= base, 1 <= x)                                                      => SNat base -- ARG[2]                                                      -> SNat x    -- ARG[3]                                                      -> SNat (CLog base x"-    , "imports"   : ["~INCLUDENAME.inc"]-    , "include" :-      { "name" : "clogBase"-      , "extension" : "inc"-      , "content" :+    , "imports"   : ["~INCLUDENAME[0].inc"]+    , "includes" :+      [ { "name" : "clogBase"+        , "extension" : "inc"+        , "template" : "// ceiling of logBase-function integer ~INCLUDENAME;+function integer ~INCLUDENAME[0];   input integer base, value;   begin-    for (~INCLUDENAME = 0; base ** ~INCLUDENAME < value; ~~INCLUDENAME=~INCLUDENAME+1);+    for (~INCLUDENAME[0] = 0; base ** ~INCLUDENAME[0] < value; ~~INCLUDENAME[0]=~INCLUDENAME[0]+1);   end endfunction"-      }-    , "templateE" : "~INCLUDENAME(~LIT[2],~LIT[3])"+        }+      ]+    , "template"  : "~INCLUDENAME[0](~LIT[2],~LIT[3])"     }   } , { "BlackBox" :     { "name"      : "Clash.Promoted.Nat.logBaseSNat"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "Clash.Promoted.Nat.logBaseSNat :: (FLog base x ~ CLog base x)                                                     => SNat base -- ARG[1]                                                     -> SNat x    -- ARG[2]                                                     -> SNat (Log base x)"-    , "imports"   : ["~INCLUDENAME.inc"]-    , "include" :-      { "name" : "clogBase"-      , "extension" : "inc"-      , "content" :+    , "imports"   : ["~INCLUDENAME[0].inc"]+    , "includes" :+      [ { "name" : "clogBase"+        , "extension" : "inc"+        , "template" : "// logBaseSNat begin-function integer ~INCLUDENAME;+function integer ~INCLUDENAME[0];   input integer base, value;   begin-    for (~INCLUDENAME = 0; value >= base; ~INCLUDENAME=~INCLUDENAME+1)+    for (~INCLUDENAME[0] = 0; value >= base; ~INCLUDENAME[0]=~INCLUDENAME[0]+1)       value = value / base;   end endfunction"-      }-    , "templateE" :  "~INCLUDENAME(~LIT[1],~LIT[2])"+        }+      ]+    , "template"  :  "~INCLUDENAME[0](~LIT[1],~LIT[2])"     }   } ]

@@ -0,0 +1,27 @@+[ { "BlackBox" :+    { "name"      : "Clash.Signal.Internal.unsafeFromReset"+    , "workInfo"  : "Never"+    , "kind" : "Expression"+    , "type" :+"unsafeFromReset :: Reset dom -> Signal dom Bool"+    , "template" : "~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Signal.Internal.unsafeToReset"+    , "kind" : "Expression"+    , "workInfo"  : "Never"+    , "type" :+"unsafeToReset :: Signal dom Bool -> Reset dom"+    , "template" : "~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Explicit.Testbench.tbEnableGen"+    , "workInfo" : "Always"+    , "kind" : "Declaration"+    , "type" : "tbEnableGen :: Enable dom"+    , "template" : "assign ~RESULT = 1'b1;"+    }+  }+]

@@ -1,151 +1,377 @@ [ { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.BV"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "BV :: Integer -> Integer -> BitVector n"+    , "comment"   : "THIS IS ONLY USED WHEN WW EXPOSES BITVECTOR INTERNALS"+    , "template"  : "~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN$unsigned(~VAR[i][1][0+:~SIZE[~TYPO]])~ELSE$unsigned({{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~VAR[i][1]})~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.Bit"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "Bit :: Integer -> Integer -> BitVector n"+    , "comment"   : "THIS IS ONLY USED WHEN WW EXPOSES BIT INTERNALS"+    , "template"  : "~VAR[i][1][0]"+    }+  }+, { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.high"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "high :: Bit"-    , "templateE" : "1'b1"+    , "template"  : "1'b1"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.low"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "low :: Bit"-    , "templateE" : "1'b0"+    , "template"  : "1'b0"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.pack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "pack# :: Bit -> BitVector 1"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.unpack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "unpack# :: BitVector 1 -> Bit"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.reduceAnd#"+    , "kind"      : "Expression"     , "type"      : "reduceAnd# :: KnownNat n => BitVector n -> Bit"-    , "templateE" : "& (~ARG[1])"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN& (~ARG[1])~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.reduceOr#"-    , "type"      : "reduceOr# :: BitVector n -> Bit"-    , "templateE" : "| (~ARG[0])"+    , "kind"      : "Expression"+    , "type"      : "reduceOr# :: KnownNat n => BitVector n -> Bit"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN| (~ARG[1])~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.reduceXor#"-    , "type"      : "reduceXor# :: BitVector n -> Bit"-    , "templateE" : "^ (~ARG[0])"+    , "kind"      : "Expression"+    , "type"      : "reduceXor# :: KnownNat n => BitVector n -> Bit"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN^ (~ARG[1])~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.eq##"+    , "kind"      : "Expression"     , "type"      : "eq## :: Bit -> Bit -> Bool"-    , "templateE" : "~ARG[0] == ~ARG[1]"+    , "template"  : "~ARG[0] == ~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.neq##"+    , "kind"      : "Expression"     , "type"      : "neq## :: Bit -> Bit -> Bool"-    , "templateE" : "~ARG[0] != ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.lt##"-    , "type"      : "lt## :: Bit -> Bit -> Bool"-    , "templateE" : "~ARG[0] < ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.ge##"-    , "type"      : "ge## :: Bit -> Bit -> Bool"-    , "templateE" : "~ARG[0] >= ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.gt##"-    , "type"      : "gt## :: Bit -> Bit -> Bool"-    , "templateE" : "~ARG[0] > ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.le##"-    , "type"      : "le## :: Bit -> Bit -> Bool"-    , "templateE" : "~ARG[0] <= ~ARG[1]"+    , "template"  : "~ARG[0] != ~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.fromInteger##"-    , "type"      : "fromInteger# :: Integer -> Bit"-    , "templateE" : "~VAR[i][0][0]"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "fromInteger## :: Integer -> Integer -> Bit"+    , "template"  : "~ARG[0][0] ? 1'bx : ~ARG[1][0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.and##"+    , "kind"      : "Expression"     , "type"      : "and## :: Bit -> Bit -> Bit"-    , "templateE" : "~ARG[0] & ~ARG[1]"+    , "template"  : "~ARG[0] & ~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.or##"+    , "kind"      : "Expression"     , "type"      : "or## :: Bit -> Bit -> Bit"-    , "templateE" : "~ARG[0] | ~ARG[1]"+    , "template"  : "~ARG[0] | ~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.xor##"+    , "kind"      : "Expression"     , "type"      : "xor## :: Bit -> Bit -> Bit"-    , "templateE" : "~ARG[0] ^ ~ARG[1]"+    , "template"  : "~ARG[0] ^ ~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.complement##"+    , "kind"      : "Expression"     , "type"      : "complement## :: Bit -> Bit"-    , "templateE" : "~ ~ARG[0]"+    , "template"  : "~ ~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.eq#"-    , "type"      : "eq# :: BitVector n -> BitVector n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"+    , "kind"      : "Expression"+    , "type"      : "eq# :: KnownNat n => BitVector n -> BitVector n -> Bool"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~ARG[1] == ~ARG[2]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.neq#"-    , "type"      : "neq# :: BitVector n -> BitVector n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"+    , "kind"      : "Expression"+    , "type"      : "neq# :: KnownNat n => BitVector n -> BitVector n -> Bool"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~ARG[1] != ~ARG[2]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.lt#"-    , "type"      : "lt# :: BitVector n -> BitVector n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"+    , "kind"      : "Expression"+    , "type"      : "lt# :: KnownNat n => BitVector n -> BitVector n -> Bool"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~ARG[1] < ~ARG[2]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.ge#"-    , "type"      : "ge# :: BitVector n -> BitVector n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"+    , "kind"      : "Expression"+    , "type"      : "ge# :: KnownNat n => BitVector n -> BitVector n -> Bool"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~ARG[1] >= ~ARG[2]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.gt#"-    , "type"      : "gt# :: BitVector n -> BitVector n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"+    , "kind"      : "Expression"+    , "type"      : "gt# :: KnownNat n => BitVector n -> BitVector n -> Bool"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~ARG[1] > ~ARG[2]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.le#"-    , "type"      : "le# :: BitVector n -> BitVector n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"+    , "kind"      : "Expression"+    , "type"      : "le# :: KnownNat n => BitVector n -> BitVector n -> Bool"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~ARG[1] <= ~ARG[2]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.toInteger#"-    , "type"      : "toInteger# :: BitVector n -> Integer"-    , "templateD" : "assign ~RESULT = ~IF~SIZE[~TYP[0]]~THEN$unsigned(~ARG[0])~ELSE64'sd0~FI;"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "toInteger# :: KnownNat n => BitVector n -> Integer"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN$signed(~VAR[bv][1][0+:~SIZE[~TYPO]])~ELSE$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~VAR[bv][1]})~FI~ELSE~SIZE[~TYPO]'sd0~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.size#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "size# :: KnownNat n => BitVector n -> Int"+    , "template"  : "~SIZE[~TYPO]'sd~SIZE[~TYP[1]]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.maxIndex#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "maxIndex# :: KnownNat n => BitVector n -> Int"+    , "template"  : "~SIZE[~TYPO]'sd~SIZE[~TYP[1]] - ~SIZE[~TYPO]'sd1"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.++#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "(++#) :: KnownNat m => BitVector n -> BitVector m -> BitVector (n + m)"+    , "template"  : "~IF~AND[~SIZE[~TYP[1]],~SIZE[~TYP[2]]]~THEN{~ARG[1],~ARG[2]}~ELSE~IF~SIZE[~TYP[1]]~THEN~ARG[1]~ELSE~ARG[2]~FI~FI"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Sized.Internal.BitVector.index#"+    , "kind" : "Expression"+    , "type" :+"index# :: KnownNat n  -- ARG[0]+        => BitVector n -- ARG[1]+        -> Int         -- ARG[2]+        -> Bit"+    , "template" : "~VAR[bv][1][~ARG[2]]"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Sized.Internal.BitVector.slice#"+    , "workInfo" : "Never"+    , "kind" : "Expression"+    , "type" :+"slice# :: BitVector (m + 1 + i) -- ARG[0]+        -> SNat m                -- ARG[1]+        -> SNat n                -- ARG[2]+        -> BitVector (m + 1 - n)"+    , "template" : "~VAR[bv][0][~LIT[1] : ~LIT[2]]"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Sized.Internal.BitVector.msb#"+    , "workInfo" : "Never"+    , "kind" : "Expression"+    , "type" :+"msb# :: KnownNat n  -- ARG[0]+      => BitVector n -- ARG[1]+      -> Bit"+    , "template" : "~IF ~SIZE[~TYP[1]] ~THEN ~VAR[bv][1][~SIZE[~TYP[1]]-1] ~ELSE 1'b0 ~FI"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Sized.Internal.BitVector.lsb#"+    , "workInfo" : "Never"+    , "kind" : "Expression"+    , "type" :+"lsb# :: BitVector n -- ARG[0]+      -> Bit"+    , "template" : "~IF ~SIZE[~TYP[0]] ~THEN ~VAR[bv][0][0] ~ELSE 1'b0 ~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.minBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "minBound# :: BitVector n"+    , "template"  : "~SIZE[~TYPO]'d0"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.maxBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "maxBound# :: KnownNat n => BitVector n"+    , "template"  : "{~SIZE[~TYPO] {1'b1}}"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.+#"+    , "kind"      : "Expression"+    , "type"      : "(+#) :: KnownNat n => BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[1] + ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.-#"+    , "kind"      : "Expression"+    , "type"      : "(-#) :: KnownNat n => BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[1] - ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.*#"+    , "kind"      : "Expression"+    , "type"      : "(*#) :: KnownNat n => BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[1] * ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.negate#"+    , "kind"      : "Expression"+    , "type"      : "negate# :: KnownNat n => BitVector n -> BitVector n"+    , "template"  : "-~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.fromInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "fromInteger# :: KnownNat n => Integer -> Integer -> BitVector n"+    , "template"  : "~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[2]]]~THEN$unsigned(~VAR[i][2][0+:~SIZE[~TYPO]])~ELSE$unsigned({{(~SIZE[~TYPO]-~SIZE[~TYP[2]]) {1'b0}},~VAR[i][2]})~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.plus#"+    , "kind"      : "Declaration"+    , "type"      : "plus# :: (KnownNat m, KnownNat n) => BitVector m -> BitVector n -> BitVector (Max m n + 1)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[2]],~SIZE[~TYP[3]]]~THEN~ARG[2] + ~ARG[3]~ELSE~IF~SIZE[~TYP[2]]~THEN~ARG[2]~ELSE~ARG[3]~FI~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.minus#"+    , "kind"      : "Declaration"+    , "type"      : "minus# :: (KnownNat m, KnownNat n) => BitVector m -> BitVector n -> BitVector (Max m n + 1)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[2]],~SIZE[~TYP[3]]]~THEN~ARG[2] - ~ARG[3]~ELSE~IF~SIZE[~TYP[2]]~THEN~ARG[2]~ELSE-~ARG[3]~FI~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.times#"+    , "kind"      : "Declaration"+    , "type"      : "times# :: (KnownNat m, KnownNat n) => BitVector m -> BitVector n -> BitVector (m + n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[2]],~SIZE[~TYP[3]]]~THEN~ARG[2] * ~ARG[3]~ELSE~SIZE[~TYPO]'d0~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.quot#"+    , "kind"      : "Expression"+    , "type"      : "quot# :: KnownNat n => BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[1] / ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.rem#"+    , "kind"      : "Expression"+    , "type"      : "rem# :: KnownNat n => BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[1] % ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.and#"+    , "kind"      : "Expression"+    , "type"      : "and# :: BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[0] & ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.or#"+    , "kind"      : "Expression"+    , "type"      : "or# :: BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[0] | ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.xor#"+    , "kind"      : "Expression"+    , "type"      : "xor# :: BitVector n -> BitVector n -> BitVector n"+    , "template"  : "~ARG[0] ^ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.complement#"+    , "kind"      : "Expression"+    , "type"      : "complement# :: KnownNat n => BitVector n -> BitVector n"+    , "template"  : "~ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.shiftL#"+    , "kind"      : "Expression"+    , "type"      : "shiftL# :: KnownNat n => BitVector n -> Int -> BitVector n"+    , "template"  : "~ARG[1] << ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.shiftR#"+    , "kind"      : "Expression"+    , "type"      : "shiftR# :: KnownNat n => BitVector n -> Int -> BitVector n"+    , "template"  : "~ARG[1] >> ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.BitVector.truncateB#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "truncateB# :: forall a b . KnownNat a => BitVector (a + b) -> BitVector a"+    , "template"  : "~VAR[bv][1][0+:~SIZE[~TYPO]]"     }   } ]

@@ -1,121 +1,140 @@ [ { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.pack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "pack# :: Index n -> BitVector (CLog 2 n)"-    , "templateE" : "~ARG[0]"+    , "template"  : "~ARG[0]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.unpack#"-    , "type"      : "unpack# :: KnownNat n => BitVector (CLog 2 n) -> Index n"-    , "templateE" : "~ARG[1]"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "unpack# :: (KnownNat n, 1 <= n) => BitVector (CLog 2 n) -> Index n"+    , "template"  : "~ARG[2]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.eq#"+    , "kind"      : "Expression"     , "type"      : "eq# :: Index n -> Index n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.neq#"+    , "kind"      : "Expression"     , "type"      : "neq# :: Index n -> Index n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.lt#"+    , "kind"      : "Expression"     , "type"      : "lt# :: Index n -> Index n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.ge#"+    , "kind"      : "Expression"     , "type"      : "ge# :: Index n -> Index n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.gt#"+    , "kind"      : "Expression"     , "type"      : "gt# :: Index n -> Index n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.le#"+    , "kind"      : "Expression"     , "type"      : "le# :: Index n -> Index n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.maxBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"     , "type"      : "maxBound# :: KnownNat n => Index n"-    , "templateE" : "~ARG[0]-~SIZE[~TYPO]'d1"+    , "template"  : "~ARG[0]-~SIZE[~TYPO]'d1"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.+#"+    , "kind"      : "Expression"     , "type"      : "(+#) :: KnownNat n => Index n -> Index n -> Index n"-    , "templateE" : "~ARG[1] + ~ARG[2]"+    , "template"  : "~ARG[1] + ~ARG[2]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.-#"+    , "kind"      : "Expression"     , "type"      : "(-#) :: KnownNat n => Index n -> Index n -> Index n"-    , "templateE" : "~ARG[1] - ~ARG[2]"+    , "template"  : "~ARG[1] - ~ARG[2]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.*#"+    , "kind"      : "Expression"     , "type"      : "(*#) :: KnownNat n => Index n -> Index n -> Index n"-    , "templateE" : "~ARG[1] * ~ARG[2]"+    , "template"  : "~ARG[1] * ~ARG[2]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.fromInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "fromInteger# :: KnownNat n => Integer -> Index n"-    , "templateE" : "$unsigned(~ARG[1][(~SIZE[~TYPO]-1):0])"+    , "template"  : "~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN$unsigned(~VAR[i][1][0+:~SIZE[~TYPO]])~ELSE$unsigned({{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~VAR[i][1]})~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.plus#"+    , "kind"      : "Declaration"     , "type"      : "Index m -> Index n -> Index (m + n - 1)"-    , "templateD" : "assign ~RESULT = ~ARG[0] + ~ARG[1];"+    , "template"  : "assign ~RESULT = ~ARG[0] + ~ARG[1];"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.minus#"+    , "kind"      : "Declaration"     , "type"      : "Index m -> Index n -> Index (m + n - 1)"-    , "templateD" : "assign ~RESULT = ~ARG[0] - ~ARG[1];"+    , "template"  : "assign ~RESULT = ~ARG[0] - ~ARG[1];"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.times#"+    , "kind"      : "Declaration"     , "type"      : "Index m -> Index n -> Index (((m-1) * (n-1)) + 1)"-    , "templateD" : "assign ~RESULT = ~ARG[0] * ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Index.quot#"-    , "type"      : "quot# :: Index n -> Index n -> Index n"-    , "templateE" : "~ARG[0] / ~ARG[1]"+    , "template"  : "assign ~RESULT = ~ARG[0] * ~ARG[1];"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.rem#"+    , "kind"      : "Expression"     , "type"      : "rem# :: Index n -> Index n -> Index n"-    , "templateE" : "~ARG[0] % ~ARG[1]"+    , "template"  : "~ARG[0] % ~ARG[1]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.toInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "toInteger# :: Index n -> Integer"-    , "templateD" : "assign ~RESULT = ~IF~SIZE[~TYP[0]]~THEN$unsigned(~ARG[0])~ELSE64'sd0~FI;"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[0]]]~THEN$signed(~VAR[i][0][0+:~SIZE[~TYPO]])~ELSE$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[0]]) {1'b0}},~VAR[i][0]})~FI~ELSE~SIZE[~TYPO]'sd0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Index.resize#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "resize# :: KnownNat m => Index n -> Index m"-    , "templateD" : "assign ~RESULT = $unsigned(~ARG[1]);"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN~VAR[bv][1][0+:~SIZE[~TYPO]]~ELSE{{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~ARG[1]}~FI~ELSE~SIZE[~TYPO]'d0~FI"     }   } ]

@@ -1,43 +1,208 @@ [ { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.eq#"+    , "kind"      : "Expression"     , "type"      : "eq# :: Signed n -> Signed n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.neq#"+    , "kind"      : "Expression"     , "type"      : "neq# :: Signed n -> Signed n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.lt#"+    , "kind"      : "Expression"     , "type"      : "lt# :: Signed n -> Signed n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.ge#"+    , "kind"      : "Expression"     , "type"      : "ge# :: Signed n -> Signed n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.gt#"+    , "kind"      : "Expression"     , "type"      : "gt# :: Signed n -> Signed n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.le#"+    , "kind"      : "Expression"     , "type"      : "le# :: Signed n -> Signed n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.toInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "toInteger# :: Signed n -> Integer"-    , "templateD" : "assign ~RESULT = ~IF~SIZE[~TYP[0]]~THEN$unsigned(~ARG[0])~ELSE64'sd0~FI;"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[0]]]~THEN$signed(~VAR[i][0][0+:~SIZE[~TYPO]])~ELSE$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[0]]) {1'b0}},~VAR[i][0]})~FI~ELSE~SIZE[~TYPO]'sd0~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.size#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "size# :: KnownNat n => Signed n -> Int"+    , "template"  : "~SIZE[~TYPO]'sd~LIT[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.pack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "pack# :: KnownNat n => Signed n -> BitVector n"+    , "template"  : "$unsigned(~ARG[1])"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.unpack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "unpack# :: KnownNat n => BitVector n -> Signed n"+    , "template"  : "$signed(~ARG[1])"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.minBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "minBound# :: KnownNat n => Signed n"+    , "comment"   : "Generates incorrect SV for n=0"+    , "template"  : "$signed({1'b1, {(~LIT[0]-1) {1'b0}}})"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.maxBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "maxBound# :: KnownNat n => Signed n"+    , "comment"   : "Generates incorrect SV for n=0"+    , "template"  : "$signed({1'b0, {(~LIT[0]-1) {1'b1}}})"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.*#"+    , "kind"      : "Expression"+    , "type"      : "(*#) :: KnownNat n => Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[1] * ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.negate#"+    , "kind"      : "Expression"+    , "type"      : "negate# :: KnownNat n => Signed n -> Signed n"+    , "template"  : "-~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.abs#"+    , "kind"      : "Expression"+    , "type"      : "abs# :: KnownNat n => Signed n -> Signed n"+    , "template"  : "(~ARG[1] < ~LIT[0]'sd0) ? -~ARG[1] : ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.fromInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "fromInteger# :: KnownNat n => Integer -> Signed (n :: Nat)"+    , "template"  : "~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN$signed(~VAR[i][1][0+:~SIZE[~TYPO]])~ELSE$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~VAR[i][1]})~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.plus#"+    , "kind"      : "Declaration"+    , "type"      : "plus# :: Signed m -> Signed n -> Signed (1 + Max m n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[0]],~SIZE[~TYP[1]]]~THEN~ARG[0] + ~ARG[1]~ELSE~IF~SIZE[~TYP[0]]~THEN~ARG[0]~ELSE~ARG[1]~FI~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.minus#"+    , "kind"      : "Declaration"+    , "type"      : "minus# :: Signed m -> Signed n -> Signed (1 + Max m n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[0]],~SIZE[~TYP[1]]]~THEN ~ARG[0] - ~ARG[1]~ELSE~IF~SIZE[~TYP[0]]~THEN ~ARG[0]~ELSE - ~ARG[1] ~FI~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.times#"+    , "kind"      : "Declaration"+    , "type"      : "times# :: Signed m -> Signed n -> Signed (m + n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[0]],~SIZE[~TYP[1]]]~THEN~ARG[0] * ~ARG[1]~ELSE~SIZE[~TYPO]'d0~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.rem#"+    , "kind"      : "Expression"+    , "type"      : "rem# :: Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[0] % ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.and#"+    , "kind"      : "Expression"+    , "type"      : "and# :: KnownNat n => Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[1] & ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.or#"+    , "kind"      : "Expression"+    , "type"      : "or# :: KnownNat n => Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[1] | ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.xor#"+    , "kind"      : "Expression"+    , "type"      : "xor# :: KnownNat n => Signed n -> Signed n -> Signed n"+    , "template"  : "~ARG[1] ^ ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.complement#"+    , "kind"      : "Expression"+    , "type"      : "complement# :: KnownNat n => Signed n -> Signed n"+    , "template"  : "~ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.shiftL#"+    , "kind"      : "Expression"+    , "type"      : "shiftL# :: KnownNat n => Signed n -> Int -> Signed n"+    , "template"  : "~ARG[1] <<< ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.shiftR#"+    , "kind"      : "Expression"+    , "type"      : "shiftR# :: KnownNat n => Signed n -> Int -> Signed n"+    , "template"  : "~ARG[1] >>> ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.truncateB#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "truncateB# :: KnownNat m => Signed (n + m) -> Signed m"+    , "template"  : "$signed(~VAR[s][1][0+:~SIZE[~TYPO]])"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Signed.resize#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "resize# :: (KnownNat n, KnownNat m) => Signed n -> Signed m"+    , "template"  : "~IF~SIZE[~TYP[2]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[2]]]~THEN$signed({~VAR[s][2][~LIT[0]-1],~VAR[s][2][0+:(~SIZE[~TYPO]-1)]})~ELSE$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[2]]) {~VAR[s][2][~LIT[0]-1]}},~VAR[s][2]})~FI~ELSE~SIZE[~TYPO]'sd0~FI"     }   } ]

@@ -1,43 +1,191 @@ [ { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.eq#"+    , "kind"      : "Expression"     , "type"      : "eq# :: Unsigned n -> Unsigned n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] == ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.neq#"+    , "kind"      : "Expression"     , "type"      : "neq# :: Unsigned n -> Unsigned n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] != ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.lt#"+    , "kind"      : "Expression"     , "type"      : "lt# :: Unsigned n -> Unsigned n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] < ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.ge#"+    , "kind"      : "Expression"     , "type"      : "ge# :: Unsigned n -> Unsigned n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] >= ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.gt#"+    , "kind"      : "Expression"     , "type"      : "gt# :: Unsigned n -> Unsigned n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] > ~ARG[1]~ELSE1'b0~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.le#"+    , "kind"      : "Expression"     , "type"      : "le# :: Unsigned n -> Unsigned n -> Bool"-    , "templateE" : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~ARG[0] <= ~ARG[1]~ELSE1'b1~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.toInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "toInteger# :: Unsigned n -> Integer"-    , "templateD" : "assign ~RESULT = ~IF~SIZE[~TYP[0]]~THEN$unsigned(~ARG[0])~ELSE64'sd0~FI;"+    , "template"  : "~IF~SIZE[~TYP[0]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[0]]]~THEN$signed(~VAR[i][0][0+:~SIZE[~TYPO]])~ELSE$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[0]]) {1'b0}},~VAR[i][0]})~FI~ELSE~SIZE[~TYPO]'sd0~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.size#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "size# :: KnownNat n => Unsigned n -> Int"+    , "template"  : "~SIZE[~TYPO]'sd~LIT[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.pack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "pack# :: Unsigned n -> BitVector n"+    , "template"  : "~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.unpack#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "unpack# :: KnownNat n => BitVector n -> Unsigned n"+    , "template"  : "~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.minBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "minBound# :: Unsigned n"+    , "template"  : "~SIZE[~TYPO]'d0"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.maxBound#"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "maxBound# :: KnownNat n => Unsigned n"+    , "template"  : "{~LIT[0] {1'b1}}"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.*#"+    , "kind"      : "Expression"+    , "type"      : "(*#) :: KnownNat n => Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[1] * ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.negate#"+    , "kind"      : "Expression"+    , "type"      : "negate# :: KnownNat n => Unsigned n -> Unsigned n"+    , "template"  : "- ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.fromInteger#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "fromInteger# :: KnownNat n => Integer -> Unsigned n"+    , "template"  : "~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN$unsigned(~VAR[i][1][0+:~SIZE[~TYPO]])~ELSE$unsigned({{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~VAR[i][1]})~FI"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.plus#"+    , "kind"      : "Declaration"+    , "type"      : "plus# :: Unsigned m -> Unsigned n -> Unsigned (1 + Max m n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[0]],~SIZE[~TYP[1]]]~THEN~ARG[0] + ~ARG[1]~ELSE~IF~SIZE[~TYP[0]]~THEN~ARG[0]~ELSE~ARG[1]~FI~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.minus#"+    , "kind"      : "Declaration"+    , "type"      : "minus# :: (KnownNat m, KnownNat n) => Unsigned m -> Unsigned n -> Unsigned (1 + Max m n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[2]],~SIZE[~TYP[3]]]~THEN ~ARG[2] - ~ARG[3]~ELSE~IF~SIZE[~TYP[2]]~THEN ~ARG[2]~ELSE - ~ARG[3]~FI~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.times#"+    , "kind"      : "Declaration"+    , "type"      : "times# :: Unsigned m -> Unsigned n -> Unsigned (m + n)"+    , "template"  : "assign ~RESULT = ~IF~AND[~SIZE[~TYP[0]],~SIZE[~TYP[1]]]~THEN~ARG[0] * ~ARG[1]~ELSE~SIZE[~TYPO]'d0~FI;"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.rem#"+    , "kind"      : "Expression"+    , "type"      : "rem# :: Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[0] % ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.and#"+    , "kind"      : "Expression"+    , "type"      : "and# :: Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[0] & ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.or#"+    , "kind"      : "Expression"+    , "type"      : "or# :: Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[0] | ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.xor#"+    , "kind"      : "Expression"+    , "type"      : "xor# :: Unsigned n -> Unsigned n -> Unsigned n"+    , "template"  : "~ARG[0] ^ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.complement#"+    , "kind"      : "Expression"+    , "type"      : "complement# :: KnownNat n => Unsigned n -> Unsigned n"+    , "template"  : "~ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.shiftL#"+    , "kind"      : "Expression"+    , "type"      : "shiftL# :: KnownNat n => Unsigned n -> Int -> Unsigned n"+    , "template"  : "~ARG[1] << ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.shiftR#"+    , "kind"      : "Expression"+    , "type"      : "shiftR# :: KnownNat n => Unsigned n -> Int -> Unsigned n"+    , "template"  : "~ARG[1] >> ~ARG[2]"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Internal.Unsigned.resize#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "resize# :: KnownNat m => Unsigned n -> Unsigned m"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~IF~CMPLE[~SIZE[~TYPO]][~SIZE[~TYP[1]]]~THEN~VAR[bv][1][0+:~SIZE[~TYPO]]~ELSE{{(~SIZE[~TYPO]-~SIZE[~TYP[1]]) {1'b0}},~ARG[1]}~FI~ELSE~SIZE[~TYPO]'d0~FI"     }   } ]

@@ -0,0 +1,17 @@+[ { "BlackBox" :+    { "name"      : "Clash.Sized.Vector.maxIndex"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "maxIndex :: KnownNat n => Vec n a -> Int"+    , "template"  : "~SIZE[~TYPO]'sd~LIT[0] - ~SIZE[~TYPO]'sd1"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Sized.Vector.length"+    , "workInfo"  : "Constant"+    , "kind"      : "Expression"+    , "type"      : "length :: KnownNat n => Vec n a -> Int"+    , "template"  : "~SIZE[~TYPO]'sd~LIT[0]"+    }+  }+]

@@ -0,0 +1,8 @@+[ { "BlackBox" :+    { "name"      : "Clash.Transformations.eqInt"+    , "kind"      : "Expression"+    , "type"      : "eqInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] == ~ARG[1]"+    }+  }+]

@@ -0,0 +1,47 @@+[ { "BlackBox" :+    { "name"      : "Clash.Xilinx.ClockGen.clockWizard"+    , "workInfo"  : "Always"+    , "kind"      : "Declaration"+    , "type"      :+"clockWizard+  :: ( KnownDomain domIn confIn       -- ARG[0]+     , KnownDomain domOut confOut )   -- ARG[1]+  => SSymbol name                    -- ARG[2]+  -> Clock  pllIn                    -- ARG[3]+  -> Reset pllIn                     -- ARG[4]+  -> (Clock pllOut, Enable pllOut)"+    , "template" :+"// clockWizard begin+~NAME[2] ~GENSYM[clockWizard_inst][2]+(.CLK_IN1  (~ARG[3])+,.RESET    (~IF ~ISACTIVEHIGH[0] ~THEN ~ELSE ! ~FI ~ARG[4])+,.CLK_OUT1 (~RESULT[1])+,.LOCKED   (~RESULT[0]));+// clockWizard end"+    }+  }+, { "BlackBox" :+    { "name"      : "Clash.Xilinx.ClockGen.clockWizardDifferential"+    , "workInfo"  : "Always"+    , "kind"      : "Declaration"+    , "type"      :+"clockWizardDifferential+  :: ( KnownDomain domIn confIn       -- ARG[0]+     , KnownDomain domOut confOut )   -- ARG[1]+  :: SSymbol name                    -- ARG[2]+  -> Clock  pllIn                    -- ARG[3]+  -> Clock  pllIn                    -- ARG[4]+  -> Reset pllIn                     -- ARG[5]+  -> (Clock pllOut, Enable pllOut)"+    , "template" :+"// clockWizardDifferential begin+~NAME[2] ~GENSYM[clockWizardDifferential_inst][2]+(.CLK_IN1_D_clk_n (~ARG[3])+,.CLK_IN1_D_clk_n (~ARG[4])+,.RESET           (~IF ~ISACTIVEHIGH[0] ~THEN ~ELSE ! ~FI ~ARG[5])+,.CLK_OUT1        (~RESULT[1])+,.LOCKED          (~RESULT[0]));+// clockWizardDifferential end"+    }+  }+]

@@ -0,0 +1,8 @@+[ { "BlackBox" :+    { "name"      : "GHC.Base.remInt"+    , "kind"      : "Expression"+    , "type"      : "remInt :: Int -> Int -> Int"+    , "template"  : "~ARG[0] % ~ARG[1]"+    }+  }+]

@@ -0,0 +1,36 @@+[ { "BlackBox" :+    { "name"      : "GHC.Classes.eqInt"+    , "kind"      : "Expression"+    , "type"      : "eqInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] == ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.neInt"+    , "kind"      : "Expression"+    , "type"      : "neInt :: Int -> Int -> Bool"+    , "template"  : "~ARG[0] != ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.&&"+    , "kind"      : "Expression"+    , "type"      : "(&&) :: Bool -> Bool -> Bool"+    , "template"  : "~ARG[0] & ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.||"+    , "kind"      : "Expression"+    , "type"      : "(::) :: Bool -> Bool -> Bool"+    , "template"  : "~ARG[0] | ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Classes.not"+    , "kind"      : "Expression"+    , "type"      : "not :: Bool -> Bool"+    , "template"  : "~ ~ARG[0]"+    }+  }+]

@@ -0,0 +1,30 @@+[+  {+    "BlackBoxHaskell": {+      "name": "GHC.Int.I8#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Int.intTF"+    }+  },+  {+    "BlackBoxHaskell": {+      "name": "GHC.Int.I16#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Int.intTF"+    }+  },+  {+    "BlackBoxHaskell": {+      "name": "GHC.Int.I32#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Int.intTF"+    }+  },+  {+    "BlackBoxHaskell": {+      "name": "GHC.Int.I64#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Int.intTF"+    }+  }+]

@@ -1,21 +1,23 @@ [ { "BlackBox" :     { "name"      : "GHC.Integer.Logarithms.integerLogBase#"+    , "kind"      : "Expression"     , "type"      : "integerLogBase# :: Integer -> Integer -> Int#"-    , "imports"   : ["~INCLUDENAME.inc"]-    , "include" :-      { "name" : "integerLogBase"-      , "extension" : "inc"-      , "content" :+    , "imports"   : ["~INCLUDENAME[0].inc"]+    , "includes" :+      [ { "name" : "integerLogBase"+        , "extension" : "inc"+        , "template" : "// integer logBase-function integer ~INCLUDENAME;+function integer ~INCLUDENAME[0];   input integer base, value;   begin-    for (~INCLUDENAME = 0; value >= base; ~INCLUDENAME=~INCLUDENAME+1)+    for (~INCLUDENAME[0] = 0; value >= base; ~INCLUDENAME[0]=~INCLUDENAME[0]+1)       value = value / base;   end endfunction"-      }-    , "templateE" : "~INCLUDENAME(~ARG[0],~ARG[1])"+        }+      ]+    , "template"  : "~INCLUDENAME[0](~ARG[0],~ARG[1])"     }   } ]

@@ -0,0 +1,189 @@+[ { "BlackBox" :+    { "name"      : "GHC.Integer.Type.smallInteger"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "smallInteger :: Int# -> Integer"+    , "template"  : "assign ~RESULT = $signed(~ARG[0]);"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.integerToInt"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "integerToInt :: Integer -> Int#"+    , "template"  : "assign ~RESULT = $signed(~ARG[0]);"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.timesInteger"+    , "kind"      : "Expression"+    , "type"      : "timesInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] * ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.negateInteger"+    , "kind"      : "Expression"+    , "type"      : "negateInteger :: Integer -> Integer"+    , "template"  : "-~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.absInteger"+    , "kind"      : "Expression"+    , "type"      : "absInteger :: Integer -> Integer"+    , "template"  : "(~ARG[0] < ~SIZE[~TYPO]'sd0) ? -~ARG[0] : ~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.remInteger"+    , "kind"      : "Expression"+    , "type"      : "remInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] % ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.eqInteger"+    , "kind"      : "Expression"+    , "type"      : "eqInteger :: Integer -> Integer -> Bool"+    , "template"  : "~ARG[0] == ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.neqInteger"+    , "kind"      : "Expression"+    , "type"      : "neqInteger :: Integer -> Integer -> Bool"+    , "template"  : "~ARG[0] != ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.eqInteger#"+    , "kind"      : "Expression"+    , "type"      : "eqInteger :: Integer -> Integer -> Bool"+    , "template"  : "(~ARG[0] == ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.neqInteger#"+    , "kind"      : "Expression"+    , "type"      : "neqInteger :: Integer -> Integer -> Bool"+    , "template"  : "(~ARG[0] != ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.leInteger#"+    , "kind"      : "Expression"+    , "type"      : "leInteger :: Integer -> Integer -> Bool"+    , "template"  : "(~ARG[0] <= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.gtInteger#"+    , "kind"      : "Expression"+    , "type"      : "gtInteger :: Integer -> Integer -> Bool"+    , "template"  : "(~ARG[0] > ~ARG[1] ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.ltInteger#"+    , "kind"      : "Expression"+    , "type"      : "ltInteger :: Integer -> Integer -> Bool"+    , "template"  : "(~ARG[0] < ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.geInteger#"+    , "kind"      : "Expression"+    , "type"      : "geInteger :: Integer -> Integer -> Bool"+    , "template"  : "(~ARG[0] >= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.shiftRInteger"+    , "kind"      : "Expression"+    , "type"      : "shiftRInteger :: Integer -> Int# -> Integer"+    , "template"  : "~ARG[0] >>> ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.shiftLInteger"+    , "kind"      : "Expression"+    , "type"      : "shiftLInteger :: Integer -> Int# -> Integer"+    , "template"  : "~ARG[0] <<< ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.testBitInteger"+    , "kind"      : "Expression"+    , "type"      : "testBitInteger :: Integer -> Int# -> Bool"+    , "template"  : "~VAR[input][0][~ARG[1]] == 1'b1"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.wordToInteger"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "wordToInteger :: Word# -> Integer"+    , "template"  : "assign ~RESULT = $signed(~ARG[0]);"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.integerToWord"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "integerToWord :: Integer -> Word#"+    , "template"  : "assign ~RESULT = $unsigned(~ARG[0]);"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.integerToWord64"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "integerToWord :: Integer -> Word64#"+    , "comment"   : "only used by 32 bit GHC"+    , "template"  : "assign ~RESULT = $unsigned(~ARG[0]);"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.bitInteger"+    , "kind"      : "Expression"+    , "type"      : "bitInteger :: Int -> Integer"+    , "template"  : "1 << ~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.complementInteger"+    , "kind"      : "Expression"+    , "type"      : "complementInteger :: Integer -> Integer"+    , "template"  : "~ ~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.xorInteger"+    , "kind"      : "Expression"+    , "type"      : "xorInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] ^ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.orInteger"+    , "kind"      : "Expression"+    , "type"      : "orInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] | ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.andInteger"+    , "kind"      : "Expression"+    , "type"      : "andInteger :: Integer -> Integer -> Integer"+    , "template"  : "~ARG[0] & ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Integer.Type.$wsignumInteger"+    , "kind"      : "Expression"+    , "type"      : "$wsignumInteger :: Integer -> Integer"+    , "template"  : "(~ARG[0] < ~SIZE[~TYPO]'sd0) ? -~SIZE[~TYPO]'sd1 : ((~ARG[0] == ~SIZE[~TYPO]'sd0) ? ~SIZE[~TYPO]'sd0 : ~SIZE[~TYPO]'sd1)"+    }+  }+]

@@ -0,0 +1,31 @@+[+  {+    "BlackBox": {+      "name": "GHC.Natural.naturalFromInteger",+      "workInfo" : "Never",+      "kind": "Expression",+      "type": "naturalFromInteger :: Integer -> Natural",+      "template": "$unsigned(~VAR[n][0][(~SIZE[~TYPO]-1):0])",+      "warning": "GHC.Natural.naturalFromInteger: Naturals are dynamically sized in simulation, but fixed-length after synthesization. Use carefully."+    }+  },+  {+    "BlackBox": {+      "name": "GHC.Natural.timesNatural",+      "kind": "Expression",+      "type": "timesNatural :: Natural -> Natural -> Natural",+      "template": "~ARG[0] * ~ARG[1]",+      "warning": "GHC.Natural.timesNatural: Naturals are dynamically sized in simulation, but fixed-length after synthesization. Use carefully."+    }+  },+  {+    "BlackBox": {+      "name": "GHC.Natural.wordToNatural#",+      "workInfo" : "Never",+      "kind": "Declaration",+      "type": "wordToNatural# :: Word# -> Natural",+      "template": "assign ~RESULT = $unsigned(~ARG[0]);",+      "warning": "GHC.Natural.wordToNatural#: Naturals are dynamically sized in simulation, but fixed-length after synthesization. Use carefully."+    }+  }+]

@@ -0,0 +1,398 @@+[ { "BlackBox" :+    { "name"      : "GHC.Prim.gtChar#"+    , "kind"      : "Expression"+     , "type"     : "gtChar# :: Char# -> Char# -> Int#"+    , "template"  : "(~ARG[0] > ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.geChar#"+    , "kind"      : "Expression"+    , "type"      : "geChar# :: Char# -> Char# -> Int#"+    , "template"  : "(~ARG[0] >= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.eqChar#"+    , "kind"      : "Expression"+    , "type"      : "eqChar# :: Char# -> Char# -> Int#"+    , "template"  : "(~ARG[0] == ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.neChar#"+    , "kind"      : "Expression"+    , "type"      : "neChar# :: Char# -> Char# -> Int#"+    , "template"  : "(~ARG[0] != ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.ltChar#"+    , "kind"      : "Expression"+    , "type"      : "ltChar# :: Char# -> Char# -> Int#"+    , "template"  : "(~ARG[0] < ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.leChar#"+    , "kind"      : "Expression"+    , "type"      : "leChar# :: Char# -> Char# -> Int#"+    , "template"  : "(~ARG[0] <= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.ord#"+    , "kind"      : "Expression"+    , "type"      : "ord :: Char# -> Int#"+    , "template"  : "$signed({{(~SIZE[~TYPO]-~SIZE[~TYP[0]]) {1'b0}},~VAR[c][0]})"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.*#"+    , "kind"      : "Expression"+    , "type"      : "(*#) :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] * ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.remInt#"+    , "kind"      : "Expression"+    , "type"      : "remInt# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] % ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.andI#"+    , "kind"      : "Expression"+    , "type"      : "andI# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] & ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.orI#"+    , "kind"      : "Expression"+    , "type"      : "orI# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] | ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.xorI#"+    , "kind"      : "Expression"+    , "type"      : "xorI# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] ^ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.notI#"+    , "kind"      : "Expression"+    , "type"      : "notI# :: Int# -> Int#"+    , "template"  : "~ ~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.negateInt#"+    , "kind"      : "Expression"+    , "type"      : "negateInt# :: Int# -> Int#"+    , "template"  : "-(~ARG[0])"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.>#"+    , "kind"      : "Expression"+     , "type"     : "(>#) :: Int# -> Int# -> Int#"+    , "template"  : "(~ARG[0] > ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.>=#"+    , "kind"      : "Expression"+    , "type"      : "(>=#) :: Int# -> Int# -> Int#"+    , "template"  : "(~ARG[0] >= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.==#"+    , "kind"      : "Expression"+    , "type"      : "(==) :: Int# -> Int# -> Int#"+    , "template"  : "(~ARG[0] == ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim./=#"+    , "kind"      : "Expression"+    , "type"      : "(/=#) :: Int# -> Int# -> Int#"+    , "template"  : "(~ARG[0] != ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.<#"+    , "kind"      : "Expression"+    , "type"      : "(<#) :: Int# -> Int# -> Int#"+    , "template"  : "(~ARG[0] < ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.<=#"+    , "kind"      : "Expression"+    , "type"      : "(<=#) :: Int# -> Int# -> Int#"+    , "template"  : "(~ARG[0] <= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.chr#"+    , "kind"      : "Expression"+    , "type"      : "ord :: Int# -> Char#"+    , "template"  : "$unsigned(~VAR[i][0][0+:~SIZE[~TYPO]])"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.int2Word#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "int2Word# :: Int# -> Word#"+    , "template"  : "$unsigned(~ARG[0])"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.uncheckedIShiftL#"+    , "kind"      : "Expression"+    , "type"      : "uncheckedIShiftL# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] <<< ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.uncheckedIShiftRA#"+    , "kind"      : "Expression"+    , "type"      : "uncheckedIShiftRA# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] >>> ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.uncheckedIShiftRL#"+    , "kind"      : "Expression"+    , "type"      : "uncheckedIShiftRL# :: Int# -> Int# -> Int#"+    , "template"  : "~ARG[0] >> ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.timesWord#"+    , "kind"      : "Expression"+    , "type"      : "timesWord# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] * ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.remWord#"+    , "kind"      : "Expression"+    , "type"      : "remWord# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] % ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.and#"+    , "kind"      : "Expression"+    , "type"      : "and# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] & ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.or#"+    , "kind"      : "Expression"+    , "type"      : "or# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] | ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.xor#"+    , "kind"      : "Expression"+    , "type"      : "xor# :: Word# -> Word# -> Word#"+    , "template"  : "~ARG[0] ^ ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.not#"+    , "kind"      : "Expression"+    , "type"      : "not# :: Word# -> Word#"+    , "template"  : "~ ~ARG[0]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.uncheckedShiftL#"+    , "kind"      : "Expression"+    , "type"      : "uncheckedShiftL# :: Word# -> Int# -> Word#"+    , "template"  : "~ARG[0] << ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.uncheckedShiftRL#"+    , "kind"      : "Expression"+    , "type"      : "uncheckedShiftRL# :: Word# -> Int# -> Word#"+    , "template"  : "~ARG[0] >> ~ARG[1]"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.word2Int#"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"+    , "type"      : "int2Word# :: Word# -> Int#"+    , "template"  : "$signed(~ARG[0])"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.gtWord#"+    , "kind"      : "Expression"+     , "type"     : "gtWord# :: Word# -> Word# -> Int#"+    , "template"  : "(~ARG[0] > ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.geWord#"+    , "kind"      : "Expression"+    , "type"      : "geWord# :: Word# -> Word# -> Int#"+    , "template"  : "(~ARG[0] >= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.eqWord#"+    , "kind"      : "Expression"+    , "type"      : "eqWord# :: Word# -> Word# -> Int#"+    , "template"  : "(~ARG[0] == ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.neWord#"+    , "kind"      : "Expression"+    , "type"      : "neWord# :: Word# -> Word# -> Int#"+    , "template"  : "(~ARG[0] != ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.ltWord#"+    , "kind"      : "Expression"+    , "type"      : "ltWord# :: Word# -> Word# -> Int#"+    , "template"  : "(~ARG[0] < ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.leWord#"+    , "kind"      : "Expression"+    , "type"      : "leWord# :: Word# -> Word# -> Int#"+    , "template"  : "(~ARG[0] <= ~ARG[1]) ? ~SIZE[~TYPO]'sd1 : ~SIZE[~TYPO]'sd0"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.byteSwap16#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "byteSwap16# :: Word# -> Word#"+    , "template"  :+"// byteSwap16 begin~IF ~IW64 ~THEN+assign ~RESULT = {~VAR[w][0][63:16],~VAR[w][0][7:0],~VAR[w][0][15:8]};~ELSE+assign ~RESULT = {~VAR[w][0][31:16],~VAR[w][0][7:0],~VAR[w][0][15:8]};~FI+// byteSwap16 end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.byteSwap32#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "byteSwap32# :: Word# -> Word#"+    , "template"  :+"// byteSwap32 begin~IF ~IW64 ~THEN+assign ~RESULT = {~VAR[w][0][63:32],~VAR[w][0][7:0],~VAR[w][0][15:8],~VAR[w][0][23:16],~VAR[w][0][31:24]};~ELSE+assign ~RESULT = {~VAR[w][0][7:0],~VAR[w][0][15:8],~VAR[w][0][23:16],~VAR[w][0][31:24]};~FI+// byteSwap32 end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.byteSwap64#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "byteSwap64# :: Word# -> Word#"+    , "template"  :+"// byteSwap64 begin+assign ~RESULT = {~VAR[w][0][7:0],~VAR[w][0][15:8],~VAR[w][0][23:16],~VAR[w][0][31:24]+                 ,~VAR[w][0][39:32],~VAR[w][0][47:40],~VAR[w][0][55:48],~VAR[w][0][63:56]};+// byteSwap64 end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.byteSwap#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "byteSwap# :: Word# -> Word#"+    , "template"  :+"// byteSwap begin~IF ~IW64 ~THEN+assign ~RESULT = {~VAR[w][0][7:0],~VAR[w][0][15:8],~VAR[w][0][23:16],~VAR[w][0][31:24]+                 ,~VAR[w][0][39:32],~VAR[w][0][47:40],~VAR[w][0][55:48],~VAR[w][0][63:56]};~ELSE+assign ~RESULT = {~VAR[w][0][7:0],~VAR[w][0][15:8],~VAR[w][0][23:16],~VAR[w][0][31:24]};~FI+// byteSwap end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.narrow8Int#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "narrow8Int# :: Int# -> Int#"+    , "template"  :+"// narrow8Int begin+assign ~RESULT = $signed(~VAR[i][0][7:0]);+// narrow8Int end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.narrow16Int#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "narrow16Int# :: Int# -> Int#"+    , "template"  :+"// narrow16Int begin+assign ~RESULT = $signed(~VAR[i][0][15:0]);+// narrow16Int end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.narrow32Int#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "narrow32Int# :: Int# -> Int#"+    , "template"  :+"// narrow32Int begin+assign ~RESULT = $signed(~VAR[i][0][31:0]);+// narrow32Int end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.narrow8Word#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "narrow8Int# :: Word# -> Word#"+    , "template"  :+"// narrow8Word begin+assign ~RESULT = $unsigned(~VAR[w][0][7:0]);+// narrow8Word end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.narrow16Word#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "narrow16Word# :: Word# -> Word#"+    , "template"  :+"// narrow16Word begin+assign ~RESULT = $unsigned(~VAR[w][0][15:0]);+// narrow16Word end"+    }+  }+, { "BlackBox" :+    { "name"      : "GHC.Prim.narrow32Word#"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"+    , "type"      : "narrow32Int# :: Word# -> Word#"+    , "template"  :+"// narrow32Word begin+assign ~RESULT = $unsigned(~VAR[w][0][31:0]);+// narrow32Word end"+    }+  }+]

@@ -0,0 +1,30 @@+[+  {+    "BlackBoxHaskell": {+      "name": "GHC.Word.W8#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Word.wordTF"+    }+  },+  {+    "BlackBoxHaskell": {+      "name": "GHC.Word.W16#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Word.wordTF"+    }+  },+  {+    "BlackBoxHaskell": {+      "name": "GHC.Word.W32#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Word.wordTF"+    }+  },+  {+    "BlackBoxHaskell": {+      "name": "GHC.Word.W64#",+      "workInfo" : "Never",+      "templateFunction": "Clash.Primitives.GHC.Word.wordTF"+    }+  }+]

@@ -1,44 +1,140 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.BlockRam.blockRam#"+    , "kind" : "Declaration"     , "type" : "blockRam#-  :: HasCallStack    -- ARG[0]-  => Clock dom gated -- clk,  ARG[1]-  -> Vec n a         -- init, ARG[2]-  -> Signal dom Int  -- rd,   ARG[3]-  -> Signal dom Bool -- wren, ARG[4]-  -> Signal dom Int  -- wr,   ARG[5]-  -> Signal dom a    -- din,  ARG[6]+  :: ( KnownDomain dom        ARG[0]+     , HasCallStack  --       ARG[1]+     , Undefined a ) --       ARG[2]+  => Clock dom       -- clk,  ARG[3]+  -> Enable dom      -- en,   ARG[4]+  -> Vec n a         -- init, ARG[5]+  -> Signal dom Int  -- rd,   ARG[6]+  -> Signal dom Bool -- wren, ARG[7]+  -> Signal dom Int  -- wr,   ARG[8]+  -> Signal dom a    -- din,  ARG[9]   -> Signal dom a"-    , "templateD" :+    , "template" : "// blockRam begin-~SIGD[~GENSYM[RAM][0]][2];-logic [~SIZE[~TYP[6]]-1:0] ~GENSYM[~RESULT_q][1];+~SIGD[~GENSYM[RAM][1]][5];+logic [~SIZE[~TYP[9]]-1:0] ~GENSYM[~RESULT_q][2]; initial begin-  ~SYM[0] = ~LIT[2];-end~IF ~ISGATED[1] ~THEN-always @(posedge ~ARG[1][1]) begin : ~GENSYM[~COMPNAME_blockRam][2]~IF ~VIVADO ~THEN-  if (~ARG[1][0]) begin-    if (~ARG[4]) begin-      ~SYM[0][~ARG[5]] <= ~TOBV[~ARG[6]][~TYP[6]];+  ~SYM[1] = ~CONST[5];+end~IF ~ISACTIVEENABLE[4] ~THEN+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_blockRam][3]~IF ~VIVADO ~THEN+  if (~ARG[4]) begin+    if (~ARG[7]) begin+      ~SYM[1][~ARG[8]] <= ~TOBV[~ARG[9]][~TYP[9]];     end-    ~SYM[1] <= ~SYM[0][~ARG[3]];+    ~SYM[2] <= ~SYM[1][~ARG[6]];   end~ELSE-  if (~ARG[4] & ~ARG[1][0]) begin-    ~SYM[0][~ARG[5]] <= ~TOBV[~ARG[6]][~TYP[6]];+  if (~ARG[7] & ~ARG[4]) begin+    ~SYM[1][~ARG[8]] <= ~TOBV[~ARG[9]][~TYP[9]];   end-  if (~ARG[1][0]) begin-    ~SYM[1] <= ~SYM[0][~ARG[3]];+  if (~ARG[4]) begin+    ~SYM[2] <= ~SYM[1][~ARG[6]];   end~FI end~ELSE-always @(posedge ~ARG[1]) begin : ~SYM[2]-  if (~ARG[4]) begin-    ~SYM[0][~ARG[5]] <= ~TOBV[~ARG[6]][~TYP[6]];+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~SYM[3]+  if (~ARG[7]) begin+    ~SYM[1][~ARG[8]] <= ~TOBV[~ARG[9]][~TYP[9]];   end-  ~SYM[1] <= ~SYM[0][~ARG[3]];+  ~SYM[2] <= ~SYM[1][~ARG[6]]; end~FI-assign ~RESULT = ~FROMBV[~SYM[1]][~TYP[6]];+assign ~RESULT = ~FROMBV[~SYM[2]][~TYP[9]]; // blockRam end"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Explicit.BlockRam.blockRamU#"+    , "kind" : "Declaration"+    , "type" :+"blockRamU#+  :: ( KnownDomain dom        ARG[0]+     , HasCallStack  --       ARG[1]+     , Undefined a ) --       ARG[2]+  => Clock dom       -- clk,  ARG[3]+  -> Enable dom      -- en,   ARG[4]+  -> SNat n          -- len,  ARG[5]+  -> Signal dom Int  -- rd,   ARG[6]+  -> Signal dom Bool -- wren, ARG[7]+  -> Signal dom Int  -- wr,   ARG[8]+  -> Signal dom a    -- din,  ARG[9]+  -> Signal dom a"+    , "template" :+"// blockRamU begin,+~TYPO ~GENSYM[~RESULT_RAM][1] [0:~LIT[5]-1];+logic [~SIZE[~TYP[9]]-1:0] ~GENSYM[~RESULT_q][2];~IF ~ISACTIVEENABLE[4] ~THEN+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_blockRam][3]~IF ~VIVADO ~THEN+  if (~ARG[4]) begin+    if (~ARG[7]) begin+      ~SYM[1][~ARG[8]] <= ~TOBV[~ARG[9]][~TYP[9]];+    end+    ~SYM[2] <= ~SYM[1][~ARG[6]];+  end~ELSE+  if (~ARG[7] & ~ARG[4]) begin+    ~SYM[1][~ARG[8]] <= ~TOBV[~ARG[9]][~TYP[9]];+  end+  if (~ARG[4]) begin+    ~SYM[2] <= ~SYM[1][~ARG[6]];+  end~FI+end~ELSE+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~SYM[3]+  if (~ARG[7]) begin+    ~SYM[1][~ARG[8]] <= ~TOBV[~ARG[9]][~TYP[9]];+  end+  ~SYM[2] <= ~SYM[1][~ARG[6]];+end~FI+assign ~RESULT = ~FROMBV[~SYM[2]][~TYP[9]];+// blockRamU end"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Explicit.BlockRam.blockRam1#"+    , "kind" : "Declaration"+    , "type" :+"blockRam1#+  :: ( KnownDomain dom        ARG[0]+     , HasCallStack  --       ARG[1]+     , Undefined a ) --       ARG[2]+  => Clock dom       -- clk,  ARG[3]+  -> Enable dom      -- en,   ARG[4]+  -> SNat n          -- len,  ARG[5]+  -> a               -- init, ARG[6]+  -> Signal dom Int  -- rd,   ARG[7]+  -> Signal dom Bool -- wren, ARG[8]+  -> Signal dom Int  -- wr,   ARG[9]+  -> Signal dom a    -- din,  ARG[10]+  -> Signal dom a"+    , "template" :+"// blockRam1 begin,+~TYPO ~GENSYM[~RESULT_RAM][1] [0:~LIT[5]-1];+logic [~SIZE[~TYP[10]]-1:0] ~GENSYM[~RESULT_q][2];+initial begin+  ~SYM[1] = '{default: ~CONST[6]};+end~IF ~ISACTIVEENABLE[4] ~THEN+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_blockRam][3]~IF ~VIVADO ~THEN+  if (~ARG[4]) begin+    if (~ARG[8]) begin+      ~SYM[1][~ARG[9]] <= ~TOBV[~ARG[10]][~TYP[10]];+    end+    ~SYM[2] <= ~SYM[1][~ARG[7]];+  end~ELSE+  if (~ARG[8] & ~ARG[4]) begin+    ~SYM[1][~ARG[9]] <= ~TOBV[~ARG[10]][~TYP[10]];+  end+  if (~ARG[4]) begin+    ~SYM[2] <= ~SYM[1][~ARG[7]];+  end~FI+end~ELSE+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~SYM[3]+  if (~ARG[8]) begin+    ~SYM[1][~ARG[9]] <= ~TOBV[~ARG[10]][~TYP[10]];+  end+  ~SYM[2] <= ~SYM[1][~ARG[7]];+end~FI+assign ~RESULT = ~FROMBV[~SYM[2]][~TYP[10]];+// blockRam1 end"     }   } ]

@@ -1,47 +1,51 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.BlockRam.File.blockRamFile#"+    , "kind" : "Declaration"     , "type" : "blockRamFile#-  :: (KnownNat m, HasCallStack)-- (ARG[0],ARG[1])-  => Clock dom gated           -- clk,  ARG[2]-  -> SNat n                    -- sz,   ARG[3]-  -> FilePath                  -- file, ARG[4]-  -> Signal dom Int            -- rd,   ARG[5]-  -> Signal dom Bool           -- wren, ARG[6]-  -> Signal dom Int            -- wr,   ARG[7]-  -> Signal dom (BitVector m)  -- din,  ARG[8]+  :: ( KnownDomain dom         --       ARG[0]+     , KnownNat m              --       ARG[1]+     , HasCallStack )          --       ARG[2]+  => Clock dom                 -- clk,  ARG[3]+  => Enable dom                -- en,   ARG[4]+  -> SNat n                    -- sz,   ARG[5]+  -> FilePath                  -- file, ARG[6]+  -> Signal dom Int            -- rd,   ARG[7]+  -> Signal dom Bool           -- wren, ARG[8]+  -> Signal dom Int            -- wr,   ARG[9]+  -> Signal dom (BitVector m)  -- din,  ARG[10]   -> Signal dom (BitVector m)"-    , "templateD" :+    , "template" : "// blockRamFile begin-~SIGDO[~GENSYM[RAM][0]] [0:~LIT[3]-1];-~SIGD[~GENSYM[~RESULT_q][1]][8];+~SIGDO[~GENSYM[RAM][1]] [0:~LIT[5]-1];+~SIGD[~GENSYM[~RESULT_q][2]][10];  initial begin-  $readmemb(~FILE[~LIT[4]],~SYM[0]);+  $readmemb(~FILE[~LIT[6]],~SYM[1]); end-~IF ~ISGATED[2] ~THEN-always @(posedge ~ARG[2][1]) begin : ~GENSYM[~COMPNAME_blockRamFile][2]~IF ~VIVADO ~THEN-  if (~ARG[2][0]) begin-    if (~ARG[6]) begin-      ~SYM[0][~ARG[7]] <= ~ARG[8];+~IF ~ISACTIVEENABLE[4] ~THEN+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_blockRamFile][3]~IF ~VIVADO ~THEN+  if (~ARG[4]) begin+    if (~ARG[8]) begin+      ~SYM[1][~ARG[9]] <= ~ARG[10];     end-    ~SYM[1] <= ~SYM[0][~ARG[5]];+    ~SYM[2] <= ~SYM[1][~ARG[7]];   end~ELSE-  if (~ARG[6] & ~ARG[2][0]) begin-    ~SYM[0][~ARG[7]] <= ~ARG[8];+  if (~ARG[8] & ~ARG[4]) begin+    ~SYM[1][~ARG[9]] <= ~ARG[10];   end-  if (~ARG[2][0] begin-    ~SYM[1] <= ~SYM[0][~ARG[5]];+  if (~ARG[4]) begin+    ~SYM[2] <= ~SYM[1][~ARG[7]];   end~FI end~ELSE-always @(posedge ~ARG[2]) begin : ~SYM[2]-  if (~ARG[6]) begin-    ~SYM[0][~ARG[7]] <= ~ARG[8];+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~SYM[3]+  if (~ARG[8]) begin+    ~SYM[1][~ARG[9]] <= ~ARG[10];   end-  ~SYM[1] <= ~SYM[0][~ARG[5]];+  ~SYM[2] <= ~SYM[1][~ARG[7]]; end~FI -assign ~RESULT = ~SYM[1];+assign ~RESULT = ~SYM[2]; // blockRamFile end"     }   }

@@ -1,67 +1,46 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.DDR.ddrIn#"+    , "kind" : "Declaration"     , "type" : "ddrIn# :: forall a slow fast n pFast gated synchronous.-           ( HasCallStack                         -- ARG[0]-           , fast ~ Dom n pFast                   -- ARG[1]-           , slow ~ Dom n (2*pFast))              -- ARG[2]-        => Clock slow gated                       -- ARG[3]-        -> Reset slow synchronous                 -- ARG[4]-        -> a                                      -- ARG[5]-        -> a                                      -- ARG[6]-        -> a                                      -- ARG[7]-        -> Signal fast a                          -- ARG[8]+           ( HasCallStack          -- ARG[0]+           , Undefined a           -- ARG[1]+           , KnownConfi~ fast domf -- ARG[2]+           , KnownConfi~ slow doms -- ARG[3]+        => Clock slow              -- ARG[4], clk+        -> Reset slow              -- ARG[5], rst+        -> Enable slow             -- ARG[6], en+        -> a                       -- ARG[7]+        -> a                       -- ARG[8]+        -> a                       -- ARG[9]+        -> Signal fast a           -- ARG[10]         -> Signal slow (a,a)"-    , "templateD" :+    , "template" : "// ddrIn begin-~SIGD[~GENSYM[data_Pos][1]][8];-~SIGD[~GENSYM[data_Neg][2]][8];-~SIGD[~GENSYM[data_Neg_Latch][3]][8];-~IF ~ISGATED[3] ~THEN-always @(posedge ~ARG[3][1]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~GENSYM[~COMPNAME_ddrIn_pos][6]-  if (~ARG[4]) begin-    ~SYM[1] <= ~ARG[6];-  end else if (~ARG[3][0]) begin-    ~SYM[1] <= ~ARG[8];-  end-end~ELSE-always @(posedge ~ARG[3]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~SYM[6]-  if (~ARG[4]) begin-    ~SYM[1] <= ~ARG[6];-  end else begin+~SIGD[~GENSYM[data_Pos][1]][9];+~SIGD[~GENSYM[data_Neg][2]][9];+~SIGD[~GENSYM[data_Neg_Latch][3]][9];+always @(~IF~ACTIVEEDGE[Rising][2]~THENposedge~ELSEnegedge~FI ~ARG[4]~IF~ISSYNC[3]~THEN)~ELSE or ~IF~ISACTIVEHIGH[2]~THENposedge~ELSEnegedge~FI ~ARG[5])~FI begin : ~GENSYM[~COMPNAME_ddrIn_pos][6]+  if (~IF~ISACTIVEHIGH[2]~THEN~ARG[5]~ELSE! ~ARG[5]~FI) begin     ~SYM[1] <= ~ARG[8];-  end-end~FI-~IF ~ISGATED[3] ~THEN-always @(negedge ~ARG[3][1]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~GENSYM[~COMPNAME_ddrIn_neg][7]-  if (~ARG[4]) begin-    ~SYM[2] <= ~ARG[7];-  end else if (~ARG[3][0]) begin-    ~SYM[2] <= ~ARG[8];-  end-end~ELSE-always @(negedge ~ARG[3]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~SYM[7]-  if (~ARG[4]) begin-    ~SYM[2] <= ~ARG[7];-  end else begin-    ~SYM[2] <= ~ARG[8];+  end else ~IF ~ISACTIVEENABLE[6] ~THEN if (~ARG[6]) ~ELSE ~FI begin+    ~SYM[1] <= ~ARG[10];   end-end~FI-~IF ~ISGATED[3] ~THEN-always @(posedge ~ARG[3][1]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~GENSYM[~COMPNAME_ddrIn_neg_latch][8]-  if (~ARG[4]) begin-    ~SYM[3] <= ~ARG[5];-  end else if (~ARG[3][0]) begin-    ~SYM[3] <= ~SYM[2];+end+always @(~IF~ACTIVEEDGE[Rising][2]~THENnegedge~ELSEposedge~FI ~ARG[4]~IF~ISSYNC[3]~THEN)~ELSE or ~IF~ISACTIVEHIGH[2]~THENposedge~ELSEnegedge~FI ~ARG[5])~FI begin : ~GENSYM[~COMPNAME_ddrIn_neg][7]+  if (~IF~ISACTIVEHIGH[2]~THEN~ARG[5]~ELSE! ~ARG[5]~FI) begin+    ~SYM[2] <= ~ARG[9];+  end else ~IF ~ISACTIVEENABLE[6] ~THEN if (~ARG[6]) ~ELSE ~FI begin+    ~SYM[2] <= ~ARG[10];   end-end~ELSE-always @(posedge ~ARG[3]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~SYM[8]-  if (~ARG[4]) begin-    ~SYM[3] <= ~ARG[5];-  end else begin+end+always @(~IF~ACTIVEEDGE[Rising][2]~THENposedge~ELSEnegedge~FI ~ARG[4]~IF~ISSYNC[3]~THEN)~ELSE or ~IF~ISACTIVEHIGH[2]~THENposedge~ELSEnegedge~FI ~ARG[5])~FI begin : ~GENSYM[~COMPNAME_ddrIn_neg_latch][8]+  if (~IF~ISACTIVEHIGH[2]~THEN~ARG[5]~ELSE! ~ARG[5]~FI) begin+    ~SYM[3] <= ~ARG[7];+  end else ~IF ~ISACTIVEENABLE[6] ~THEN if (~ARG[6]) ~ELSE ~FI begin     ~SYM[3] <= ~SYM[2];   end-end~FI+end  assign ~RESULT = {~SYM[3], ~SYM[1]}; // ddrIn end"@@ -69,57 +48,43 @@   } , { "BlackBox" :     { "name" : "Clash.Explicit.DDR.ddrOut#"+    , "kind" : "Declaration"     , "type" : "ddrOut# :: ( HasCallStack               -- ARG[0]-            , fast ~ Dom n pFast         -- ARG[1]-            , slow ~ Dom n (2*pFast))    -- ARG[2]-         => Clock slow gated             -- ARG[3]-         -> Reset slow synchronous       -- ARG[4]-         -> a                            -- ARG[5]-         -> Signal slow a                -- ARG[6]-         -> Signal slow a                -- ARG[7]+            , Undefined a                -- ARG[1]+            , KnownConfi~ fast domf      -- ARG[2]+            , KnownConfi~ slow doms      -- ARG[3]+         => Clock slow                   -- ARG[4]+         -> Reset slow                   -- ARG[5]+         -> Enable slow                  -- ARG[6]+         -> a                            -- ARG[7]+         -> Signal slow a                -- ARG[8]+         -> Signal slow a                -- ARG[9]          -> Signal fast a"-    , "templateD" :+    , "template" : "// ddrOut begin-~SIGD[~GENSYM[data_Pos][1]][5];-~SIGD[~GENSYM[data_Neg][2]][5];-~IF ~ISGATED[3] ~THEN-always @(posedge ~ARG[3][1]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~GENSYM[~COMPNAME_ddrOut_pos][5]-  if (~ARG[4]) begin-    ~SYM[1] <= ~ARG[5];-  end else if (~ARG[3][0]) begin-    ~SYM[1] <= ~ARG[6];-  end-end~ELSE-always @(posedge ~ARG[3]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~SYM[5]-  if (~ARG[4]) begin-    ~SYM[1] <= ~ARG[5];-  end else begin-    ~SYM[1] <= ~ARG[6];-  end-end~FI-~IF ~ISGATED[3] ~THEN-always @(posedge ~ARG[3][1]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~GENSYM[~COMPNAME_ddrOut_neg][6]-  if (~ARG[4]) begin-    ~SYM[2] <= ~ARG[5];-  end else if (~ARG[3][0]) begin-    ~SYM[2] <= ~ARG[7];+~SIGD[~GENSYM[data_Pos][1]][7];+~SIGD[~GENSYM[data_Neg][2]][7];+always @(~IF~ACTIVEEDGE[Rising][2]~THENposedge~ELSEnegedge~FI ~ARG[4]~IF~ISSYNC[3]~THEN)~ELSE or ~IF~ISACTIVEHIGH[2]~THENposedge~ELSEnegedge~FI ~ARG[5])~FI begin : ~GENSYM[~COMPNAME_ddrOut_pos][5]+  if (~IF~ISACTIVEHIGH[2]~THEN~ARG[5]~ELSE! ~ARG[5]~FI) begin+    ~SYM[1] <= ~ARG[7];+  end else ~IF ~ISACTIVEENABLE[6] ~THEN if (~ARG[6]) ~ELSE ~FI begin+    ~SYM[1] <= ~ARG[8];   end-end~ELSE-always @(posedge ~ARG[3]~IF ~ISSYNC[4] ~THEN ~ELSE or posedge ~ARG[4]~FI) begin : ~SYM[6]-  if (~ARG[4]) begin-    ~SYM[2] <= ~ARG[5];-  end else begin+end+always @(~IF~ACTIVEEDGE[Rising][2]~THENposedge~ELSEnegedge~FI ~ARG[4]~IF~ISSYNC[3]~THEN)~ELSE or ~IF~ISACTIVEHIGH[2]~THENposedge~ELSEnegedge~FI ~ARG[5])~FI begin : ~GENSYM[~COMPNAME_ddrOut_neg][6]+  if (~IF~ISACTIVEHIGH[2]~THEN~ARG[5]~ELSE! ~ARG[5]~FI) begin     ~SYM[2] <= ~ARG[7];+  end else ~IF ~ISACTIVEENABLE[6] ~THEN if (~ARG[6]) ~ELSE ~FI begin+    ~SYM[2] <= ~ARG[9];   end-end~FI+end -always @(*) begin ~IF ~ISGATED[3] ~THEN-  if (~ARG[3][1]) begin~ELSE-  if (~ARG[3]) begin~FI-    ~RESULT = ~SYM[1];+always @(*) begin+  if (~ARG[4]) begin+    ~RESULT = ~IF~ACTIVEEDGE[Rising][2]~THEN~SYM[1]~ELSE~SYM[2]~FI;   end else begin-    ~RESULT = ~SYM[2];+    ~RESULT = ~IF~ACTIVEEDGE[Rising][2]~THEN~SYM[2]~ELSE~SYM[1]~FI;   end end // ddrOut end"

@@ -1,31 +1,30 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.RAM.asyncRam#"+    , "kind" : "Declaration"     , "type" : "asyncRam#-  :: HasCallStack      -- ARG[0]-  => Clock wdom wgated -- ^ wclk, ARG[1]-  -> Clock rdom rgated -- ^ rclk, ARG[2]-  -> SNat n            -- ^ sz,   ARG[3]-  -> Signal rdom Int   -- ^ rd,   ARG[4]-  -> Signal wdom Bool  -- ^ en,   ARG[5]-  -> Signal wdom Int   -- ^ wr,   ARG[6]-  -> Signal wdom a     -- ^ din,  ARG[7]+  :: ( HasCallStack              -- ARG[0]+     , KnownDomain wdom wconf    -- ARG[1]+     , KnownDomain rdom rconf )  -- ARG[2]+  => Clock wdom                  -- ^ wclk, ARG[3]+  -> Clock rdom                  -- ^ rclk, ARG[4]+  -> Enable wdom                 -- ^ wen,  ARG[5]+  -> SNat n                      -- ^ sz,   ARG[6]+  -> Signal rdom Int             -- ^ rd,   ARG[7]+  -> Signal wdom Bool            -- ^ en,   ARG[8]+  -> Signal wdom Int             -- ^ wr,   ARG[9]+  -> Signal wdom a               -- ^ din,  ARG[10]   -> Signal rdom a"-    , "templateD" :+    , "template" : "// asyncRam begin-logic [~SIZE[~TYP[7]]-1:0] ~GENSYM[RAM][0] [0:~LIT[3]-1];~IF ~ISGATED[1] ~THEN-always @(posedge ~ARG[1][1]) begin : ~GENSYM[~COMPNAME_Ram][1]-  if (~ARG[5] & ~ARG[1][0]) begin-    ~SYM[0][~ARG[6]] <= ~TOBV[~ARG[7]][~TYP[7]];-  end-end~ELSE-always @(posedge ~ARG[1]) begin : ~SYM[1]-  if (~ARG[5]) begin-    ~SYM[0][~ARG[6]] <= ~TOBV[~ARG[7]][~TYP[7]];+logic [~SIZE[~TYP[10]]-1:0] ~GENSYM[RAM][0] [0:~LIT[6]-1];+always @(~IF~ACTIVEEDGE[Rising][1]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_Ram][1]+  if (~IF ~ISACTIVEENABLE[5] ~THEN ~ARG[5] & ~ELSE ~FI ~ARG[8]) begin+    ~SYM[0][~ARG[9]] <= ~TOBV[~ARG[10]][~TYP[10]];   end-end~FI+end -assign ~RESULT = ~FROMBV[~SYM[0][\\~ARG[4]\\]][~TYPO];+assign ~RESULT = ~FROMBV[~SYM[0][\\~ARG[7]\\]][~TYPO]; // asyncRam end"     }   }

@@ -1,27 +1,31 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.ROM.rom#"+    , "kind" : "Declaration"     , "type" :-"rom# :: KnownNat n      -- ARG[0]-      => Clock dom gated -- clk,  ARG[1]-      -> Vec n a         -- init, ARG[2]-      -> Signal dom Int  -- rd,   ARG[3]+"rom# :: ( KnownDomain dom        ARG[0]+         , KnownNat n    --       ARG[1]+         , Undefined a ) --       ARG[2]+      => Clock dom       -- clk,  ARG[3]+      => Enable dom      -- en,   ARG[4]+      -> Vec n a         -- init, ARG[5]+      -> Signal dom Int  -- rd,   ARG[6]       -> Signal dom a"-    , "templateD" :+    , "template" : "// rom begin-~SIGD[~GENSYM[ROM][0]][2];-assign ~SYM[0] = ~ARG[2];+~SIGD[~GENSYM[ROM][1]][5];+assign ~SYM[1] = ~LIT[5]; -logic [~SIZE[~TYPO]-1:0] ~GENSYM[~RESULT_q][1];~IF ~ISGATED[1] ~THEN-always @(posedge ~ARG[1][1]) begin : ~GENSYM[~COMPNAME_rom][2]-  if (~ARG[1][0]) begin-    ~SYM[1] <= ~SYM[0][~ARG[3]];+logic [~SIZE[~TYPO]-1:0] ~GENSYM[~RESULT_q][2];~IF ~ISACTIVEENABLE[4] ~THEN+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_rom][3]+  if (~ARG[4]) begin+    ~SYM[2] <= ~SYM[1][~ARG[6]];   end end~ELSE-always @(posedge ~ARG[1]) begin : ~SYM[2]-  ~SYM[1] <= ~SYM[0][~ARG[3]];+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~SYM[3]+  ~SYM[2] <= ~SYM[1][~ARG[6]]; end~FI -assign ~RESULT = ~FROMBV[~SYM[1]][~TYPO];+assign ~RESULT = ~FROMBV[~SYM[2]][~TYPO]; // rom end"     }   }

@@ -1,28 +1,31 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.ROM.File.romFile#"+    , "kind" : "Declaration"     , "type" :-"romFile# :: KnownNat m      -- ARG[0]-          => Clock clk gated -- clk,  ARG[1]-          -> SNat n          -- sz,   ARG[2]-          -> FilePath        -- file, ARG[3]-          -> Signal dom Int  -- rd,   ARG[4]+"romFile# :: ( KnownNat m             --       ARG[0]+             , KnownDomain dom )      --       ARG[1]+          => Clock dom                -- clk,  ARG[2]+          -> Enable dom               -- en,   ARG[3]+          -> SNat n                   -- sz,   ARG[4]+          -> FilePath                 -- file, ARG[5]+          -> Signal dom Int           -- rd,   ARG[6]           -> Signal dom (BitVector m)"-    , "templateD" :+    , "template" : "// romFile begin-~SIGDO[~GENSYM[ROM][0]] [0:~LIT[2]-1];+~SIGDO[~GENSYM[ROM][0]] [0:~LIT[4]-1];  initial begin-  $readmemb(~FILE[~LIT[3]],~SYM[0]);+  $readmemb(~FILE[~LIT[5]],~SYM[0]); end -~SIGDO[~GENSYM[~RESULT_q][1]];~IF ~ISGATED[1] ~THEN-always @(posedge ~ARG[1][1]) begin : ~GENSYM[~COMPNAME_romFile][2]-  if (~ARG[1][0]) begin-    ~SYM[1] <= ~SYM[0][~ARG[4]];+~SIGDO[~GENSYM[~RESULT_q][1]];~IF ~ISACTIVEENABLE[3] ~THEN+always @(~IF~ACTIVEEDGE[Rising][1]~THENposedge~ELSEnegedge~FI ~ARG[2]) begin : ~GENSYM[~COMPNAME_romFile][2]+  if (~ARG[3]) begin+    ~SYM[1] <= ~SYM[0][~ARG[6]];   end end~ELSE-always @(posedge ~ARG[1]) begin : ~SYM[2]-  ~SYM[1] <= ~SYM[0][~ARG[4]];+always @(~IF~ACTIVEEDGE[Rising][1]~THENposedge~ELSEnegedge~FI ~ARG[2]) begin : ~SYM[2]+  ~SYM[1] <= ~SYM[0][~ARG[6]]; end~FI  assign ~RESULT = ~SYM[1];

@@ -1,27 +1,60 @@ [ { "BlackBox" :     { "name" : "Clash.Explicit.Testbench.assert"+    , "kind" : "Declaration"     , "type" : "assert-  :: (Eq a,Show a)            -- (ARG[0],ARG[1])-  => Clock domain gated       -- ARG[2]-  -> Reset domain synchronous -- ARG[3]-  -> String                   -- ARG[4]-  -> Signal domain a          -- Checked value (ARG[5])-  -> Signal domain a          -- Expected value (ARG[6])-  -> Signal domain b          -- Return valued (ARG[7])-  -> Signal domain b"-    , "templateD" :+  :: (KnownDomain dom, Eq a, ShowX a)      -- (ARG[0], ARG[1], ARG[2])+  => Clock dom                             -- ARG[3]+  -> Reset dom                             -- ARG[4]+  -> String                                -- ARG[5]+  -> Signal dom a                          -- Checked value  (ARG[6])+  -> Signal dom a                          -- Expected value (ARG[7])+  -> Signal dom b                          -- Return valued  (ARG[8])+  -> Signal dom b"+    , "template" : "// assert begin // pragma translate_off-always @(posedge ~IF ~ISGATED[2] ~THEN ~ARG[2][1] ~ELSE ~ARG[2] ~FI~IF ~ISSYNC[3] ~THEN ~ELSE or negedge ~ARG[3]~FI) begin-  if (~ARG[5] !== ~ARG[6]) begin+always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin+  if (~ARG[6] !== ~ARG[7]) begin+    $display(\"@%0tns: %s, expected: %b, actual: %b\", $time, ~LIT[5], ~TOBV[~ARG[7]][~TYP[7]], ~TOBV[~ARG[6]][~TYP[6]]);+    $stop;+  end+end+// pragma translate_on+assign ~RESULT = ~ARG[8];+// assert end"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Explicit.Testbench.assertBitVector"+    , "kind" : "Declaration"+    , "type" :+"assertBitVector+  :: ( KnownDomain dom        --                 ARG[0]+     , KnownNat n )           --                 ARG[1]+  => Clock dom                --                 ARG[2]+  -> Reset dom                --                 ARG[3]+  -> String                   --                 ARG[4]+  -> Signal dom (BitVector n) -- Checked value  (ARG[5])+  -> Signal dom (BitVector n) -- Expected value (ARG[6])+  -> Signal dom b             -- Return valued  (ARG[7])+  -> Signal dom b"+    , "template" :+"// assertBitVector begin+// pragma translate_off+wire ~TYP[6] ~GENSYM[maskXor][0]  = ~ARG[6] ^ ~ARG[6];+wire ~TYP[6] ~GENSYM[checked][1]  = ~ARG[5] ^ ~SYM[0];+wire ~TYP[6] ~GENSYM[expected][2] = ~ARG[6] ^ ~SYM[0];++always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[2]) begin+  if (~SYM[1] !== ~SYM[2]) begin     $display(\"@%0tns: %s, expected: %b, actual: %b\", $time, ~LIT[4], ~TOBV[~ARG[6]][~TYP[6]], ~TOBV[~ARG[5]][~TYP[5]]);     $stop;   end end // pragma translate_on assign ~RESULT = ~ARG[7];-// assert end"+// assertBitVector end"     }   } ]

@@ -1,37 +0,0 @@-[ { "BlackBox" :-    { "name"      : "Clash.Intel.ClockGen.altpll"-    , "type"      :-"altpll-  :: SSymbol name               -- ARG[0]-  -> Clock  pllIn 'Source       -- ARG[1]-  -> Reset  pllIn 'Asynchronous -- ARG[2]-  -> (Clock pllOut 'Source, Signal pllOut Bool)"-    , "templateD" :-"// altpll begin-~NAME[0] ~GENSYM[altpll_inst][2]-(.inclk0 (~ARG[1])-,.areset (~ARG[2])-,.c0     (~RESULT[1])-,.locked (~RESULT[0]));-// altpll end"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Intel.ClockGen.alteraPll"-    , "type"      :-"alteraPll-  :: SSymbol name               -- ARG[0]-  -> Clock  pllIn 'Source       -- ARG[1]-  -> Reset  pllIn 'Asynchronous -- ARG[2]-  -> (Clock pllOut 'Source, Signal pllOut Bool)"-    , "templateD" :-"// alteraPll begin-~NAME[0] ~GENSYM[alteraPll_inst][2]-(.refclk   (~ARG[1])-,.rst      (~ARG[2])-,.outclk_0 (~RESULT[1])-,.locked   (~RESULT[0]));-// alteraPll end"-    }-  }-]

@@ -1,89 +1,48 @@ [ { "BlackBox" :     { "name" : "Clash.Intel.DDR.altddioIn"+    , "kind" : "Declaration"     , "type" : "altddioIn   :: ( HasCallStack               -- ARG[0]-     , fast ~ Dom n pFast         -- ARG[1]-     , slow ~ Dom n (2*pFast)     -- ARG[2]+     , KnownConfi~ fast domf      -- ARG[1]+     , KnownConfi~ slow doms      -- ARG[2]      , KnownNat m )               -- ARG[3]   => SSymbol deviceFamily         -- ARG[4]-  -> Clock slow gated             -- ARG[5]-  -> Reset slow synchronous       -- ARG[6]-  -> Signal fast (BitVector m)    -- ARG[7]+  -> Clock slow                   -- ARG[5]+  -> Reset slow                   -- ARG[6]+  -> Enable slow                  -- ARG[7]+  -> Signal fast (BitVector m)    -- ARG[8]   -> Signal slow (BitVector m,BitVector m)"-    , "templateD" :+    , "libraries" : ["altera_mf"]+    , "template" : "// altddioIn begin-~SIGD[~GENSYM[dataout_l][1]][7];-~SIGD[~GENSYM[dataout_h][2]][7];--altddio_in ~GENSYM[~COMPNAME_ALTDDIO_IN][7] (~IF ~ISSYNC[6] ~THEN-  .sclr (~ARG[6]),-  .aclr (1'b0),~ELSE-  .aclr (~ARG[6]),-  .sclr (1'b0),~FI-  .datain (~ARG[7]),~IF ~ISGATED[5] ~THEN-  .inclock (~ARG[5][1]),-  .inclocken (~ARG[5][0]),~ELSE-  .inclock (~ARG[5]),-  .inclocken (1'b1),~FI-  .dataout_h (~SYM[2]),-  .dataout_l (~SYM[1]),-  .aset (1'b0),-  .sset (1'b0));-defparam-  ~SYM[7].intended_device_family = ~LIT[4],-  ~SYM[7].invert_input_clocks = \"OFF\",-  ~SYM[7].lpm_hint = \"UNUSED\",-  ~SYM[7].lpm_type = \"altddio_in\",-  ~SYM[7].power_up_high = \"OFF\",-  ~SYM[7].width = ~SIZE[~TYP[7]];+~SIGD[~GENSYM[dataout_l][1]][8];+~SIGD[~GENSYM[dataout_h][2]][8]; +altddio_in+  #(+    .intended_device_family (~LIT[4]),+    .invert_input_clocks (\"OFF\"),+    .lpm_hint (\"UNUSED\"),+    .lpm_type (\"altddio_in\"),+    .power_up_high (\"OFF\"),+    .width (~SIZE[~TYP[8]])+  )+  ~GENSYM[~COMPNAME_ALTDDIO_IN][7] (~IF ~ISSYNC[2] ~THEN+    .sclr (~ARG[6]),+    .aclr (1'b0),~ELSE+    .aclr (~ARG[6]),+    .sclr (1'b0),~FI+    .datain (~ARG[8]),+    .inclock (~ARG[5]),+    .inclocken (~IF ~ISACTIVEENABLE[7] ~THEN~ARG[7]~ELSE1'b1,~FI),+    .dataout_h (~SYM[2]),+    .dataout_l (~SYM[1]),+    .aset (1'b0),+    .sset (1'b0)+  ); assign ~RESULT = {~SYM[1],~SYM[2]}; // altddioIn end"-    }-  }-, { "BlackBox" :-    { "name" : "Clash.Intel.DDR.altddioOut#"-    , "type" :-"altddioOut#-  :: ( HasCallStack             -- ARG[0]-     , fast ~ Dom n pFast       -- ARG[1]-     , slow ~ Dom n (2*pFast)   -- ARG[2]-     , KnownNat m )             -- ARG[3]-  => SSymbol deviceFamily       -- ARG[4]-  -> Clock slow gated           -- ARG[5]-  -> Reset slow synchronous     -- ARG[6]-  -> Signal slow (BitVector m)  -- ARG[7]-  -> Signal slow (BitVector m)  -- ARG[8]-  -> Signal fast (BitVector m)"-    , "templateD" :-"// altddioOut begin-altddio_out ~GENSYM[~COMPNAME_ALTDDIO_OUT][7] (~IF ~ISSYNC[6] ~THEN-  .sclr (~ARG[6]),-  .aclr (1'b0),~ELSE-  .aclr (~ARG[6]),-  .sclr (1'b0),~FI-  .datain_h (~ARG[7]),-  .datain_l (~ARG[8]),~IF ~ISGATED[5] ~THEN-  .outclock (~ARG[5][1]),-  .outclocken (~ARG[5][0]),~ELSE-  .outclock (~ARG[5]),-  .outclocken (1'b1),~FI-  .dataout (~RESULT),-  .aset (1'b0),-  .sset (1'b0),-  .oe (1'b1),-  .oe_out ());-defparam-  ~SYM[7].extend_oe_disable = \"OFF\",-  ~SYM[7].intended_device_family = ~LIT[4],-  ~SYM[7].invert_output = \"OFF\",-  ~SYM[7].lpm_hint = \"UNUSED\",-  ~SYM[7].lpm_type = \"altddio_out\",-  ~SYM[7].oe_reg = \"UNREGISTERED\",-  ~SYM[7].power_up_high = \"OFF\",-  ~SYM[7].width = ~SIZE[~TYPO];-// altddioOut end"     }   } ]

@@ -1,14 +1,15 @@ [ { "BlackBox" :     { "name" : "Clash.Prelude.ROM.asyncRom#"+    , "kind" : "Declaration"     , "type" : "asyncRom# :: KnownNat n -- ^ ARG[0]            => Vec n a    -- ^ ARG[1]            -> Int        -- ^ ARG[2]            -> a"-    , "templateD" :+    , "template" : "// asyncRom begin ~SIGD[~GENSYM[ROM][0]][1];-assign ~SYM[0] = ~ARG[1];+assign ~SYM[0] = ~LIT[1];  assign ~RESULT = ~FROMBV[~SYM[0][\\~ARG[2]\\]][~TYPO]; // asyncRom end"

@@ -1,12 +1,13 @@ [ { "BlackBox" :     { "name" : "Clash.Prelude.ROM.File.asyncRomFile#"+    , "kind" : "Declaration"     , "type" : "asyncRomFile :: KnownNat m -- ARG[0]               => SNat n     -- sz,   ARG[1]               -> FilePath   -- file, ARG[2]               -> Int        -- rd,   ARG[3]               -> BitVector m"-    , "templateD" :+    , "template" : "// asyncRomFile begin ~SIGDO[~GENSYM[ROM][0]] [0:~LIT[1]-1]; 

@@ -0,0 +1,34 @@+[ { "BlackBox" :+    { "name" : "Clash.Signal.BiSignal.writeToBiSignal#",+      "kind" : "Declaration",+      "type" :+"writeToBiSignal#+  :: HasCallStack                   -- ARG[0]+  => BiSignalIn ds d n              -- ARG[1]+  -> Signal d (Maybe (BitVector n)) -- ARG[2]+  -> Signal d Bool                  -- ARG[3]+  -> Signal d (BitVector n)         -- ARG[4]+  -> BiSignalOut ds d n",+      "template":+"// writeToBiSignal# begin+assign ~ARG[1] = (~ARG[3] == 1'b1) ? ~ARG[4] : {~SIZE[~TYP[1]] {1'bz}};+// writeToBiSignal# end"+    }+  }+, { "BlackBox" :+    { "name" : "Clash.Signal.BiSignal.readFromBiSignal#"+    , "workInfo" : "Never"+    , "kind" : "Declaration"+    , "type" :+"readFromBiSignal#+  :: ( HasCallStack    -- ARG[0]+     , KnownNat n)     -- ARG[1]+  => BiSignalIn ds d n -- ARG[2]+  -> Signal d (BitVector n)"+    , "template" :+"// readFromBiSignal begin+assign ~RESULT = ~ARG[2];+// readFromBiSignal end"+    }+  }+]

@@ -1,108 +1,104 @@ [ { "BlackBox" :     { "name" : "Clash.Signal.Internal.delay#"+    , "kind" : "Declaration"     , "type" : "delay#-  :: HasCallStack             -- ARG[0]-  => Clock domain gated       -- ARG[1]-  -> Signal clk a             -- ARG[2]+  :: ( KnownDomain dom        -- ARG[0]+     , Undefined a )          -- ARG[1]+  => Clock dom                -- ARG[2]+  -> Enable dom               -- ARG[3]+  -> a                        -- ARG[4]+  -> Signal clk a             -- ARG[5]   -> Signal clk a"-    , "templateD" :-"// register begin~IF ~ISGATED[1] ~THEN-always_ff @(posedge ~ARG[1][1]) begin : ~GENSYM[~COMPNAME_delay][0]-  if (~ARG[1][0]) begin-    ~RESULT <= ~ARG[2];+    , "template" :+"// delay begin,+~TYPO ~GENSYM[~RESULT_reg][0] ~IF ~ISINITDEFINED[0] ~THEN = ~CONST[4] ~ELSE ~FI;~IF ~ISACTIVEENABLE[3] ~THEN+always_ff @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[2]) begin : ~GENSYM[~RESULT_delay][1]+  if (~ARG[3]) begin+    ~SYM[0] <= ~ARG[5];   end end~ELSE-always_ff @(posedge ~ARG[1]) begin : ~SYM[0]-  ~RESULT <= ~ARG[2];+always_ff @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[2]) begin : ~SYM[1]+  ~SYM[0] <= ~ARG[5]; end~FI-// register end"+assign ~RESULT = ~SYM[0];+// delay end"     }   } , { "BlackBox" :     { "name" : "Clash.Signal.Internal.register#"+    , "kind" : "Declaration"     , "type" : "register#-  :: HasCallStack             -- ARG[0]-  => Clock domain gated       -- ARG[1]-  -> Reset domain synchronous -- ARG[2]-  -> a                        -- ARG[3]-  -> Signal clk a             -- ARG[4]+  :: ( KnownDomain dom        -- ARG[0]+     , Undefined a )          -- ARG[1]+  => Clock dom                -- ARG[2]+  -> Reset dom                -- ARG[3]+  -> Enable dom               -- ARG[4]+  -> a                        -- ARG[5] (powerup value)+  -> a                        -- ARG[6] (reset value)+  -> Signal clk a             -- ARG[7]   -> Signal clk a"-    , "templateD" :-"// register begin~IF ~ISGATED[1] ~THEN-always_ff @(posedge ~ARG[1][1]~IF ~ISSYNC[2] ~THEN ~ELSE or posedge ~ARG[2]~FI) begin : ~GENSYM[~COMPNAME_register][0]-  if (~ARG[2]) begin-    ~RESULT <= ~ARG[3];-  end else if (~ARG[1][0]) begin-    ~RESULT <= ~ARG[4];-  end-end~ELSE-always_ff @(posedge ~ARG[1]~IF ~ISSYNC[2] ~THEN ~ELSE or posedge ~ARG[2]~FI) begin : ~SYM[0]-  if (~ARG[2]) begin-    ~RESULT <= ~ARG[3];-  end else begin-    ~RESULT <= ~ARG[4];+    , "template" :+"// register begin+~TYPO ~GENSYM[~RESULT_reg][0] ~IF ~ISINITDEFINED[0] ~THEN = ~CONST[5] ~ELSE ~FI;+always_ff @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[2]~IF ~ISSYNC[0] ~THEN ~ELSE or ~IF ~ISACTIVEHIGH[0] ~THEN posedge ~ELSE negedge ~FI ~ARG[3]~FI) begin : ~GENSYM[~RESULT_register][1]+  if (~IF ~ISACTIVEHIGH[0] ~THEN ~ELSE ! ~FI~ARG[3]) begin+    ~SYM[0] <= ~CONST[6];+  end else ~IF ~ISACTIVEENABLE[4] ~THEN if (~ARG[4]) ~ELSE ~FI begin+    ~SYM[0] <= ~ARG[7];   end-end~FI+end+assign ~RESULT = ~SYM[0]; // register end"     }   } , { "BlackBox" :-    { "name" : "Clash.Signal.Internal.clockGate"-    , "type" :-"clockGate-  :: Clock domain gated -- ARG[0]-  -> Signal domain Bool -- ARG[1]-  -> Clcok domain 'Gated"-    , "templateD" :-"// clockGate begin~IF ~ISGATED[0] ~THEN-assign ~RESULT = {~ARG[0][1],~ARG[0][0] & ~ARG[1]};~ELSE-assign ~RESULT = {~ARG[0],~ARG[1]};~FI-// clockGate end"-    }-  }-, { "BlackBox" :     { "name" : "Clash.Signal.Internal.clockGen"+    , "workInfo" : "Always"+    , "kind" : "Declaration"+    , "warning" : "Clash.Signal.Internal.clockGen is not synthesizable!"     , "type" : "clockGen-  :: (domain ~ Dom nm period -- ARG[0]-     ,KnownSymbol nm         -- ARG[1]-     ,KnownNat period)       -- ARG[2]-  => Clock domain Source"-    , "templateD" :-"// pragma translate_off+  :: KnownDomain dom     -- ARG[0]+  => Clock dom"+    , "template" :+"// clockGen begin+// pragma translate_off // 1 = 0.1ps-localparam ~GENSYM[half_period][0] = (~LIT[2]0 / 2);+localparam ~GENSYM[half_period][0] = (~PERIOD[0]0 / 2); always begin-  ~RESULT = 0;-  #3000 forever begin+  ~RESULT = ~IF~ACTIVEEDGE[Rising][0]~THEN 0 ~ELSE 1 ~FI;+  #30000 forever begin     ~RESULT = ~ ~RESULT;     #~SYM[0];     ~RESULT = ~ ~RESULT;     #~SYM[0];   end end-// pragma translate_on"+// pragma translate_on+// clockGen end"     }   } , { "BlackBox" :-    { "name" : "Clash.Signal.Internal.tbClockGen"+    { "name" : "Clash.Explicit.Testbench.tbClockGen"+    , "workInfo" : "Always"+    , "kind" : "Declaration"+    , "warning" : "Clash.Signal.Internal.tbClockGen is not synthesizable!"     , "type" : "tbClockGen-  :: (domain ~ Dom nm period -- ARG[0]-     ,KnownSymbol nm         -- ARG[1]-     ,KnownNat period)       -- ARG[2]-  => Signal domain Bool      -- ARG[3]-  -> Clock domain Source"-    , "templateD" :-"// pragma translate_off+  :: KnownDomain dom     -- ARG[0]+  => Signal dom Bool      -- ARG[1]+  -> Clock dom"+    , "template" :+"// tbClockGen begin+// pragma translate_off // 1 = 0.1ps-localparam ~GENSYM[half_period][0] = (~LIT[2]0 / 2);+localparam ~GENSYM[half_period][0] = (~PERIOD[0]0 / 2); always begin-  ~RESULT = 0;-  #3000 forever begin-    if (~ ~ARG[3]) begin+  ~RESULT = ~IF~ACTIVEEDGE[Rising][0]~THEN 0 ~ELSE 1 ~FI;+  #30000 forever begin+    if (~ ~ARG[1]) begin       $finish;     end     ~RESULT = ~ ~RESULT;@@ -111,90 +107,32 @@     #~SYM[0];   end end-// pragma translate_on"+// pragma translate_on+// tbClockGen end"     }   } , { "BlackBox" :-    { "name" : "Clash.Signal.Internal.asyncResetGen"-    , "type" : "asyncResetGen :: Reset domain Asynchronous"-    , "templateD" :-"// pragma translate_off+    { "name" : "Clash.Signal.Internal.resetGenN"+    , "workInfo" : "Always"+    , "kind" : "Declaration"+    , "type" : "resetGenN :: (KnownDomain dom, 1 <= n) => SNat n -> Reset dom"+    , "template" :+"// resetGen begin+// pragma translate_off+~IF~ISSYNC[0]~THEN+localparam ~GENSYM[reset_period][1] = 29998 + (~LIT[2] * ~PERIOD[0]0); initial begin-  #1    ~RESULT = 1;-  #1999 ~RESULT = 0;-end-// pragma translate_on"-    }-  }-, { "BlackBox" :-    { "name" : "Clash.Signal.Internal.syncResetGen"-    , "type" : "asyncResetGen :: Reset domain Synchronous"-    , "templateD" :-"// pragma translate_off-localparam ~GENSYM[reset_period][1] = 2998 + ~LIT[1]0;+  #1 ~RESULT = ~IF ~ISACTIVEHIGH[0] ~THEN 1 ~ELSE 0 ~FI;+  #~SYM[1] ~RESULT = ~IF ~ISACTIVEHIGH[0] ~THEN 0 ~ELSE 1 ~FI;+end~ELSE+localparam ~SYM[1] = 30001 + ((~LIT[2] - 1) * ~PERIOD[0]0); initial begin-  #1 ~RESULT = 1;-  #~SYM[1] ~RESULT = 0;+  #1     ~RESULT = ~IF ~ISACTIVEHIGH[0] ~THEN 1 ~ELSE 0 ~FI;+  #~SYM[1] ~RESULT = ~IF ~ISACTIVEHIGH[0] ~THEN 0 ~ELSE 1 ~FI; end-// pragma translate_on"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Signal.Internal.unsafeFromAsyncReset"-    , "type" :-"unsafeFromAsyncReset :: Reset domain Asynchronous -> Signal domain Bool"-    , "templateE" : "~ARG[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Signal.Internal.unsafeToAsyncReset"-    , "type" :-"unsafeToAsyncReset :: Signal domain Bool -> Reset domain Asynchronous"-    , "templateE" : "~ARG[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Signal.Internal.fromSyncReset"-    , "type" :-"fromSyncReset :: Reset domain Synchronous -> Signal domain Bool"-    , "templateE" : "~ARG[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Signal.Internal.unsafeToSyncReset"-    , "type" :-"unsafeToSyncReset :: Signal domain Bool -> Reset domain Synchronous"-    , "templateE" : "~ARG[0]"-    }-  }-, { "Primitive" :-    { "name"      : "Clash.Signal.Internal.signal#"-    , "primType"  : "Function"-    }-  }-, { "Primitive" :-    { "name"      : "Clash.Signal.Internal.mapSignal#"-    , "primType"  : "Function"-    }-  }-, { "Primitive" :-    { "name"      : "Clash.Signal.Internal.appSignal#"-    , "primType"  : "Function"-    }-  }-, { "Primitive" :-    { "name"      : "Clash.Signal.Internal.foldr#"-    , "primType"  : "Function"-    }-  }-, { "Primitive" :-    { "name"      : "Clash.Signal.Internal.traverse#"-    , "primType"  : "Function"-    }-  }-, { "Primitive" :-    { "name"      : "Clash.Signal.Internal.joinSignal#"-    , "primType"  : "Function"+~FI+// pragma translate_on+// resetGen end"     }   } ]

@@ -1,40 +1,13 @@ [ { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.size#"-    , "type"      : "size# :: KnownNat n => BitVector n -> Int"-    , "templateE" : "~SIZE[~TYPO]'sd~LIT[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.maxIndex#"-    , "type"      : "maxIndex# :: KnownNat n => BitVector n -> Int"-    , "templateE" : "~SIZE[~TYPO]'sd~LIT[0] - ~SIZE[~TYPO]'sd1"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.++#"-    , "type"      : "(++#) :: KnownNat m => BitVector n -> BitVector m -> BitVector (n + m)"-    , "templateE" : "{~ARG[1],~ARG[2]}"-    }-  }-, { "BlackBox" :-    { "name" : "Clash.Sized.Internal.BitVector.index#"-    , "type" :-"index# :: KnownNat n  -- ARG[0]-        => BitVector n -- ARG[1]-        -> Int         -- ARG[2]-        -> Bit"-    , "templateE" : "~VAR[bv][1][~ARG[2]]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.replaceBit#"+    , "kind"      : "Declaration"     , "type" : "replaceBit# :: KnownNat n  -- ARG[0]              => BitVector n -- ARG[1]              -> Int         -- ARG[2]              -> Bit         -- ARG[3]              -> BitVector n"-    , "templateD" :+    , "template" : "// replaceBit start always_comb begin   ~RESULT = ~ARG[1];@@ -45,13 +18,15 @@   } , { "BlackBox" :     { "name" : "Clash.Sized.Internal.BitVector.setSlice#"+    , "workInfo" : "Never"+    , "kind" : "Declaration"     , "type" : "setSlice# :: BitVector (m + 1 + i) -- ARG[0]            -> SNat m                -- ARG[1]            -> SNat n                -- ARG[2]            -> BitVector (m + 1 - n) -- ARG[3]            -> BitVector (m + 1 + i)"-    , "templateD" :+    , "template" : "// setSlice begin always_comb begin   ~RESULT = ~ARG[0];@@ -61,22 +36,14 @@     }   } , { "BlackBox" :-    { "name" : "Clash.Sized.Internal.BitVector.slice#"-    , "type" :-"slice# :: BitVector (m + 1 + i) -- ARG[0]-        -> SNat m                -- ARG[1]-        -> SNat n                -- ARG[2]-        -> BitVector (m + 1 - n)"-    , "templateE" : "~VAR[bv][0][~LIT[1] : ~LIT[2]]"-    }-  }-, { "BlackBox" :     { "name" : "Clash.Sized.Internal.BitVector.split#"+    , "workInfo" : "Never"+    , "kind" : "Declaration"     , "type" : "split# :: KnownNat n        -- ARG[0]         => BitVector (m + n) -- ARG[1]         -> (BitVector m, BitVector n)"-    , "templateD" :+    , "template" : "// split begin assign ~RESULT = { ~VAR[bv][1][$high(~VAR[bv][1]) : ~LIT[0]]                  , ~VAR[bv][1][(~LIT[0]-1) : 0]@@ -85,156 +52,27 @@     }   } , { "BlackBox" :-    { "name" : "Clash.Sized.Internal.BitVector.msb#"-    , "type" :-"msb# :: KnownNat n  -- ARG[0]-      => BitVector n -- ARG[1]-      -> Bit"-    , "templateE" : "~IF ~LIT[0] ~THEN ~VAR[bv][1][~LIT[0]-1] ~ELSE 1'b0 ~FI"-    }-  }-, { "BlackBox" :-    { "name" : "Clash.Sized.Internal.BitVector.lsb#"-    , "type" :-"lsb# :: BitVector n -- ARG[0]-      -> Bit"-    , "templateE" : "~IF ~SIZE[~TYP[0]] ~THEN ~VAR[bv][0][0] ~ELSE 1'b0 ~FI"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.minBound#"-    , "type"      : "minBound# :: BitVector n"-    , "templateE" : "~SIZE[~TYPO]'d0"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.maxBound#"-    , "type"      : "maxBound# :: KnownNat n => BitVector n"-    , "templateE" : "{~LIT[0] {1'b1}}"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.+#"-    , "type"      : "(+#) :: KnownNat n => BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[1] + ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.-#"-    , "type"      : "(-#) :: KnownNat n => BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[1] - ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.*#"-    , "type"      : "(*#) :: KnownNat n => BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[1] * ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.negate#"-    , "type"      : "negate# :: KnownNat n => BitVector n -> BitVector n"-    , "templateE" : "-~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.fromInteger#"-    , "type"      : "fromInteger# :: KnownNat n => Integer -> BitVector n"-    , "templateE" : "$unsigned(~ARG[1][(~LIT[0]-1):0])"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.plus#"-    , "type"      : "plus# :: BitVector m -> BitVector n -> BitVector (Max m n + 1)"-    , "templateD" : "assign ~RESULT = ~ARG[0] + ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.minus#"-    , "type"      : "minus# :: (KnownNat m, KnownNat n) => BitVector m -> BitVector n -> BitVector (Max m n + 1)"-    , "templateD" : "assign ~RESULT = ~ARG[2] - ~ARG[3];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.times#"-    , "type"      : "times# :: KnownNat (m + n) => BitVector m -> BitVector n -> BitVector (m + n)"-    , "templateD" : "assign ~RESULT = ~ARG[0] * ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.quot#"-    , "type"      : "quot# :: BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[0] / ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.rem#"-    , "type"      : "rem# :: BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[0] % ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.and#"-    , "type"      : "and# :: BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[0] & ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.or#"-    , "type"      : "or# :: BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[0] | ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.xor#"-    , "type"      : "xor# :: BitVector n -> BitVector n -> BitVector n"-    , "templateE" : "~ARG[0] ^ ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.complement#"-    , "type"      : "complement# :: KnownNat n => BitVector n -> BitVector n"-    , "templateE" : "~ ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.shiftL#"-    , "type"      : "shiftL# :: KnownNat n => BitVector n -> Int -> BitVector n"-    , "templateE" : "~ARG[1] << ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.shiftR#"-    , "type"      : "shiftR# :: KnownNat n => BitVector n -> Int -> BitVector n"-    , "templateE" : "~ARG[1] >> ~ARG[2]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.rotateL#"+    , "kind"      : "Declaration"     , "type"      : "rotateL# :: KnownNat n => BitVector n -> Int -> BitVector n"-    , "templateD" :+    , "template"  : "// rotateL begin-logic [2*~LIT[0]-1:0] ~GENSYM[bv][0];-assign ~SYM[0] = {~ARG[1],~ARG[1]} << ~ARG[2];-assign ~RESULT = ~SYM[0][2*~LIT[0]-1 : ~LIT[0]];+logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[bv][0];+assign ~SYM[0] = {~ARG[1],~ARG[1]} << (~ARG[2] % ~SIZE[~TYPO]);+assign ~RESULT = ~SYM[0][2*~SIZE[~TYPO]-1 : ~SIZE[~TYPO]]; // rotateL end"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.BitVector.rotateR#"+    , "kind"      : "Declaration"     , "type"      : "rotateR# :: KnownNat n => BitVector n -> Int -> BitVector n"-    , "templateD" :+    , "template"  : "// rotateR begin-logic [2*~LIT[0]-1:0] ~GENSYM[bv][0];-assign ~SYM[0] = {~ARG[1],~ARG[1]} >> ~ARG[2];-assign ~RESULT = ~SYM[0][~LIT[0]-1 : 0];+logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[bv][0];+assign ~SYM[0] = {~ARG[1],~ARG[1]} >> (~ARG[2] % ~SIZE[~TYPO]);+assign ~RESULT = ~SYM[0][~SIZE[~TYPO]-1 : 0]; // rotateR end"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.BitVector.resize#"-    , "type"      : "resize# :: KnownNat m => BitVector n -> BitVector m"-    , "templateD" : "assign ~RESULT = $unsigned(~ARG[1]);"     }   } ]

@@ -1,105 +1,8 @@ [ { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.size#"-    , "type"      : "size# :: KnownNat n => Signed n -> Int"-    , "templateE" : "~SIZE[~TYPO]'sd~LIT[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.pack#"-    , "type"      : "pack# :: KnownNat n => Signed n -> BitVector n"-    , "templateE" : "$unsigned(~ARG[1])"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.unpack#"-    , "type"      : "unpack# :: KnownNat n => BitVector n -> Signed n"-    , "templateE" : "$signed(~ARG[1])"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.minBound#"-    , "type"      : "minBound# :: KnownNat n => Signed n"-    , "comment"   : "Generates incorrect SV for n=0"-    , "templateE" : "$signed({1'b1, {(~LIT[0]-1) {1'b0}}})"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.maxBound#"-    , "type"      : "maxBound# :: KnownNat n => Signed n"-    , "comment"   : "Generates incorrect SV for n=0"-    , "templateE" : "$signed({1'b0, {(~LIT[0]-1) {1'b1}}})"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.+#"-    , "type"      : "(+#) :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[1] + ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.-#"-    , "type"      : "(-#) :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[1] - ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.*#"-    , "type"      : "(*#) :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[1] * ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.negate#"-    , "type"      : "negate# :: KnownNat n => Signed n -> Signed n"-    , "templateE" : "-~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.abs#"-    , "type"      : "abs# :: KnownNat n => Signed n -> Signed n"-    , "templateE" : "(~ARG[1] < ~LIT[0]'sd0) ? -~ARG[1] : ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.fromInteger#"-    , "type"      : "fromInteger# :: KnownNat n => Integer -> Signed (n :: Nat)"-    , "templateE" : "$signed(~ARG[1][(~LIT[0]-1):0])"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.plus#"-    , "type"      : "plus# :: Signed m -> Signed n -> Signed (1 + Max m n)"-    , "templateD" : "assign ~RESULT = ~ARG[0] + ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.minus#"-    , "type"      : "minus# :: Signed m -> Signed n -> Signed (1 + Max m n)"-    , "templateD" : "assign ~RESULT = ~ARG[0] - ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.times#"-    , "type"      : "times# :: Signed m -> Signed n -> Signed (m + n)"-    , "templateD" : "assign ~RESULT = ~ARG[0] * ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.quot#"-    , "type"      : "quot# :: Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[0] / ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.rem#"-    , "type"      : "rem# :: Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[0] % ~ARG[1]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.div#"+    , "kind"      : "Declaration"     , "type"      : "div# :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateD" :+    , "template"  : "// divSigned begin // divide (rounds towards zero) ~SIGD[~GENSYM[quot_res][0]][1];@@ -112,8 +15,9 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.mod#"+    , "kind"      : "Declaration"     , "type"      : "mod# :: Signed n -> Signed n -> Signed n"-    , "templateD" :+    , "template"  : "// modSigned begin // remainder ~SIGD[~GENSYM[rem_res][0]][0];@@ -127,85 +31,27 @@     }   } , { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.and#"-    , "type"      : "and# :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[1] & ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.or#"-    , "type"      : "or# :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[1] | ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.xor#"-    , "type"      : "xor# :: KnownNat n => Signed n -> Signed n -> Signed n"-    , "templateE" : "~ARG[1] ^ ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.complement#"-    , "type"      : "complement# :: KnownNat n => Signed n -> Signed n"-    , "templateE" : "~ ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.shiftL#"-    , "type"      : "shiftL# :: KnownNat n => Signed n -> Int -> Signed n"-    , "templateE" : "~ARG[1] <<< ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.shiftR#"-    , "type"      : "shiftR# :: KnownNat n => Signed n -> Int -> Signed n"-    , "templateE" : "~ARG[1] >>> ~ARG[2]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.rotateL#"+    , "kind"      : "Declaration"     , "type"      : "rotateL# :: KnownNat n => Signed n -> Int -> Signed n"-    , "templateD" :+    , "template"  : "// rotateL begin-logic [2*~LIT[0]-1:0] ~GENSYM[s][0];-assign ~SYM[0] = {~ARG[1],~ARG[1]} << ~ARG[2];-assign ~RESULT = $signed(~SYM[0][~LIT[0]-1 : 0]);+logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[s][0];+assign ~SYM[0] = {~ARG[1],~ARG[1]} << (~ARG[2] % ~SIZE[~TYPO]);+assign ~RESULT = $signed(~SYM[0][2*~SIZE[~TYPO]-1 : ~SIZE[~TYPO]]); // rotateL end"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Signed.rotateR#"+    , "kind"      : "Declaration"     , "type"      : "rotateR# :: KnownNat n => Signed n -> Int -> Signed n"-    , "templateD" :+    , "template"  : "// rotateR begin-logic [2*~LIT[0]-1:0] ~GENSYM[s][0];-assign ~SYM[0] = {~ARG[1],~ARG[1]} >> ~ARG[2];-assign ~RESULT = $signed(~SYM[0][~LIT[0]-1 : 0]);+logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[s][0];+assign ~SYM[0] = {~ARG[1],~ARG[1]} >> (~ARG[2] % ~SIZE[~TYPO]);+assign ~RESULT = $signed(~SYM[0][~SIZE[~TYPO]-1 : 0]); // rotateR end"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.resize#"-    , "type"      : "resize# :: (KnownNat n, KnownNat m) => Signed n -> Signed m"-    , "comment"   : "Back-end should only use this code when the result is smaller than the argument"-    , "templateD" :-"// resize begin-~GENERATE-  if (~LIT[1] < ~LIT[0]) begin-    // truncate, sign preserving-    assign ~RESULT = $signed({~VAR[s][2][~LIT[0]-1],~VAR[s][2][(~LIT[1]-2):0]});-  end else begin-    // sign-extend-    assign ~RESULT = $signed(~VAR[s][2]);-  end-~ENDGENERATE-// resize end"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Signed.truncateB#"-    , "type"      : "truncateB# :: KnownNat m => Signed (n + m) -> Signed m"-    , "templateD" : "assign ~RESULT = $signed(~ARG[1]);"     }   } ]

@@ -1,155 +1,25 @@ [ { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.size#"-    , "type"      : "size# :: KnownNat n => Unsigned n -> Int"-    , "templateE" : "~SIZE[~TYPO]'sd~LIT[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.pack#"-    , "type"      : "pack# :: Unsigned n -> BitVector n"-    , "templateE" : "~ARG[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.unpack#"-    , "type"      : "unpack# :: BitVector n -> Unsigned n"-    , "templateE" : "~ARG[0]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.minBound#"-    , "type"      : "minBound# :: Unsigned n"-    , "templateE" : "~SIZE[~TYPO]'d0"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.maxBound#"-    , "type"      : "maxBound# :: KnownNat n => Unsigned n"-    , "templateE" : "{~LIT[0] {1'b1}}"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.+#"-    , "type"      : "(+#) :: KnownNat n => Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[1] + ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.-#"-    , "type"      : "(-#) :: KnownNat n => Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[1] - ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.*#"-    , "type"      : "(*#) :: KnownNat n => Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[1] * ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.negate#"-    , "type"      : "negate# :: KnownNat n => Unsigned n -> Unsigned n"-    , "templateE" : "- ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.fromInteger#"-    , "type"      : "fromInteger# :: KnownNat n => Integer -> Unsigned n"-    , "templateE" : "$unsigned(~ARG[1][(~LIT[0]-1):0])"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.plus#"-    , "type"      : "plus# :: Unsigned m -> Unsigned n -> Unsigned (1 + Max m n)"-    , "templateD" : "assign ~RESULT = ~ARG[0] + ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.minus#"-    , "type"      : "minus# :: (KnownNat m, KnownNat n) => Unsigned m -> Unsigned n -> Unsigned (1 + Max m n)"-    , "templateD" : "assign ~RESULT = ~ARG[2] - ~ARG[3];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.times#"-    , "type"      : "times# :: Unsigned m -> Unsigned n -> Unsigned (m + n)"-    , "templateD" : "assign ~RESULT = ~ARG[0] * ~ARG[1];"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.quot#"-    , "type"      : "quot# :: Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[0] / ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.rem#"-    , "type"      : "rem# :: Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[0] % ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.and#"-    , "type"      : "and# :: Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[0] & ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.or#"-    , "type"      : "or# :: Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[0] | ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.xor#"-    , "type"      : "xor# :: Unsigned n -> Unsigned n -> Unsigned n"-    , "templateE" : "~ARG[0] ^ ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.complement#"-    , "type"      : "complement# :: KnownNat n => Unsigned n -> Unsigned n"-    , "templateE" : "~ ~ARG[1]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.shiftL#"-    , "type"      : "shiftL# :: KnownNat n => Unsigned n -> Int -> Unsigned n"-    , "templateE" : "~ARG[1] << ~ARG[2]"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.shiftR#"-    , "type"      : "shiftR# :: KnownNat n => Unsigned n -> Int -> Unsigned n"-    , "templateE" : "~ARG[1] >> ~ARG[2]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.rotateL#"+    , "kind"      : "Declaration"     , "type"      : "rotateL# :: KnownNat n => Unsigned n -> Int -> Unsigned n"-    , "templateD" :+    , "template"  : "// rotateL begin-logic [2*~LIT[0]-1:0] ~GENSYM[u][0];-assign ~SYM[0] = {~ARG[1],~ARG[1]} << ~ARG[2];-assign ~RESULT = ~SYM[0][~LIT[0]-1 : 0];+logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[u][0];+assign ~SYM[0] = {~ARG[1],~ARG[1]} << (~ARG[2] % ~SIZE[~TYPO]);+assign ~RESULT = ~SYM[0][2*~SIZE[~TYPO]-1 : ~SIZE[~TYPO]]; // rotateL end"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Internal.Unsigned.rotateR#"+    , "kind"      : "Declaration"     , "type"      : "rotateR# :: KnownNat n => Unsigned n -> Int -> Unsigned n"-    , "templateD" :+    , "template"  : "// rotateR begin-logic [2*~LIT[0]-1:0] ~GENSYM[u][0];-assign ~SYM[0] = {~ARG[1],~ARG[1]} >> ~ARG[2];-assign ~RESULT = ~SYM[0][~LIT[0]-1 : 0];+logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[u][0];+assign ~SYM[0] = {~ARG[1],~ARG[1]} >> (~ARG[2] % ~SIZE[~TYPO]);+assign ~RESULT = ~SYM[0][~SIZE[~TYPO]-1 : 0]; // rotateR end"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Internal.Unsigned.resize#"-    , "type"      : "resize# :: KnownNat m => Unsigned n -> Unsigned m"-    , "templateD" : "assign ~RESULT = $unsigned(~ARG[1]);"     }   } ]

@@ -1,19 +1,25 @@ [ { "BlackBox" :     { "name"      : "Clash.Sized.RTree.treplicate"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "replicate :: SNat d -> a -> RTree d a"-    , "templateE" : "'{(2**~LIT[0]) {~TOBV[~ARG[1]][~TYP[1]]}}"+    , "template"  : "'{(2**~LIT[0]) {~TOBV[~ARG[1]][~TYP[1]]}}"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.RTree.textract"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "textract :: RTree 0 a -> a"-    , "templateE" : "~FROMBV[~VAR[tree][0][\\0\\]][~TYPO]"+    , "template"  : "~FROMBV[~VAR[tree][0][\\0\\]][~TYPO]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.RTree.tsplit"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "tsplit:: RTree (d+1) a -> (RTree d a,RTree d a)"-    , "templateE" : "~TOBV[~VAR[tree][0]][~TYP[0]]"+    , "template"  : "~TOBV[~VAR[tree][0]][~TYP[0]]"     }   } ]

@@ -1,29 +1,39 @@ [ { "BlackBox" :     { "name"      : "Clash.Sized.Vector.head"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "head :: Vec (n + 1) a -> a"-    , "templateE" : "~FROMBV[~VAR[vec][0][\\0\\]][~TYPO]"+    , "template"  : "~FROMBV[~VAR[vec][0][\\0\\]][~TYPO]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.tail"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "tail :: Vec (n + 1) a -> Vec n a"-    , "templateE" : "~VAR[vec][0][1 : $high(~VAR[vec][0])]"+    , "template"  : "~VAR[vec][0][1 : $high(~VAR[vec][0])]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.last"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "Vec (n + 1) a -> a"-    , "templateE" : "~FROMBV[~VAR[vec][0][\\$high(~VAR[vec][0])\\]][~TYPO]"+    , "template"  : "~FROMBV[~VAR[vec][0][\\$high(~VAR[vec][0])\\]][~TYPO]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.init"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "Vec (n + 1) a -> Vec n a"-    , "templateE" : "~VAR[vec][0][0 : $high(~VAR[vec][0]) - 1]"+    , "template"  : "~VAR[vec][0][0 : $high(~VAR[vec][0]) - 1]"     }   } , { "BlackBox" :     { "name" : "Clash.Sized.Vector.select"+    , "workInfo"  : "Never"+    , "kind" : "Declaration"     , "type" : "select :: (CmpNat (i + s) (s * n) ~ GT) -- ARG[0]         => SNat f                        -- ARG[1]@@ -31,7 +41,7 @@         -> SNat n                        -- ARG[3]         -> Vec i a                       -- ARG[4]         -> Vec n a"-    , "templateD" :+    , "template" : "// select begin genvar ~GENSYM[n][1]; ~GENERATE@@ -44,14 +54,18 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.++"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "(++) :: Vec n a -> Vec m a -> Vec (n + m) a"-    , "templateE" : "~FROMBV[{~TOBV[~ARG[0]][~TYP[0]],~TOBV[~ARG[1]][~TYP[1]]}][~TYPO]"+    , "template"  : "~FROMBV[{~TOBV[~ARG[0]][~TYP[0]],~TOBV[~ARG[1]][~TYP[1]]}][~TYPO]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.concat"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "concat :: Vec n (Vec m a) -> Vec (n * m) a"-    , "templateD" :+    , "template"  : "// concat begin genvar ~GENSYM[n][1]; ~GENERATE@@ -64,8 +78,10 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.splitAt"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "splitAt :: SNat m -> Vec (m + n) a -> (Vec m a, Vec n a)"-    , "templateD" :+    , "template"  : "// splitAt begin~IF~LENGTH[~TYPO]~THEN assign ~RESULT = ~ARG[1];~ELSE logic [0:~LENGTH[~TYP[1]]-1] [0:~SIZE[~TYPEL[~TYP[1]]]-1] ~GENSYM[vec][0];@@ -84,13 +100,15 @@   } , { "BlackBox" :     { "name" : "Clash.Sized.Vector.unconcat"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type" :  "unconcat :: KnownNat n     -- ARG[0]            => SNat m         -- ARG[1]            -> Vec (n * m) a  -- ARG[2]            -> Vec n (Vec m a)"-    , "templateD" :-"// unconcat begin+    , "template" :+"// unconcat begin~DEVNULL[~ARG[0]] genvar ~GENSYM[n][1]; ~GENERATE   for (~SYM[1] = 0; ~SYM[1] < $size(~RESULT); ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[unconcat][2]@@ -102,8 +120,10 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.map"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "map :: (a -> b) -> Vec n a -> Vec n b"-    , "templateD" :+    , "template" : "// map begin genvar ~GENSYM[n][1]; ~GENERATE@@ -123,14 +143,16 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.imap"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "imap :: KnownNat n => (Index n -> a -> b) -> Vec n a -> Vec n b"-    , "templateD" :+    , "template"  : "// imap begin genvar ~GENSYM[n][1]; ~GENERATE for (~SYM[1]=0; ~SYM[1] < $size(~RESULT); ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[imap][2]   ~INDEXTYPE[~LIT[0]] ~GENSYM[i][3];-  assign ~SYM[3] = ~LENGTH[~TYPO] - 1 - ~SYM[1];~IF~SIZE[~TYP[2]]~THEN+  assign ~SYM[3] = ~SYM[1];~IF~SIZE[~TYP[2]]~THEN   ~TYPEL[~TYP[2]] ~GENSYM[imap_in][4];   assign ~SYM[4] = ~FROMBV[~VAR[vec][2][\\~SYM[1]\\]][~TYPEL[~TYP[2]]];~ELSE ~FI   ~TYPEL[~TYPO] ~GENSYM[imap_out][5];@@ -147,14 +169,16 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.imap_go"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "imap_go :: Index n -> (Index n -> a -> b) -> Vec m a -> Vec m b"-    , "templateD" :+    , "template"  : "// imap begin genvar ~GENSYM[n][1]; ~GENERATE for (~SYM[1]=0; ~SYM[1] < $size(~RESULT); ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[imap][2]   ~TYP[0] ~GENSYM[i][3];-  assign ~SYM[3] = ~LENGTH[~TYPO] - 1 - ~SYM[1] + ~ARG[0];~IF~SIZE[~TYP[2]]~THEN+  assign ~SYM[3] = ~SYM[1] + ~ARG[0];~IF~SIZE[~TYP[2]]~THEN   ~TYPEL[~TYP[2]] ~GENSYM[imap_in][4];   assign ~SYM[4] = ~FROMBV[~VAR[vec][2][\\~SYM[1]\\]][~TYPEL[~TYP[2]]];~ELSE ~FI   ~TYPEL[~TYPO] ~GENSYM[imap_out][5];@@ -171,8 +195,10 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.zipWith"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "zipWith :: (a -> b -> c) -> Vec n a -> Vec n b -> Vec n c"-    , "templateD" :+    , "template"  : "// zipWith begin genvar ~GENSYM[n][2]; ~GENERATE@@ -195,8 +221,10 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.foldr"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "foldr :: (a -> b -> b) -> b -> Vec n a -> b"-    , "templateD" :+    , "template"  : "// foldr start~IF ~LENGTH[~TYP[2]] ~THEN ~SIGDO[~GENSYM[intermediate][0]] [0:~LENGTH[~TYP[2]]]; assign ~SYM[0][~LENGTH[~TYP[2]]] = ~ARG[1];@@ -222,23 +250,26 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.fold"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "fold :: (a -> a -> a) -> Vec (n+1) a -> a"     , "comment"   : "THIS ONLY WORKS FOR POWER OF TWO LENGTH VECTORS"-    , "imports"   : ["~INCLUDENAME.inc"]-    , "include" :-      { "name" : "depth2Index"-      , "extension" : "inc"-      , "content" :+    , "imports"   : ["~INCLUDENAME[0].inc"]+    , "includes" :+      [ { "name" : "depth2Index"+        , "extension" : "inc"+        , "template" : "// given a level and a depth, calculate the corresponding index into the // intermediate array-function integer ~INCLUDENAME;+function integer ~INCLUDENAME[0];   input integer levels;   input integer depth; -  ~INCLUDENAME = (2 ** levels) - (2 ** depth);+  ~INCLUDENAME[0] = (2 ** levels) - (2 ** depth); endfunction"-      }-    , "templateD" :+        }+      ]+    , "template" : "// fold begin // put flat input array into the first half of the intermediate array ~SIGDO[~GENSYM[intermediate][0]] [0:(2*~LENGTH[~TYP[1]])-2];@@ -252,12 +283,12 @@ genvar ~GENSYM[i][6]; ~GENERATE if (~SYM[4] != 0) begin : ~GENSYM[make_tree][7]-  for (~SYM[5] = (~SYM[4] - 1); ~SYM[5] >= 0; ~SYM[5]=~SYM[5]-1) begin : tree_depth-    for (~SYM[6] = 0; ~SYM[6] < (2**~SYM[5]); ~SYM[6] = ~SYM[6]+1) begin : tree_depth_loop+  for (~SYM[5] = ~SYM[4]; ~SYM[5] > 0; ~SYM[5]=~SYM[5]-1) begin : tree_depth+    for (~SYM[6] = 0; ~SYM[6] < (2**(~SYM[5]-1)); ~SYM[6] = ~SYM[6]+1) begin : tree_depth_loop     ~INST 0-      ~OUTPUT <= ~SYM[0][~INCLUDENAME(~SYM[4]+1,~SYM[5]+1)+~SYM[6]]~ ~TYPO~-      ~INPUT  <= ~SYM[0][~INCLUDENAME(~SYM[4]+1,~SYM[5]+2)+(2*~SYM[6])]~ ~TYPO~-      ~INPUT  <= ~SYM[0][~INCLUDENAME(~SYM[4]+1,~SYM[5]+2)+(2*~SYM[6])+1]~ ~TYPO~+      ~OUTPUT <= ~SYM[0][~INCLUDENAME[0](~SYM[4]+1,~SYM[5])+~SYM[6]]~ ~TYPO~+      ~INPUT  <= ~SYM[0][~INCLUDENAME[0](~SYM[4]+1,~SYM[5]+1)+(2*~SYM[6])]~ ~TYPO~+      ~INPUT  <= ~SYM[0][~INCLUDENAME[0](~SYM[4]+1,~SYM[5]+1)+(2*~SYM[6])+1]~ ~TYPO~     ~INST     end   end@@ -271,14 +302,16 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.index_int"-    , "type"      : "index_integer :: KnownNat n => Vec n a -> Int -> a"-    , "templateE" : "~FROMBV[~VAR[vec][1][\\~ARG[2]\\]][~TYPO]"+    , "kind"      : "Expression"+    , "type"      : "index_int :: KnownNat n => Vec n a -> Int -> a"+    , "template"  : "~IF~SIZE[~TYP[1]]~THEN~FROMBV[~VAR[vec][1][\\~ARG[2]\\]][~TYPO]~ELSE~ERRORO~FI"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.replace_int"+    , "kind"      : "Declaration"     , "type"      : "replace_int :: KnownNat n => Vec n a -> Int -> a -> Vec n a"-    , "templateD" :+    , "template" : "// replaceVec start always_comb begin   ~RESULT = ~ARG[1];@@ -288,27 +321,19 @@     }   } , { "BlackBox" :-    { "name"      : "Clash.Sized.Vector.maxIndex"-    , "type"      : "maxIndex :: KnownNat n => Vec n a -> Int"-    , "templateE" : "~SIZE[~TYPO]'sd~LIT[0] - ~SIZE[~TYPO]'sd1"-    }-  }-, { "BlackBox" :-    { "name"      : "Clash.Sized.Vector.length"-    , "type"      : "length :: KnownNat n => Vec n a -> Int"-    , "templateE" : "~SIZE[~TYPO]'sd~LIT[0]"-    }-  }-, { "BlackBox" :     { "name"      : "Clash.Sized.Vector.replicate"+    , "workInfo"  : "Never"+    , "kind"      : "Expression"     , "type"      : "replicate :: SNat n -> a -> Vec n a"-    , "templateE" : "'{~LIT[0] {~TOBV[~ARG[1]][~TYP[1]]}}"+    , "template"  : "'{~LIT[0] {~TOBV[~ARG[1]][~TYP[1]]}}"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.transpose"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "transpose :: KnownNat n => Vec m (Vec n a) -> Vec n (Vec m a)"-    , "templateD" :+    , "template"  : "// transpose begin genvar ~GENSYM[row_index][1]; genvar ~GENSYM[col_index][2];@@ -325,8 +350,10 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.reverse"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "reverse :: Vec n a -> Vec n a"-    , "templateD" :+    , "template"  : "// reverse begin genvar ~GENSYM[n][1]; ~GENERATE@@ -338,33 +365,33 @@     }   } , { "BlackBox" :-    { "name"      : "Clash.Sized.Vector.lazyV"-    , "type"      : "lazyV :: KnownNat n => Vec n a -> Vec n a"-    , "templateE" : "~ARG[1]"-    }-  }-, { "BlackBox" :     { "name" : "Clash.Sized.Vector.concatBitVector#"+    , "workInfo"  : "Never"+    , "kind" : "Expression"     , "type" : "concatBitVector# :: (KnownNat n,KnownNat m) -- (ARG[0],ARG[1])                   => Vec n (BitVector m)     -- ARG[2]                   -> BitVector (n * m)"-    , "templateE" : "~TOBV[~ARG[2]][~TYP[2]]"+    , "template" : "~TOBV[~ARG[2]][~TYP[2]]"     }   } , { "BlackBox" :     { "name" : "Clash.Sized.Vector.unconcatBitVector#"+    , "workInfo"  : "Never"+    , "kind" : "Expression"     , "type" : "unconcatBitVector# :: (KnownNat n, KnownNat m) -- (ARG[0],ARG[1])                     => BitVector (n * m)        -- ARG[2]                     -> Vec n (BitVector m)"-    , "templateE" : "~FROMBV[~ARG[2]][~TYPO]"+    , "template" : "~FROMBV[~ARG[2]][~TYPO]"     }   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.rotateLeftS"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "rotateLeftS :: KnownNat n => Vec n a -> SNat d -> Vec n a"-    , "templateD" :+    , "template"  : "// rotateLeftS begin localparam ~GENSYM[shift_amount][2] = ~LIT[2] % ~LIT[0]; @@ -381,8 +408,10 @@   } , { "BlackBox" :     { "name"      : "Clash.Sized.Vector.rotateRightS"+    , "workInfo"  : "Never"+    , "kind"      : "Declaration"     , "type"      : "rotateRightS :: KnownNat n => Vec n a -> SNat d -> Vec n a"-    , "templateD" :+    , "template"  : "// rotateRightS begin localparam ~GENSYM[shift_amount][2] = ~LIT[2] % ~LIT[0];