clash-lib-1.0.0: prims/systemverilog/Clash_Signal_BiSignal.json

[ { "BlackBox" :
    { "name" : "Clash.Signal.BiSignal.writeToBiSignal#",
      "kind" : "Declaration",
      "type" :
"writeToBiSignal#
  :: HasCallStack                   -- ARG[0]
  => BiSignalIn ds d n              -- ARG[1]
  -> Signal d (Maybe (BitVector n)) -- ARG[2]
  -> Signal d Bool                  -- ARG[3]
  -> Signal d (BitVector n)         -- ARG[4]
  -> BiSignalOut ds d n",
      "template":
"// writeToBiSignal# begin
assign ~ARG[1] = (~ARG[3] == 1'b1) ? ~ARG[4] : {~SIZE[~TYP[1]] {1'bz}};
// writeToBiSignal# end"
    }
  }
, { "BlackBox" :
    { "name" : "Clash.Signal.BiSignal.readFromBiSignal#"
    , "workInfo" : "Never"
    , "kind" : "Declaration"
    , "type" :
"readFromBiSignal#
  :: ( HasCallStack    -- ARG[0]
     , KnownNat n)     -- ARG[1]
  => BiSignalIn ds d n -- ARG[2]
  -> Signal d (BitVector n)"
    , "template" :
"// readFromBiSignal begin
assign ~RESULT = ~ARG[2];
// readFromBiSignal end"
    }
  }
]