clash-lib-1.4.0: prims/systemverilog/Clash_Sized_Internal_Unsigned.primitives

[ { "BlackBox" :
    { "name"      : "Clash.Sized.Internal.Unsigned.rotateL#"
    , "kind"      : "Declaration"
    , "type"      : "rotateL# :: KnownNat n => Unsigned n -> Int -> Unsigned n"
    , "template"  :
"// rotateL begin
logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[u][0];
assign ~SYM[0] = {~ARG[1],~ARG[1]} << (~ARG[2] % ~SIZE[~TYPO]);
assign ~RESULT = ~SYM[0][2*~SIZE[~TYPO]-1 : ~SIZE[~TYPO]];
// rotateL end"
    }
  }
, { "BlackBox" :
    { "name"      : "Clash.Sized.Internal.Unsigned.rotateR#"
    , "kind"      : "Declaration"
    , "type"      : "rotateR# :: KnownNat n => Unsigned n -> Int -> Unsigned n"
    , "template"  :
"// rotateR begin
logic [2*~SIZE[~TYPO]-1:0] ~GENSYM[u][0];
assign ~SYM[0] = {~ARG[1],~ARG[1]} >> (~ARG[2] % ~SIZE[~TYPO]);
assign ~RESULT = ~SYM[0][~SIZE[~TYPO]-1 : 0];
// rotateR end"
    }
  }
]