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clash-lib-1.10.0: prims/systemverilog/Clash_Explicit_ROM.primitives.yaml

- BlackBox:
    name: Clash.Explicit.ROM.rom#
    kind: Declaration
    type: |-
      rom# :: ( KnownDomain dom        ARG[0]
               , KnownNat n    --       ARG[1]
               , NFDataX a )   --       ARG[2]
            => Clock dom       -- clk,  ARG[3]
            => Enable dom      -- en,   ARG[4]
            -> Vec n a         -- init, ARG[5]
            -> Signal dom Int  -- rd,   ARG[6]
            -> Signal dom a
    template: |-
      // rom begin
      ~SIGD[~GENSYM[ROM][1]][5];
      assign ~SYM[1] = ~LIT[5];

      logic [~SIZE[~TYPO]-1:0] ~GENSYM[~RESULT_q][2];~IF ~ISACTIVEENABLE[4] ~THEN
      always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~GENSYM[~COMPNAME_rom][3]
        if (~ARG[4]) begin
          ~SYM[2] <= ~SYM[1][~ARG[6]];
        end
      end~ELSE
      always @(~IF~ACTIVEEDGE[Rising][0]~THENposedge~ELSEnegedge~FI ~ARG[3]) begin : ~SYM[3]
        ~SYM[2] <= ~SYM[1][~ARG[6]];
      end~FI

      assign ~RESULT = ~FROMBV[~SYM[2]][~TYPO];
      // rom end