clash-lib-0.99: prims/systemverilog/Clash_Prelude_ROM.json

[ { "BlackBox" :
    { "name" : "Clash.Prelude.ROM.asyncRom#"
    , "type" :
"asyncRom# :: KnownNat n -- ^ ARG[0]
           => Vec n a    -- ^ ARG[1]
           -> Int        -- ^ ARG[2]
           -> a"
    , "templateD" :
"// asyncRom begin
~SIGD[~GENSYM[ROM][0]][1];
assign ~SYM[0] = ~ARG[1];

assign ~RESULT = ~FROMBV[~SYM[0][\\~ARG[2]\\]][~TYPO];
// asyncRom end"
    }
  }
]