packages feed

hdis86 (empty) → 0.1

raw patch · 30 files changed

+9036/−0 lines, 30 filesdep +basedep +bytestringdep +containerssetup-changed

Dependencies added: base, bytestring, containers

Files

+ Hdis86.hs view
@@ -0,0 +1,10 @@+-- | Interface to the @udis86@ disassembler.+--+-- Exports the simplest, most high-level interface.+module Hdis86+  ( module Hdis86.Types+  , module Hdis86.Pure+  ) where++import Hdis86.Types+import Hdis86.Pure
+ Hdis86/C.hsc view
@@ -0,0 +1,205 @@+{-# LANGUAGE+    ForeignFunctionInterface+  , EmptyDataDecls #-}++-- | Bare import of the @udis86@ C library.+--+-- This module is not recommended for most users. What you see is what you get.+-- The modules @'Hdis86.IO'@ and @'Hdis86.Pure'@ provide a more Haskell-friendly+-- interface to the same functionality.+--+-- If you want to use this module, see the @udis86@ documentation: <http://udis86.sourceforge.net>+--+-- Instruction opcodes are not enumerated here. You can convert between the+-- C-level integer codes and the type @'Hdis86.Types.Opcode'@ using the latter's+-- @'Enum'@ instance.++module Hdis86.C where++import Foreign+import Foreign.C+import Control.Monad ( liftM2 )++#include <udis86.h>++-- * The type @ud_t@++-- | Just a pointer tag, with no Haskell representation.+data UD_t++sizeof_ud_t :: Int+sizeof_ud_t = (#size ud_t)++-- * Callbacks++type InputHook = IO CInt++eoi :: CInt+eoi = (#const UD_EOI)++foreign import ccall "wrapper"+  wrap_InputHook :: InputHook -> IO (FunPtr InputHook)++type Translator = Ptr UD_t -> IO ()++foreign import ccall "wrapper"+  wrap_Translator :: Translator -> IO (FunPtr Translator)++-- * Imported functions++foreign import ccall "ud_init"+  init :: Ptr UD_t -> IO ()++foreign import ccall "ud_set_input_hook"+  set_input_hook :: Ptr UD_t -> FunPtr InputHook -> IO ()++foreign import ccall "ud_set_input_buffer"+  set_input_buffer :: Ptr UD_t -> Ptr CChar -> CSize -> IO ()++foreign import ccall "ud_set_input_file"+  set_input_file :: Ptr UD_t -> Ptr CFile -> IO ()++foreign import ccall "ud_set_mode"+  set_mode :: Ptr UD_t -> (#type uint8_t) -> IO ()++foreign import ccall "ud_set_pc"+  set_pc :: Ptr UD_t -> (#type uint64_t) -> IO ()++foreign import ccall "ud_set_syntax"+  set_syntax :: Ptr UD_t -> FunPtr Translator -> IO ()++foreign import ccall "ud_set_vendor"+  set_vendor :: Ptr UD_t -> UD_vendor -> IO ()++foreign import ccall "ud_disassemble"+  disassemble :: Ptr UD_t -> IO CUInt++foreign import ccall "ud_insn_len"+  insn_len :: Ptr UD_t -> IO CUInt++foreign import ccall "ud_insn_off"+  insn_off :: Ptr UD_t -> IO (#type uint64_t)++foreign import ccall "ud_insn_hex"+  insn_hex :: Ptr UD_t -> IO CString++foreign import ccall "ud_insn_ptr"+  insn_ptr :: Ptr UD_t -> IO (Ptr (#type uint8_t))++foreign import ccall "ud_insn_asm"+  insn_asm :: Ptr UD_t -> IO CString++foreign import ccall "ud_input_skip"+  input_skip :: Ptr UD_t -> CSize -> IO ()++foreign import ccall "&ud_translate_intel"+  translate_intel :: FunPtr Translator++foreign import ccall "&ud_translate_att"+  translate_att :: FunPtr Translator++-- * Struct accessors++get_mnemonic :: Ptr UD_t -> IO CUInt+get_mnemonic p = (#peek struct ud, mnemonic) p++-- | Another pointer tag.+data Operand++get_operand1, get_operand2, get_operand3 :: Ptr UD_t -> Ptr Operand+get_operand1 = (#ptr struct ud, operand[0])+get_operand2 = (#ptr struct ud, operand[1])+get_operand3 = (#ptr struct ud, operand[2])++get_type, get_base, get_index :: Ptr Operand -> IO UD_type+get_type  = (#peek struct ud_operand, type)+get_base  = (#peek struct ud_operand, base)+get_index = (#peek struct ud_operand, index)++get_size, get_offset, get_scale :: Ptr Operand -> IO (#type uint8_t)+get_size   = (#peek struct ud_operand, size)+get_offset = (#peek struct ud_operand, offset)+get_scale  = (#peek struct ud_operand, scale)++get_lval_u8  :: Ptr Operand -> IO Word8+get_lval_u8  = (#peek struct ud_operand, lval.ubyte)+get_lval_u16 :: Ptr Operand -> IO Word16+get_lval_u16 = (#peek struct ud_operand, lval.uword)+get_lval_u32 :: Ptr Operand -> IO Word32+get_lval_u32 = (#peek struct ud_operand, lval.udword)+get_lval_u64 :: Ptr Operand -> IO Word64+get_lval_u64 = (#peek struct ud_operand, lval.uqword)++get_lval_s8  :: Ptr Operand -> IO Int8+get_lval_s8  = (#peek struct ud_operand, lval.sbyte)+get_lval_s16 :: Ptr Operand -> IO Int16+get_lval_s16 = (#peek struct ud_operand, lval.sword)+get_lval_s32 :: Ptr Operand -> IO Int32+get_lval_s32 = (#peek struct ud_operand, lval.sdword)+get_lval_s64 :: Ptr Operand -> IO Int64+get_lval_s64 = (#peek struct ud_operand, lval.sqword)++get_lval_ptr :: Ptr Operand -> IO (Word16, Word32)+get_lval_ptr p = liftM2 (,) ((#peek struct ud_operand, lval.ptr.seg) p)+                            ((#peek struct ud_operand, lval.ptr.off) p)++get_pfx_rex, get_pfx_seg, get_pfx_opr, get_pfx_adr,+  get_pfx_lock, get_pfx_rep, get_pfx_repe, get_pfx_repne :: Ptr UD_t -> IO (#type uint8_t)+get_pfx_rex   = (#peek ud_t, pfx_rex)+get_pfx_seg   = (#peek ud_t, pfx_seg)+get_pfx_opr   = (#peek ud_t, pfx_opr)+get_pfx_adr   = (#peek ud_t, pfx_adr)+get_pfx_lock  = (#peek ud_t, pfx_lock)+get_pfx_rep   = (#peek ud_t, pfx_rep)+get_pfx_repe  = (#peek ud_t, pfx_repe)+get_pfx_repne = (#peek ud_t, pfx_repne)++get_pc :: Ptr UD_t -> IO (#type uint64_t)+get_pc = (#peek ud_t, pc)++-- * Enumerations++type UD_vendor = CUInt+#enum UD_vendor,, UD_VENDOR_INTEL, UD_VENDOR_AMD++type UD_type = CUInt+#{enum UD_type,,+  UD_NONE,+  UD_R_AL,      UD_R_CL,        UD_R_DL,        UD_R_BL,+  UD_R_AH,      UD_R_CH,        UD_R_DH,        UD_R_BH,+  UD_R_SPL,     UD_R_BPL,       UD_R_SIL,       UD_R_DIL,+  UD_R_R8B,     UD_R_R9B,       UD_R_R10B,      UD_R_R11B,+  UD_R_R12B,    UD_R_R13B,      UD_R_R14B,      UD_R_R15B,+  UD_R_AX,      UD_R_CX,        UD_R_DX,        UD_R_BX,+  UD_R_SP,      UD_R_BP,        UD_R_SI,        UD_R_DI,+  UD_R_R8W,     UD_R_R9W,       UD_R_R10W,      UD_R_R11W,+  UD_R_R12W,    UD_R_R13W,      UD_R_R14W,      UD_R_R15W,+  UD_R_EAX,     UD_R_ECX,       UD_R_EDX,       UD_R_EBX,+  UD_R_ESP,     UD_R_EBP,       UD_R_ESI,       UD_R_EDI,+  UD_R_R8D,     UD_R_R9D,       UD_R_R10D,      UD_R_R11D,+  UD_R_R12D,    UD_R_R13D,      UD_R_R14D,      UD_R_R15D,+  UD_R_RAX,     UD_R_RCX,       UD_R_RDX,       UD_R_RBX,+  UD_R_RSP,     UD_R_RBP,       UD_R_RSI,       UD_R_RDI,+  UD_R_R8,      UD_R_R9,        UD_R_R10,       UD_R_R11,+  UD_R_R12,     UD_R_R13,       UD_R_R14,       UD_R_R15,+  UD_R_ES,      UD_R_CS,        UD_R_SS,        UD_R_DS,+  UD_R_FS,      UD_R_GS,        +  UD_R_CR0,     UD_R_CR1,       UD_R_CR2,       UD_R_CR3,+  UD_R_CR4,     UD_R_CR5,       UD_R_CR6,       UD_R_CR7,+  UD_R_CR8,     UD_R_CR9,       UD_R_CR10,      UD_R_CR11,+  UD_R_CR12,    UD_R_CR13,      UD_R_CR14,      UD_R_CR15,+  UD_R_DR0,     UD_R_DR1,       UD_R_DR2,       UD_R_DR3,+  UD_R_DR4,     UD_R_DR5,       UD_R_DR6,       UD_R_DR7,+  UD_R_DR8,     UD_R_DR9,       UD_R_DR10,      UD_R_DR11,+  UD_R_DR12,    UD_R_DR13,      UD_R_DR14,      UD_R_DR15,+  UD_R_MM0,     UD_R_MM1,       UD_R_MM2,       UD_R_MM3,+  UD_R_MM4,     UD_R_MM5,       UD_R_MM6,       UD_R_MM7,+  UD_R_ST0,     UD_R_ST1,       UD_R_ST2,       UD_R_ST3,+  UD_R_ST4,     UD_R_ST5,       UD_R_ST6,       UD_R_ST7, +  UD_R_XMM0,    UD_R_XMM1,      UD_R_XMM2,      UD_R_XMM3,+  UD_R_XMM4,    UD_R_XMM5,      UD_R_XMM6,      UD_R_XMM7,+  UD_R_XMM8,    UD_R_XMM9,      UD_R_XMM10,     UD_R_XMM11,+  UD_R_XMM12,   UD_R_XMM13,     UD_R_XMM14,     UD_R_XMM15,+  UD_R_RIP,+  UD_OP_REG,    UD_OP_MEM,      UD_OP_PTR,      UD_OP_IMM,+  UD_OP_JIMM,   UD_OP_CONST }
+ Hdis86/IO.hs view
@@ -0,0 +1,401 @@+{-# LANGUAGE+    DeriveDataTypeable+  , RecordWildCards+  , NamedFieldPuns+  , ViewPatterns #-}++-- | Interface to the @udis86@ disassembler.+--+-- The goal at this level of wrapping is to provide the+-- maximum feature-set from the underlying C library,+-- with the minimum of C-related headaches. Therefore,+-- this module's API is thoroughly imperative, but uses+-- Haskellish types and automatic resource management.+--+-- For a higher-level, @IO@-free API, see @'Hdis86.Pure'@.+--+-- This module is fully thread-safe: any number of threads+-- may manipulate one or several @'UD'@ objects at the same+-- time.  The individual operations exported by this module+-- are guaranteed to be atomic.+module Hdis86.IO+  ( -- * Instances+    UD+  , newUD++    -- * Input sources+  , setInputBuffer+  , InputHook, setInputHook+  , unsetInput++    -- * Disassembly+  , advance, skip, setIP+  , run++    -- * Inspecting the output+  , getInstruction+  , getLength, getOffset+  , getHex, getBytes, getAssembly++    -- * Configuration+  , setConfig+  , setVendor, setCPUMode, setSyntax++    -- * Callbacks+  , setCallback++    -- * Unsafe operations+  , unsafeSetInputPtr+  , unsafeRunLazy+  ) where++import qualified Hdis86.C as C+import Hdis86.Types+import Hdis86.Internal.Map++import Data.Typeable ( Typeable )+import Control.Concurrent.MVar+  ( MVar, newMVar, withMVar, modifyMVar_, addMVarFinalizer )+import Foreign+import Foreign.C.String+import Control.Applicative hiding ( Const )+import Control.Monad+import Data.Maybe+import Data.Function++import qualified Data.ByteString          as BS+import qualified Data.ByteString.Internal as BS++import System.IO.Unsafe ( unsafeInterleaveIO )++-- We keep track of the current input source and+-- the current translator so that these resources+-- can be freed automatically.++data Input+  = InNone+  | InHook (FunPtr C.InputHook)+  | InBuf  (ForeignPtr Word8)+  | InPtr++data XlatType+  = XlBuiltin+  | XlCustom++data State = State+  { udPtr      :: Ptr C.UD_t+  , udInput    :: Input+  , udXlatType :: XlatType+  , udXlat     :: FunPtr C.Translator }++-- | Abstract type representing an instance of the disassembler.+newtype UD = UD (MVar State)+  deriving (Typeable)++setInput :: Input -> State -> IO State+setInput inpt st@State{udInput} = do+  case udInput of+    InHook fp -> freeHaskellFunPtr fp+    -- We make sure any ByteString's contents stay valid to this point+    InBuf ptr -> touchForeignPtr ptr+    _ -> return ()+  return $ st { udInput = inpt }++setXlat :: XlatType -> FunPtr C.Translator -> State -> IO State+setXlat ty fp st@State{udPtr, udXlat, udXlatType} = do+  case udXlatType of+    XlCustom -> freeHaskellFunPtr udXlat+    _ -> return ()+  C.set_syntax udPtr fp+  return $ st { udXlatType = ty, udXlat = fp }++finalizeState :: MVar State -> IO ()+finalizeState = flip withMVar $ \st@State{udPtr} -> do+  _ <- setInput InNone st+  _ <- setXlat  XlBuiltin nullFunPtr st+  free udPtr++-- | Create a new disassembler instance.+--+-- There is no @deleteUD@.  Associated resources will be freed automatically+-- after this @'UD'@ value becomes unreachable.+newUD :: IO UD+newUD = do+  p <- mallocBytes C.sizeof_ud_t+  C.init p+  s <- newMVar $ State p InNone XlBuiltin nullFunPtr+  addMVarFinalizer s (finalizeState s)+  return $ UD s++withUDPtr :: UD -> (Ptr C.UD_t -> IO a) -> IO a+withUDPtr (UD s) f = withMVar s $ \State{udPtr} -> f udPtr++-- | A custom input source.+--+-- Each time this action is executed, it should return a single byte of+-- input, or @'Nothing'@ if there are no more bytes to read.+type InputHook = IO (Maybe Word8)++-- | Register an @'InputHook'@ to provide machine code to disassemble.+setInputHook :: UD -> InputHook -> IO ()+setInputHook (UD s) f = modifyMVar_ s $ \st@State{udPtr} -> do+  fp <- C.wrap_InputHook (maybe C.eoi fromIntegral <$> f)+  C.set_input_hook udPtr fp+  setInput (InHook fp) st++-- no wrapper for C.set_input_file, as I have not found a good way to+-- make a C FILE* from Haskell code, and file reading is also possible+-- through setInputHook.++-- | Set up the @'UD'@ instance to read directly from memory.+--+-- Given are a pointer to a memory region, and the length of that region.+--+-- This is an unsafe operation because the contents of the memory region+-- might change, especially if it's part of the heap managed by GHC's+-- garbage collector.+--+-- You are responsible for ensuring that the memory pointed to does not+-- change or become invalid until another input source is selected.+-- You cannot rely on garbage collection of the @'UD'@ value, because+-- finalization may be delayed arbitrarily long after the value becomes+-- unreachable.+--+-- It should be safe to use this on the static code segment of your+-- process, which is useful when your Haskell program needs to+-- disassemble itself.+unsafeSetInputPtr :: UD -> Ptr Word8 -> Word -> IO ()+unsafeSetInputPtr (UD s) ptr len = modifyMVar_ s $ \st@State{udPtr} -> do+  C.set_input_buffer udPtr (castPtr ptr) (fromIntegral len)+  setInput InPtr st++-- | Clear any previous input source setting.+--+-- This allows the @'UD'@ instance to free any resources associated with+-- the input source.  Those resources would be freed automatically after+-- the @'UD'@ value becomes unreachable, but you can use @'unsetInput'@+-- to force this to happen earlier.+unsetInput :: UD -> IO ()+unsetInput (UD s) = modifyMVar_ s $ \st@State{udPtr} -> do+  C.set_input_buffer udPtr nullPtr 0+  setInput InNone st++-- | Set up the @'UD'@ instance to read machine code from a @'BS.ByteString'@.+--+-- This library does not copy the contents of the @'BS.ByteString'@.+-- It will hold onto the value until another input source is selected,+-- or until the @'UD'@ value becomes unreachable.+--+-- This means that @'setInputBuffer'@ is both safe and efficient, but it+-- may inhibit garbage collection of a larger @'BS.ByteString'@ containing+-- the input.  To prevent this, use @ByteString.@@'BS.copy'@.+setInputBuffer :: UD -> BS.ByteString -> IO ()+setInputBuffer (UD s) bs = modifyMVar_ s $ \st@State{udPtr} -> do+  let (ptr, off, len) = BS.toForeignPtr bs+  C.set_input_buffer udPtr+    (unsafeForeignPtrToPtr ptr `plusPtr` off)+    (fromIntegral len)+  setInput (InBuf ptr) st++-- TODO: error checking++-- | Set the CPU mode, i.e. 16-bit, 32-bit, or 64-bit.+setCPUMode :: UD -> CPUMode -> IO ()+setCPUMode s = withUDPtr s . flip C.set_mode . f where+  f Mode16 = 16+  f Mode32 = 32+  f Mode64 = 64++-- | Set the instruction pointer, i.e. the disassembler's idea of+-- where the current instruction would live in memory.+setIP :: UD -> Word64 -> IO ()+setIP s w = withUDPtr s $ flip C.set_pc w++-- | Set the assembly syntax to be used by @'getAssembly'@.+--+-- This takes effect after the next call to @'disassemble'@.+setSyntax :: UD -> Syntax -> IO ()+setSyntax (UD s) = modifyMVar_ s . setXlat XlBuiltin . f where+  f SyntaxNone  = nullFunPtr+  f SyntaxIntel = C.translate_intel+  f SyntaxATT   = C.translate_att++-- no point passing the UD since we can close over it easily+-- | Register an action to be performed after each instruction is disassembled.+--+-- This is not necessary for using the library.  An alternative is to perform+-- the action in a loop which also calls @'advance'@.+--+-- This disables updating of the string returned by @'getAssembly'@.+setCallback :: UD -> IO () -> IO ()+setCallback (UD s) act = do+  fp <- C.wrap_Translator (const act)+  modifyMVar_ s $ setXlat XlCustom fp++-- | Choose an instruction set variation.+setVendor :: UD -> Vendor -> IO ()+setVendor ud = withUDPtr ud . flip C.set_vendor . f where+  f Intel = C.udVendorIntel+  f AMD   = C.udVendorAmd++-- | Set an overall configuration.+--+-- Calls each of @'setVendor'@, @'setCPUMode'@, @'setSyntax'@, @'setIP'@.+setConfig :: UD -> Config -> IO ()+setConfig ud Config{..} = do+  setVendor  ud cfgVendor+  setCPUMode ud cfgCPUMode+  setSyntax  ud cfgSyntax+  setIP      ud cfgOrigin++-- | Disassemble the next instruction and return its length in bytes, or+-- @'Nothing'@ if there are no more instructions.+advance :: UD -> IO (Maybe Word)+advance = fmap f . flip withUDPtr C.disassemble where+  f 0 = Nothing+  f n = Just $ fromIntegral n++-- implementation of run and unsafeRunLazy+runImpl :: (IO [a] -> IO [a]) -> UD -> IO a -> IO [a]+runImpl wrap ud get = fix $ \loop -> do+  n <- advance ud+  case n of+    Just _  -> liftA2 (:) get (wrap loop)+    Nothing -> return []++-- | A convenience function which calls @'advance'@ repeatedly+-- while instructions remain.+--+-- At each instruction the user-specified action is performed,+-- and the results are collected.  The @'UD'@ value is+-- not passed as an argument, but it's easy enough to close+-- over it when defining your action.+run :: UD -> IO a -> IO [a]+run = runImpl id++-- | Lazy version of @'run'@; calls into the C library as+-- elements of its result list are forced.+--+-- This has roughly the same caveats as @'unsafeInterleaveIO'@.+unsafeRunLazy :: UD -> IO a -> IO [a]+unsafeRunLazy = runImpl unsafeInterleaveIO++-- | Get the length of the current instruction in bytes.+getLength :: UD -> IO Word+getLength = fmap fromIntegral . flip withUDPtr C.insn_len++-- | Get the offset of the current instruction.  This value is set+-- by @'getIP'@ and updated after each call to @'advance'@.+getOffset :: UD -> IO Word64+getOffset = flip withUDPtr C.insn_off++-- | Get the current instruction's machine code as a hexadecimal string.+getHex :: UD -> IO String+getHex = flip withUDPtr $ \p ->+  C.insn_hex p >>= peekCString++-- | Get the current instruction's machine code as a @'BS.ByteString'@.+--+-- The bytes are copied out of internal state.+getBytes :: UD -> IO BS.ByteString+getBytes = flip withUDPtr $ \p -> do+  len <- C.insn_len p+  ptr <- C.insn_ptr p+  -- Int vs. CUInt overflow problems?+  BS.packCStringLen (castPtr ptr, fromIntegral len)++-- | Get the assembly syntax for the current instruction.+--+-- See also @'setSyntax'@.+getAssembly :: UD -> IO String+getAssembly = flip withUDPtr $ \p ->+  C.insn_asm p >>= peekCString++-- | Skip the next /n/ bytes of the input.+skip :: UD -> Word -> IO ()+skip s n = withUDPtr s $ flip C.input_skip (fromIntegral n)++getPfx :: Ptr C.UD_t -> IO [Prefix]+getPfx udt = catMaybes <$> mapM get allPfx where+  allPfx =+    [ (C.get_pfx_seg,   getSeg)+    , (C.get_pfx_rex,   k Rex)+    , (C.get_pfx_opr,   k OperSize)+    , (C.get_pfx_adr,   k AddrSize)+    , (C.get_pfx_lock,  k Lock)+    , (C.get_pfx_rep,   k Rep)+    , (C.get_pfx_repe,  k RepE)+    , (C.get_pfx_repne, k RepNE)+    ]+  get (retr, conv) = do+    n <- fromIntegral <$> retr udt+    return (guard (n /= C.udNone) >> conv n)+  getSeg (register -> RegSeg seg) = Just $ Seg seg+  getSeg _ = Nothing+  k v _ = Just v++getLvalU :: WordSize -> Ptr C.Operand -> IO Word64+getLvalU Bits0  _   = return 0+getLvalU Bits8  uop = fromIntegral <$> C.get_lval_u8  uop+getLvalU Bits16 uop = fromIntegral <$> C.get_lval_u16 uop+getLvalU Bits32 uop = fromIntegral <$> C.get_lval_u32 uop+getLvalU _      uop = C.get_lval_u64 uop++getLvalS :: WordSize -> Ptr C.Operand -> IO Int64+getLvalS Bits0  _   = return 0+getLvalS Bits8  uop = fromIntegral <$> C.get_lval_s8  uop+getLvalS Bits16 uop = fromIntegral <$> C.get_lval_s16 uop+getLvalS Bits32 uop = fromIntegral <$> C.get_lval_s32 uop+getLvalS _      uop = C.get_lval_s64 uop++opDecode :: UDTM (Ptr C.Operand -> IO Operand)+opDecode = makeUDTM+  [ (C.udOpMem,   fmap Mem   . getMem)+  , (C.udOpReg,   fmap Reg   . getReg C.get_base)+  , (C.udOpPtr,   fmap Ptr   . getPtr)+  , (C.udOpImm,   fmap Imm   . getImm getLvalU)+  , (C.udOpJimm,  fmap Jump  . getImm getLvalS)+  , (C.udOpConst, fmap Const . getImm getLvalU) ] where++    getReg f uop = register <$> f uop++    getMem uop = do+      -- These uses of fromJust are safe unless the+      -- C library is giving us bad data.+      Just sz <- wordSize <$> C.get_offset uop+      off <- Immediate sz <$> getLvalS sz uop+      Memory+        <$> ((fromJust . wordSize) <$> C.get_size uop)+        <*> getReg C.get_base  uop+        <*> getReg C.get_index uop+        <*> C.get_scale uop+        <*> pure off++    getPtr uop = do+      sz <- C.get_size uop+      (seg, off) <- C.get_lval_ptr uop+      let szw = case sz of+            32 -> Bits16+            48 -> Bits32+            _  -> error ("invaild pointer size " ++ show sz)+      return . Pointer seg $ Immediate szw off++    getImm f uop = do+      Just sz <- wordSize <$> C.get_size uop+      val <- f sz uop+      return $ Immediate sz val++getOperands :: Ptr C.UD_t -> IO [Operand]+getOperands udt = catMaybes <$> mapM decode getters where+  getters = [C.get_operand1, C.get_operand2, C.get_operand3]+  decode f = do+    let uop = f udt+    ty  <- C.get_type uop+    case lookupUDTM ty opDecode of+      Just g  -> Just <$> g uop+      Nothing -> return Nothing++-- | Get the current instruction.+getInstruction :: UD -> IO Instruction+getInstruction = flip withUDPtr $ \udt ->+  Inst <$> getPfx udt <*> (opcode <$> C.get_mnemonic udt) <*> getOperands udt
+ Hdis86/Internal/Map.hs view
@@ -0,0 +1,182 @@+{-# OPTIONS_HADDOCK+    hide #-}+module Hdis86.Internal.Map+  ( UDTM, makeUDTM, lookupUDTM+  , register, opcode+  ) where++import Hdis86.Internal.Opcode+import Hdis86.C+import Hdis86.Types++import Data.Maybe+import Foreign.C.Types ( CUInt )+import qualified Data.IntMap as IM++newtype UDTM v = UDTM (IM.IntMap v)++makeUDTM :: [(UD_type, v)] -> UDTM v+makeUDTM = UDTM . IM.fromList . map (\(k,v) -> (fromIntegral k, v))++lookupUDTM :: UD_type -> UDTM v -> Maybe v+lookupUDTM t (UDTM m) = IM.lookup (fromIntegral t) m++regMap :: UDTM Register+regMap = makeUDTM+  [ (udNone, RegNone)++  , (udRAl,   Reg8 RAX L)+  , (udRCl,   Reg8 RCX L)+  , (udRDl,   Reg8 RDX L)+  , (udRBl,   Reg8 RBX L)+  , (udRAh,   Reg8 RAX H)+  , (udRCh,   Reg8 RCX H)+  , (udRDh,   Reg8 RDX H)+  , (udRBh,   Reg8 RBX H)+  , (udRSpl,  Reg8 RSP L)+  , (udRBpl,  Reg8 RBP L)+  , (udRSil,  Reg8 RSI L)+  , (udRDil,  Reg8 RDI L)+  , (udRR8b,  Reg8 R8  L)+  , (udRR9b,  Reg8 R9  L)+  , (udRR10b, Reg8 R10 L)+  , (udRR11b, Reg8 R11 L)+  , (udRR12b, Reg8 R12 L)+  , (udRR13b, Reg8 R13 L)+  , (udRR14b, Reg8 R14 L)+  , (udRR15b, Reg8 R15 L)++  , (udRAx,   Reg16 RAX)+  , (udRCx,   Reg16 RCX)+  , (udRDx,   Reg16 RDX)+  , (udRBx,   Reg16 RBX)+  , (udRSp,   Reg16 RSP)+  , (udRBp,   Reg16 RBP)+  , (udRSi,   Reg16 RSI)+  , (udRDi,   Reg16 RDI)+  , (udRR8w,  Reg16 R8 )+  , (udRR9w,  Reg16 R9 )+  , (udRR10w, Reg16 R10)+  , (udRR11w, Reg16 R11)+  , (udRR12w, Reg16 R12)+  , (udRR13w, Reg16 R13)+  , (udRR14w, Reg16 R14)+  , (udRR15w, Reg16 R15)++  , (udREax,  Reg32 RAX)+  , (udREcx,  Reg32 RCX)+  , (udREdx,  Reg32 RDX)+  , (udREbx,  Reg32 RBX)+  , (udREsp,  Reg32 RSP)+  , (udREbp,  Reg32 RBP)+  , (udREsi,  Reg32 RSI)+  , (udREdi,  Reg32 RDI)+  , (udRR8d,  Reg32 R8 )+  , (udRR9d,  Reg32 R9 )+  , (udRR10d, Reg32 R10)+  , (udRR11d, Reg32 R11)+  , (udRR12d, Reg32 R12)+  , (udRR13d, Reg32 R13)+  , (udRR14d, Reg32 R14)+  , (udRR15d, Reg32 R15)++  , (udRRax, Reg64 RAX)+  , (udRRcx, Reg64 RCX)+  , (udRRdx, Reg64 RDX)+  , (udRRbx, Reg64 RBX)+  , (udRRsp, Reg64 RSP)+  , (udRRbp, Reg64 RBP)+  , (udRRsi, Reg64 RSI)+  , (udRRdi, Reg64 RDI)+  , (udRR8,  Reg64 R8 )+  , (udRR9,  Reg64 R9 )+  , (udRR10, Reg64 R10)+  , (udRR11, Reg64 R11)+  , (udRR12, Reg64 R12)+  , (udRR13, Reg64 R13)+  , (udRR14, Reg64 R14)+  , (udRR15, Reg64 R15)++  , (udREs, RegSeg ES)+  , (udRCs, RegSeg CS)+  , (udRSs, RegSeg SS)+  , (udRDs, RegSeg DS)+  , (udRFs, RegSeg FS)+  , (udRGs, RegSeg GS)++  , (udRCr0,  RegCtl CR0 )+  , (udRCr1,  RegCtl CR1 )+  , (udRCr2,  RegCtl CR2 )+  , (udRCr3,  RegCtl CR3 )+  , (udRCr4,  RegCtl CR4 )+  , (udRCr5,  RegCtl CR5 )+  , (udRCr6,  RegCtl CR6 )+  , (udRCr7,  RegCtl CR7 )+  , (udRCr8,  RegCtl CR8 )+  , (udRCr9,  RegCtl CR9 )+  , (udRCr10, RegCtl CR10)+  , (udRCr11, RegCtl CR11)+  , (udRCr12, RegCtl CR12)+  , (udRCr13, RegCtl CR13)+  , (udRCr14, RegCtl CR14)+  , (udRCr15, RegCtl CR15)++  , (udRDr0,  RegDbg DR0 )+  , (udRDr1,  RegDbg DR1 )+  , (udRDr2,  RegDbg DR2 )+  , (udRDr3,  RegDbg DR3 )+  , (udRDr4,  RegDbg DR4 )+  , (udRDr5,  RegDbg DR5 )+  , (udRDr6,  RegDbg DR6 )+  , (udRDr7,  RegDbg DR7 )+  , (udRDr8,  RegDbg DR8 )+  , (udRDr9,  RegDbg DR9 )+  , (udRDr10, RegDbg DR10)+  , (udRDr11, RegDbg DR11)+  , (udRDr12, RegDbg DR12)+  , (udRDr13, RegDbg DR13)+  , (udRDr14, RegDbg DR14)+  , (udRDr15, RegDbg DR15)++  , (udRMm0,  RegMMX MM0)+  , (udRMm1,  RegMMX MM1)+  , (udRMm2,  RegMMX MM2)+  , (udRMm3,  RegMMX MM3)+  , (udRMm4,  RegMMX MM4)+  , (udRMm5,  RegMMX MM5)+  , (udRMm6,  RegMMX MM6)+  , (udRMm7,  RegMMX MM7)++  , (udRSt0,  RegX87 ST0)+  , (udRSt1,  RegX87 ST1)+  , (udRSt2,  RegX87 ST2)+  , (udRSt3,  RegX87 ST3)+  , (udRSt4,  RegX87 ST4)+  , (udRSt5,  RegX87 ST5)+  , (udRSt6,  RegX87 ST6)+  , (udRSt7,  RegX87 ST7)++  , (udRXmm0,  RegXMM XMM0 )+  , (udRXmm1,  RegXMM XMM1 )+  , (udRXmm2,  RegXMM XMM2 )+  , (udRXmm3,  RegXMM XMM3 )+  , (udRXmm4,  RegXMM XMM4 )+  , (udRXmm5,  RegXMM XMM5 )+  , (udRXmm6,  RegXMM XMM6 )+  , (udRXmm7,  RegXMM XMM7 )+  , (udRXmm8,  RegXMM XMM8 )+  , (udRXmm9,  RegXMM XMM9 )+  , (udRXmm10, RegXMM XMM10)+  , (udRXmm11, RegXMM XMM11)+  , (udRXmm12, RegXMM XMM12)+  , (udRXmm13, RegXMM XMM13)+  , (udRXmm14, RegXMM XMM14)+  , (udRXmm15, RegXMM XMM15)++  , (udRRip, RegIP)]++register :: CUInt -> Register+register n = fromMaybe RegNone $ lookupUDTM n regMap++opcode :: CUInt -> Opcode+opcode = toEnum . fromIntegral
+ Hdis86/Internal/Opcode.hs view
@@ -0,0 +1,572 @@+{-# OPTIONS_HADDOCK+    hide #-}+{-# LANGUAGE+    DeriveDataTypeable #-}+module Hdis86.Internal.Opcode where+-- generated by gen_opcode.sh, do not exit++import Data.Typeable ( Typeable )+import Data.Data ( Data )++data Opcode+ = I3dnow+ | Iaaa+ | Iaad+ | Iaam+ | Iaas+ | Iadc+ | Iadd+ | Iaddpd+ | Iaddps+ | Iaddsd+ | Iaddss+ | Iaddsubpd+ | Iaddsubps+ | Iand+ | Iandpd+ | Iandps+ | Iandnpd+ | Iandnps+ | Iarpl+ | Imovsxd+ | Ibound+ | Ibsf+ | Ibsr+ | Ibswap+ | Ibt+ | Ibtc+ | Ibtr+ | Ibts+ | Icall+ | Icbw+ | Icwde+ | Icdqe+ | Iclc+ | Icld+ | Iclflush+ | Iclgi+ | Icli+ | Iclts+ | Icmc+ | Icmovo+ | Icmovno+ | Icmovb+ | Icmovae+ | Icmovz+ | Icmovnz+ | Icmovbe+ | Icmova+ | Icmovs+ | Icmovns+ | Icmovp+ | Icmovnp+ | Icmovl+ | Icmovge+ | Icmovle+ | Icmovg+ | Icmp+ | Icmppd+ | Icmpps+ | Icmpsb+ | Icmpsw+ | Icmpsd+ | Icmpsq+ | Icmpss+ | Icmpxchg+ | Icmpxchg8b+ | Icomisd+ | Icomiss+ | Icpuid+ | Icvtdq2pd+ | Icvtdq2ps+ | Icvtpd2dq+ | Icvtpd2pi+ | Icvtpd2ps+ | Icvtpi2ps+ | Icvtpi2pd+ | Icvtps2dq+ | Icvtps2pi+ | Icvtps2pd+ | Icvtsd2si+ | Icvtsd2ss+ | Icvtsi2ss+ | Icvtss2si+ | Icvtss2sd+ | Icvttpd2pi+ | Icvttpd2dq+ | Icvttps2dq+ | Icvttps2pi+ | Icvttsd2si+ | Icvtsi2sd+ | Icvttss2si+ | Icwd+ | Icdq+ | Icqo+ | Idaa+ | Idas+ | Idec+ | Idiv+ | Idivpd+ | Idivps+ | Idivsd+ | Idivss+ | Iemms+ | Ienter+ | If2xm1+ | Ifabs+ | Ifadd+ | Ifaddp+ | Ifbld+ | Ifbstp+ | Ifchs+ | Ifclex+ | Ifcmovb+ | Ifcmove+ | Ifcmovbe+ | Ifcmovu+ | Ifcmovnb+ | Ifcmovne+ | Ifcmovnbe+ | Ifcmovnu+ | Ifucomi+ | Ifcom+ | Ifcom2+ | Ifcomp3+ | Ifcomi+ | Ifucomip+ | Ifcomip+ | Ifcomp+ | Ifcomp5+ | Ifcompp+ | Ifcos+ | Ifdecstp+ | Ifdiv+ | Ifdivp+ | Ifdivr+ | Ifdivrp+ | Ifemms+ | Iffree+ | Iffreep+ | Ificom+ | Ificomp+ | Ifild+ | Ifncstp+ | Ifninit+ | Ifiadd+ | Ifidivr+ | Ifidiv+ | Ifisub+ | Ifisubr+ | Ifist+ | Ifistp+ | Ifisttp+ | Ifld+ | Ifld1+ | Ifldl2t+ | Ifldl2e+ | Ifldlpi+ | Ifldlg2+ | Ifldln2+ | Ifldz+ | Ifldcw+ | Ifldenv+ | Ifmul+ | Ifmulp+ | Ifimul+ | Ifnop+ | Ifpatan+ | Ifprem+ | Ifprem1+ | Ifptan+ | Ifrndint+ | Ifrstor+ | Ifnsave+ | Ifscale+ | Ifsin+ | Ifsincos+ | Ifsqrt+ | Ifstp+ | Ifstp1+ | Ifstp8+ | Ifstp9+ | Ifst+ | Ifnstcw+ | Ifnstenv+ | Ifnstsw+ | Ifsub+ | Ifsubp+ | Ifsubr+ | Ifsubrp+ | Iftst+ | Ifucom+ | Ifucomp+ | Ifucompp+ | Ifxam+ | Ifxch+ | Ifxch4+ | Ifxch7+ | Ifxrstor+ | Ifxsave+ | Ifpxtract+ | Ifyl2x+ | Ifyl2xp1+ | Ihaddpd+ | Ihaddps+ | Ihlt+ | Ihsubpd+ | Ihsubps+ | Iidiv+ | Iin+ | Iimul+ | Iinc+ | Iinsb+ | Iinsw+ | Iinsd+ | Iint1+ | Iint3+ | Iint+ | Iinto+ | Iinvd+ | Iinvlpg+ | Iinvlpga+ | Iiretw+ | Iiretd+ | Iiretq+ | Ijo+ | Ijno+ | Ijb+ | Ijae+ | Ijz+ | Ijnz+ | Ijbe+ | Ija+ | Ijs+ | Ijns+ | Ijp+ | Ijnp+ | Ijl+ | Ijge+ | Ijle+ | Ijg+ | Ijcxz+ | Ijecxz+ | Ijrcxz+ | Ijmp+ | Ilahf+ | Ilar+ | Ilddqu+ | Ildmxcsr+ | Ilds+ | Ilea+ | Iles+ | Ilfs+ | Ilgs+ | Ilidt+ | Ilss+ | Ileave+ | Ilfence+ | Ilgdt+ | Illdt+ | Ilmsw+ | Ilock+ | Ilodsb+ | Ilodsw+ | Ilodsd+ | Ilodsq+ | Iloopnz+ | Iloope+ | Iloop+ | Ilsl+ | Iltr+ | Imaskmovq+ | Imaxpd+ | Imaxps+ | Imaxsd+ | Imaxss+ | Imfence+ | Iminpd+ | Iminps+ | Iminsd+ | Iminss+ | Imonitor+ | Imov+ | Imovapd+ | Imovaps+ | Imovd+ | Imovddup+ | Imovdqa+ | Imovdqu+ | Imovdq2q+ | Imovhpd+ | Imovhps+ | Imovlhps+ | Imovlpd+ | Imovlps+ | Imovhlps+ | Imovmskpd+ | Imovmskps+ | Imovntdq+ | Imovnti+ | Imovntpd+ | Imovntps+ | Imovntq+ | Imovq+ | Imovqa+ | Imovq2dq+ | Imovsb+ | Imovsw+ | Imovsd+ | Imovsq+ | Imovsldup+ | Imovshdup+ | Imovss+ | Imovsx+ | Imovupd+ | Imovups+ | Imovzx+ | Imul+ | Imulpd+ | Imulps+ | Imulsd+ | Imulss+ | Imwait+ | Ineg+ | Inop+ | Inot+ | Ior+ | Iorpd+ | Iorps+ | Iout+ | Ioutsb+ | Ioutsw+ | Ioutsd+ | Ioutsq+ | Ipacksswb+ | Ipackssdw+ | Ipackuswb+ | Ipaddb+ | Ipaddw+ | Ipaddq+ | Ipaddsb+ | Ipaddsw+ | Ipaddusb+ | Ipaddusw+ | Ipand+ | Ipandn+ | Ipause+ | Ipavgb+ | Ipavgw+ | Ipcmpeqb+ | Ipcmpeqw+ | Ipcmpeqd+ | Ipcmpgtb+ | Ipcmpgtw+ | Ipcmpgtd+ | Ipextrw+ | Ipinsrw+ | Ipmaddwd+ | Ipmaxsw+ | Ipmaxub+ | Ipminsw+ | Ipminub+ | Ipmovmskb+ | Ipmulhuw+ | Ipmulhw+ | Ipmullw+ | Ipmuludq+ | Ipop+ | Ipopa+ | Ipopad+ | Ipopfw+ | Ipopfd+ | Ipopfq+ | Ipor+ | Iprefetch+ | Iprefetchnta+ | Iprefetcht0+ | Iprefetcht1+ | Iprefetcht2+ | Ipsadbw+ | Ipshufd+ | Ipshufhw+ | Ipshuflw+ | Ipshufw+ | Ipslldq+ | Ipsllw+ | Ipslld+ | Ipsllq+ | Ipsraw+ | Ipsrad+ | Ipsrlw+ | Ipsrld+ | Ipsrlq+ | Ipsrldq+ | Ipsubb+ | Ipsubw+ | Ipsubd+ | Ipsubq+ | Ipsubsb+ | Ipsubsw+ | Ipsubusb+ | Ipsubusw+ | Ipunpckhbw+ | Ipunpckhwd+ | Ipunpckhdq+ | Ipunpckhqdq+ | Ipunpcklbw+ | Ipunpcklwd+ | Ipunpckldq+ | Ipunpcklqdq+ | Ipi2fw+ | Ipi2fd+ | Ipf2iw+ | Ipf2id+ | Ipfnacc+ | Ipfpnacc+ | Ipfcmpge+ | Ipfmin+ | Ipfrcp+ | Ipfrsqrt+ | Ipfsub+ | Ipfadd+ | Ipfcmpgt+ | Ipfmax+ | Ipfrcpit1+ | Ipfrspit1+ | Ipfsubr+ | Ipfacc+ | Ipfcmpeq+ | Ipfmul+ | Ipfrcpit2+ | Ipmulhrw+ | Ipswapd+ | Ipavgusb+ | Ipush+ | Ipusha+ | Ipushad+ | Ipushfw+ | Ipushfd+ | Ipushfq+ | Ipxor+ | Ircl+ | Ircr+ | Irol+ | Iror+ | Ircpps+ | Ircpss+ | Irdmsr+ | Irdpmc+ | Irdtsc+ | Irdtscp+ | Irepne+ | Irep+ | Iret+ | Iretf+ | Irsm+ | Irsqrtps+ | Irsqrtss+ | Isahf+ | Isal+ | Isalc+ | Isar+ | Ishl+ | Ishr+ | Isbb+ | Iscasb+ | Iscasw+ | Iscasd+ | Iscasq+ | Iseto+ | Isetno+ | Isetb+ | Isetnb+ | Isetz+ | Isetnz+ | Isetbe+ | Iseta+ | Isets+ | Isetns+ | Isetp+ | Isetnp+ | Isetl+ | Isetge+ | Isetle+ | Isetg+ | Isfence+ | Isgdt+ | Ishld+ | Ishrd+ | Ishufpd+ | Ishufps+ | Isidt+ | Isldt+ | Ismsw+ | Isqrtps+ | Isqrtpd+ | Isqrtsd+ | Isqrtss+ | Istc+ | Istd+ | Istgi+ | Isti+ | Iskinit+ | Istmxcsr+ | Istosb+ | Istosw+ | Istosd+ | Istosq+ | Istr+ | Isub+ | Isubpd+ | Isubps+ | Isubsd+ | Isubss+ | Iswapgs+ | Isyscall+ | Isysenter+ | Isysexit+ | Isysret+ | Itest+ | Iucomisd+ | Iucomiss+ | Iud2+ | Iunpckhpd+ | Iunpckhps+ | Iunpcklps+ | Iunpcklpd+ | Iverr+ | Iverw+ | Ivmcall+ | Ivmclear+ | Ivmxon+ | Ivmptrld+ | Ivmptrst+ | Ivmresume+ | Ivmxoff+ | Ivmrun+ | Ivmmcall+ | Ivmload+ | Ivmsave+ | Iwait+ | Iwbinvd+ | Iwrmsr+ | Ixadd+ | Ixchg+ | Ixlatb+ | Ixor+ | Ixorpd+ | Ixorps+ | Idb+ | Iinvalid+ | Id3vil+ | Ina+ | Igrp_reg+ | Igrp_rm+ | Igrp_vendor+ | Igrp_x87+ | Igrp_mode+ | Igrp_osize+ | Igrp_asize+ | Igrp_mod+ | Inone+ deriving (Eq, Ord, Show, Read, Enum, Bounded, Typeable, Data)
+ Hdis86/Pure.hs view
@@ -0,0 +1,69 @@+{-# LANGUAGE+    DeriveDataTypeable #-}++-- | Interface to the @udis86@ disassembler.+--+-- This is the simplest, most high-level interface.+--+-- See @'Hdis86.IO'@ if you need more control or performance.+module Hdis86.Pure+  ( -- * Simple disassembly+    disassemble++    -- * Disassembly with full metadata+  , disassembleMetadata+  , Metadata(..)+  ) where++import Hdis86.Types+import Hdis86.IO ( UD )+import qualified Hdis86.IO as I++import Data.Typeable ( Typeable )+import Data.Data     ( Data )++import Control.Applicative+import Data.Word++import System.IO.Unsafe ( unsafePerformIO )++import qualified Data.ByteString as BS++-- internal only; this isn't referentially transparent in general+disWith :: (UD -> IO a) -> Config -> BS.ByteString -> [a]+disWith f cfg bs = unsafePerformIO $ do+  ud <- I.newUD+  I.setInputBuffer ud bs+  I.setConfig      ud cfg+  I.unsafeRunLazy  ud (f ud)++-- | Disassemble machine code.+--+-- Common values for @'Config'@ such as @'intel32'@ or @'amd64'@+-- are provided in @'Hdis86.Types'@.+--+-- The output is produced lazily.+disassemble :: Config -> BS.ByteString -> [Instruction]+disassemble = disWith I.getInstruction++-- | An instruction with full metadata.+data Metadata = Metadata+  { mdOffset   :: Word64         -- ^ Offset of the start of this instruction+  , mdLength   :: Word           -- ^ Length of this instruction in bytes+  , mdHex      :: String         -- ^ Hexadecimal representation of this instruction+  , mdBytes    :: BS.ByteString  -- ^ Bytes that make up this instruction+  , mdAssembly :: String         -- ^ Assembly code for this instruction+  , mdInst     :: Instruction    -- ^ The instruction itself+  } deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | Disassemble machine code, with full metadata.+--+-- The output is produced lazily.+disassembleMetadata :: Config -> BS.ByteString -> [Metadata]+disassembleMetadata = disWith $ \ud -> Metadata+  <$> I.getOffset      ud+  <*> I.getLength      ud+  <*> I.getHex         ud+  <*> I.getBytes       ud+  <*> I.getAssembly    ud+  <*> I.getInstruction ud
+ Hdis86/Types.hs view
@@ -0,0 +1,233 @@+{-# LANGUAGE+    DeriveDataTypeable #-}++-- | Types provided by the disassembler.+module Hdis86.Types+  (  -- * Instructions+    Instruction(..)+  , Prefix(..)+  , Operand(..), Memory(..), Pointer(..), Immediate(..)++    -- * Registers+  , Register(..), GPR(..), Half(..)+  , Segment(..), ControlRegister(..), DebugRegister(..)+  , MMXRegister(..), X87Register(..), XMMRegister(..)++    -- * Word sizes+  , WordSize(..), wordSize, bitsInWord++    -- * Configuration+  , Config(..)+  , Vendor(..), CPUMode(..), Syntax(..)++    -- * Common configurations+  , intel32, intel64, amd32, amd64++    -- * Opcodes+  , Opcode(..)+  ) where++import Hdis86.Internal.Opcode++import Data.Typeable ( Typeable )+import Data.Data     ( Data )+import Data.Word+import Data.Int++-- | Machine word sizes.+--+-- Some fields, such as immediate operands, come in different+-- widths.  We store the equivalent integer value in a @'Word64'@,+-- along with a @'WordSize'@ to indicate the original width.+data WordSize+  = Bits0   -- ^ Field not present, value will be 0+  | Bits8+  | Bits16+  | Bits32+  | Bits48+  | Bits64+  | Bits80+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | Convert a number of bits to a @'WordSize'@.+wordSize :: Word8 -> Maybe WordSize+wordSize 0  = Just Bits0+wordSize 8  = Just Bits8+wordSize 16 = Just Bits16+wordSize 32 = Just Bits32+wordSize 48 = Just Bits48+wordSize 64 = Just Bits64+wordSize 80 = Just Bits80+wordSize _  = Nothing++-- | Number of bits in a word of a given size.+bitsInWord :: WordSize -> Word8+bitsInWord Bits0  = 0+bitsInWord Bits8  = 8+bitsInWord Bits16 = 16+bitsInWord Bits32 = 32+bitsInWord Bits48 = 48+bitsInWord Bits64 = 64+bitsInWord Bits80 = 80++-- | An x86 \/ AMD64 register.+data Register+  = RegNone                 -- ^ No register specified.+  | Reg8   GPR Half         -- ^ Either 8-bit half of the low 16 bits+                            --   of a general-purpose register+  | Reg16  GPR              -- ^ Low 16 bits of a general-purpose register+                            --   (full register in 16-bit mode)+  | Reg32  GPR              -- ^ Low 32 bits of a general-purpose register+                            --   (full register in 32-bit mode)+  | Reg64  GPR              -- ^ Full 64-bit general-purpose register+  | RegSeg Segment          -- ^ Segment register+  | RegCtl ControlRegister  -- ^ Control register+  | RegDbg DebugRegister    -- ^ Debug register+  | RegMMX MMXRegister      -- ^ MMX register+  | RegX87 X87Register      -- ^ @x87@ floating point unit register+  | RegXMM XMMRegister      -- ^ XMM register+  | RegIP                   -- ^ Instruction pointer+  deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | A general-purpose register.+--+-- The names are taken from the 64-bit architecture, but they map onto+-- other modes in the obvious way.+data GPR+  = RAX | RCX | RDX | RBX+  | RSP | RBP | RSI | RDI+  | R8  | R9  | R10 | R11+  | R12 | R13 | R14 | R15+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | Indicates which half of a 16-bit register is used as an 8-bit register.+data Half+  = L  -- ^ Low or least significant 8 bits+  | H  -- ^ High or most significant 8 bits+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | A segment register.+data Segment+  = ES | CS | SS | DS | FS | GS+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | A control register.+data ControlRegister+  = CR0  | CR1  | CR2  | CR3+  | CR4  | CR5  | CR6  | CR7+  | CR8  | CR9  | CR10 | CR11+  | CR12 | CR13 | CR14 | CR15+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | A debug register.+data DebugRegister+  = DR0  | DR1  | DR2  | DR3+  | DR4  | DR5  | DR6  | DR7+  | DR8  | DR9  | DR10 | DR11+  | DR12 | DR13 | DR14 | DR15+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | An MMX register.+data MMXRegister+  = MM0  | MM1  | MM2  | MM3+  | MM4  | MM5  | MM6  | MM7+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | An @x87@ floating-point unit register.+data X87Register+  = ST0  | ST1  | ST2  | ST3+  | ST4  | ST5  | ST6  | ST7+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | An XMM register.+data XMMRegister+  = XMM0  | XMM1  | XMM2  | XMM3+  | XMM4  | XMM5  | XMM6  | XMM7+  | XMM8  | XMM9  | XMM10 | XMM11+  | XMM12 | XMM13 | XMM14 | XMM15+  deriving (Eq, Ord, Show, Read, Typeable, Data, Enum, Bounded)++-- | An x86 \/ AMD64 CPU instruction.+--+-- The destination @'Operand'@ (if any) will precede the source+-- @'Operand'@s.+data Instruction+  = Inst [Prefix] Opcode [Operand]+  deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | Prefixes, used to modify an instruction.+data Prefix+  = Seg Segment  -- ^ Segment override+  | Rex          -- ^ @REX@ prefix; enables certain 64-bit features+  | OperSize     -- ^ Operand size override+  | AddrSize     -- ^ Address size override+  | Lock         -- ^ Perform memory operations atomically+  | Rep          -- ^ Repeat+  | RepE         -- ^ Repeat while equal+  | RepNE        -- ^ Repeat while not equal+  deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | Instruction operands.+data Operand+  = Mem   Memory              -- ^ Memory access+  | Reg   Register            -- ^ Register+  | Ptr   Pointer             -- ^ Segmented pointer+  | Imm   (Immediate Word64)  -- ^ Immediate value+  | Jump  (Immediate Int64 )  -- ^ Immediate value, for a relative jump+  | Const (Immediate Word64)  -- ^ Constant value+  deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | A memory-access operand.+data Memory = Memory+  { mSize   :: WordSize         -- ^ Size of the word in memory+  , mBase   :: Register         -- ^ Base register+  , mIndex  :: Register         -- ^ Index register+  , mScale  :: Word8            -- ^ Scale of index+  , mOffset :: Immediate Int64  -- ^ Displacement / offset value+  } deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | A segmented pointer operand.+data Pointer = Pointer+  { pSegment :: Word16            -- ^ Segment+  , pOffset  :: Immediate Word32  -- ^ Offset, 16 or 32 bits+  } deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | An immediate operand.+data Immediate t = Immediate+  { iSize  :: WordSize  -- ^ Size of the field+  , iValue :: t         -- ^ Immediate value, e.g @'Int64'@ or @'Word64'@+  } deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | CPU vendors, supporting slightly different instruction sets.+data Vendor+  = Intel+  | AMD+  deriving (Eq, Ord, Show, Read, Enum, Bounded, Typeable, Data)++-- | Selection of assembly output syntax.+data Syntax+  = SyntaxNone   -- ^ Don't generate assembly syntax+  | SyntaxIntel  -- ^ Intel- / NASM-like syntax+  | SyntaxATT    -- ^ AT&T- / @gas@-like syntax+  deriving (Eq, Ord, Show, Read, Enum, Bounded, Typeable, Data)++-- | Overall configuration of the disassembler.+data Config = Config+  { cfgVendor  :: Vendor   -- ^ CPU vendor; determines the instruction set used+  , cfgCPUMode :: CPUMode  -- ^ Disassemble 16-, 32-, or 64-bit code+  , cfgSyntax  :: Syntax   -- ^ Syntax to use when generating assembly+  , cfgOrigin  :: Word64   -- ^ Address where the first instruction would live in memory+  } deriving (Eq, Ord, Show, Read, Typeable, Data)++-- | CPU execution mode.+data CPUMode+  = Mode16  -- ^ 16-bit mode+  | Mode32  -- ^ 32-bit mode+  | Mode64  -- ^ 64-bit mode+  deriving (Eq, Ord, Show, Read, Enum, Bounded, Typeable, Data)++intel32, intel64, amd32, amd64 :: Config+intel32 = Config Intel Mode32 SyntaxNone 0+intel64 = Config Intel Mode64 SyntaxNone 0+amd32   = Config AMD   Mode32 SyntaxNone 0+amd64   = Config AMD   Mode64 SyntaxNone 0
+ LICENSE view
@@ -0,0 +1,28 @@+Except for the subdirectory udis86-1.7:++Copyright (c) Keegan McAllister 2011++All rights reserved.++Redistribution and use in source and binary forms, with or without+modification, are permitted provided that the following conditions+are met:+1. Redistributions of source code must retain the above copyright+   notice, this list of conditions and the following disclaimer.+2. Redistributions in binary form must reproduce the above copyright+   notice, this list of conditions and the following disclaimer in the+   documentation and/or other materials provided with the distribution.+3. Neither the name of the author nor the names of his contributors+   may be used to endorse or promote products derived from this software+   without specific prior written permission.++THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE+DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ README view
@@ -0,0 +1,13 @@+hdis86 is a Haskell interface to the udis86 disassembler, which decodes machine+code for 16-, 32-, and 64-bit x86 and x86-64 / AMD64 processors.  Most of the+documentation is provided in the form of Haddock-generated HTML, which can be+produced by running++  $ cabal configure && cabal haddock --hyperlink-source++This will produce HTML documentation under dist/doc/html/hdis86.++See also the files in doc/ and the Hackage page at+http://hackage.haskell.org/package/hdis86 .++The udis86 website is http://udis86.sourceforge.net/ .
+ Setup.hs view
@@ -0,0 +1,4 @@+#! /usr/bin/runhaskell++import Distribution.Simple+main = defaultMain
+ doc/customizing.txt view
@@ -0,0 +1,7 @@+If you've built udis86 with a custom x86optable.xml, or you're using a version+other than 1.7, you may need to regenerate Hdis86/Internal/Opcode.hs to keep+it synchronized.++To do this, run the script tools/gen_opcode.sh, passing it the path to+libudis86/itab.h as a command-line argument.  It will produce a suitable+Opcode.hs on standard output.
+ hdis86.cabal view
@@ -0,0 +1,89 @@+name:                hdis86+version:             0.1+license:             BSD3+license-file:        LICENSE+synopsis:            Interface to the udis86 disassembler for x86 and x86-64 / AMD64+category:            Disassembler, Language, Foreign, Reverse Engineering+author:              Keegan McAllister <mcallister.keegan@gmail.com>+maintainer:          Keegan McAllister <mcallister.keegan@gmail.com>+homepage:            https://github.com/kmcallister/hdis86+build-type:          Simple+cabal-version:       >=1.2+description:+  @hdis86@ is an interface to the @udis86@ disassembler, which decodes machine+  code for 16-, 32-, and 64-bit x86  and x86-64 / AMD64 processors.  @hdis86@+  provides an instruction stream as a Haskell algebraic data type, suitable for+  inspection by pattern matching.  It also provides metadata such as assembly+  syntax in Intel or AT&T flavors.+  .+  This library exposes three layers of wrapping:+  .+    * The @Pure@ module has the simplest interface, effectively+      @ByteString -> [Instruction]@.+  .+    * The @IO@ module exposes an imperative API closely matching the @udis86@+      state machine, while providing Haskellish types and automatic resource+      management.+  .+    * The @C@ module is a direct import of the @udis86@ library, with C types+      and conventions.+  .+  Many users can simply import @Hdis86@.+  .++  By default, @hdis86@ will statically link a built-in copy of @udis86-1.7@,+  which is provided by its author under a similar BSD license.  See inside the+  tarball for more information.  If you have @udis86@ installed on your system,+  you can instead link dynamically using+  @cabal configure --flags=external-udis86@.  In that case see also @doc/customizing.txt@.+  .+  This code is available on GitHub at <https://github.com/kmcallister/hdis86>.+  .+  The @udis86@ project website is located at <http://udis86.sourceforge.net/>.++extra-source-files:+    tools/hdcli.hs+  , tools/gen_opcode.sh+  , udis86-1.7/libudis86/decode.h+  , udis86-1.7/libudis86/input.h+  , udis86-1.7/libudis86/syn.h+  , udis86-1.7/libudis86/extern.h+  , udis86-1.7/libudis86/itab.h+  , udis86-1.7/libudis86/types.h+  , udis86-1.7/udis86.h+  , udis86-1.7/LICENSE+  , udis86-1.7/README+  , README+  , doc/customizing.txt++flag external-udis86+  default: False+  description: Dynamically link to the system's copy of udis86.++library+  exposed-modules:  +      Hdis86+    , Hdis86.Types+    , Hdis86.Pure+    , Hdis86.IO+    , Hdis86.C+    , Hdis86.Internal.Opcode+    , Hdis86.Internal.Map+  ghc-options:       -Wall+  build-depends:+      base       >= 3 && < 5+    , containers >= 0.3+    , bytestring >= 0.9++  if flag(external-udis86)+    extra-libraries: udis86+  else+    include-dirs: udis86-1.7+    c-sources:+      udis86-1.7/libudis86/udis86.c+      udis86-1.7/libudis86/decode.c+      udis86-1.7/libudis86/input.c+      udis86-1.7/libudis86/itab.c+      udis86-1.7/libudis86/syn.c+      udis86-1.7/libudis86/syn-att.c+      udis86-1.7/libudis86/syn-intel.c
+ tools/gen_opcode.sh view
@@ -0,0 +1,31 @@+#!/bin/sh -e++if [ -z "$1" ]; then+  echo "Usage: $0 path/to/udis86-1.x/libudis86/itab.h" >&2+  echo >&2+  echo "Outputs the generated Opcode.hs on standard out." >&2+  exit 1+fi++cat <<EOF+{-# OPTIONS_HADDOCK+    hide #-}+{-# LANGUAGE+    DeriveDataTypeable #-}+module Hdis86.Internal.Opcode where+-- generated by gen_opcode.sh, do not exit++import Data.Typeable ( Typeable )+import Data.Data ( Data )++data Opcode+EOF++PFX=" ="+grep '^  UD_' "$1" | sed 's/^  UD_//; s/,//' | \+  while read inst; do+    echo "$PFX $inst"+    PFX=" |"+  done++echo " deriving (Eq, Ord, Show, Read, Enum, Bounded, Typeable, Data)"
+ tools/hdcli.hs view
@@ -0,0 +1,80 @@+{-# LANGUAGE+    RecordWildCards #-}+module Main(main) where++{- This is an example program emulating most of the functionality of udis86's+   udcli.  It additionally provides a command-line option "-dump", which will+   print the Haskell 'Instruction' data structures to standard output.++   Compile with:+     $ ghc --make -O hdcli.hs+-}++import Hdis86++import System.Environment ( getArgs )+import Control.Monad+import Text.Printf+import qualified Data.ByteString as BS++data Opts = Opts+  { skip   :: Int+  , count  :: Maybe Int+  , doOff  :: Bool+  , doHex  :: Bool+  , doDump :: Bool+  , file   :: Maybe String+  } deriving (Show)++getOpts :: [String] -> (Opts, Config)+getOpts = go (dfl, amd32 { cfgSyntax = SyntaxIntel }) where+  dfl = Opts 0 Nothing True True False Nothing+  go pair@(opt,cfg) = f where+    f []                      = pair+    f [fname@(c:_)] | c /= '-' = (opt { file = Just fname }, cfg)+    f ("-16"       :xs) = go (opt, cfg { cfgCPUMode  = Mode16      }) xs+    f ("-32"       :xs) = go (opt, cfg { cfgCPUMode  = Mode32      }) xs+    f ("-64"       :xs) = go (opt, cfg { cfgCPUMode  = Mode64      }) xs+    f ("-intel"    :xs) = go (opt, cfg { cfgSyntax   = SyntaxIntel }) xs+    f ("-att"      :xs) = go (opt, cfg { cfgSyntax   = SyntaxATT   }) xs+    f ("-v":"intel":xs) = go (opt, cfg { cfgVendor   = Intel       }) xs+    f ("-v":"amd"  :xs) = go (opt, cfg { cfgVendor   = AMD         }) xs+    f ("-o":n      :xs) = go (opt, cfg { cfgOrigin   = parse n     }) xs+    f ("-s":n      :xs) = go (opt { skip   = parse n        }, cfg  ) xs+    f ("-c":n      :xs) = go (opt { count  = Just $ parse n }, cfg  ) xs+    f ("-noff"     :xs) = go (opt { doOff  = False          }, cfg  ) xs+    f ("-nohex"    :xs) = go (opt { doHex  = False          }, cfg  ) xs+    f ("-dump"     :xs) = go (opt { doDump = True           }, cfg  ) xs+    f ("-h"        :_ ) = error "takes the same arguments as udcli"+    f xs = error ("could not parse options: " ++ show xs)++  parse :: (Read a) => String -> a+  parse xs = case reads xs of+    [(v,"")] -> v+    _ -> error ("could not parse: " ++ show xs)++main :: IO ()+main = do+  (opts@Opts{..}, cfg) <- getOpts `fmap` getArgs+  inpt <- case file of+    Nothing -> BS.getContents+    Just f  -> BS.readFile f+  let chunk = maybe id BS.take count . BS.drop skip $ inpt+  let inst = disassembleMetadata cfg chunk+  mapM_ (out opts) inst++out :: Opts -> Metadata -> IO ()+out Opts{..} Metadata{..} = do+  when doOff $ printf "%016x " mdOffset+  let (hex, leftover) = splitAt 16 mdHex+  when doHex $ printf "%-16s" hex+  _ <- printf " %-24s" mdAssembly+  when (doHex && leftover /= "") $ do+    putChar '\n'+    when doOff $ putStr "                -"+    printf "%-16s" leftover+  when doDump $ do+    putChar '\n'+    putStr $ replicate 34 ' '+    print mdInst+  putChar '\n'
+ udis86-1.7/LICENSE view
@@ -0,0 +1,24 @@+This LICENSE pertains to all files within this subdirectory, named udis86-1.7:++Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008 <vivek@sig9.com>+All rights reserved.++Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:++    * Redistributions of source code must retain the above copyright notice, +      this list of conditions and the following disclaimer.+    * Redistributions in binary form must reproduce the above copyright notice, +      this list of conditions and the following disclaimer in the documentation +      and/or other materials provided with the distribution.++THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ udis86-1.7/README view
@@ -0,0 +1,16 @@+This directory contains a subset of the files from udis86-1.7.tar.gz, available+at http://udis86.sourceforge.net/ .++udis86 is copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008 Vivek Thampi.++The original archive udis86-1.7.tar.gz did not include a LICENSE file.  The+project website at http://udis86.sourceforge.net/ contained this text as of+February 13, 2011:++"License++Udis86 is an open source project, and is distributed under the terms of the BSD License."++As of the same date, the Git repository at+git://udis86.git.sourceforge.net/gitroot/udis86/udis86 contained the text which+you will find in the file "LICENSE" in this directory.
+ udis86-1.7/libudis86/decode.c view
@@ -0,0 +1,1193 @@+/* -----------------------------------------------------------------------------+ * decode.c+ *+ * Copyright (c) 2005, 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */++#include <assert.h>+#include <string.h>++#include "types.h"+#include "itab.h"+#include "input.h"+#include "decode.h"++/* The max number of prefixes to an instruction */+#define MAX_PREFIXES    15++static struct ud_itab_entry ie_invalid = { UD_Iinvalid, O_NONE, O_NONE, O_NONE, P_none };+static struct ud_itab_entry ie_pause   = { UD_Ipause,   O_NONE, O_NONE, O_NONE, P_none };+static struct ud_itab_entry ie_nop     = { UD_Inop,     O_NONE, O_NONE, O_NONE, P_none };+++/* Looks up mnemonic code in the mnemonic string table+ * Returns NULL if the mnemonic code is invalid+ */+const char * ud_lookup_mnemonic( enum ud_mnemonic_code c )+{+    if ( c < UD_Id3vil )+        return ud_mnemonics_str[ c ];+    return NULL;+}+++/* Extracts instruction prefixes.+ */+static int get_prefixes( struct ud* u )+{+    unsigned int have_pfx = 1;+    unsigned int i;+    uint8_t curr;++    /* if in error state, bail out */+    if ( u->error ) +        return -1; ++    /* keep going as long as there are prefixes available */+    for ( i = 0; have_pfx ; ++i ) {++        /* Get next byte. */+        inp_next(u); +        if ( u->error ) +            return -1;+        curr = inp_curr( u );++        /* rex prefixes in 64bit mode */+        if ( u->dis_mode == 64 && ( curr & 0xF0 ) == 0x40 ) {+            u->pfx_rex = curr;  +        } else {+            switch ( curr )  +            {+            case 0x2E : +                u->pfx_seg = UD_R_CS; +                u->pfx_rex = 0;+                break;+            case 0x36 :     +                u->pfx_seg = UD_R_SS; +                u->pfx_rex = 0;+                break;+            case 0x3E : +                u->pfx_seg = UD_R_DS; +                u->pfx_rex = 0;+                break;+            case 0x26 : +                u->pfx_seg = UD_R_ES; +                u->pfx_rex = 0;+                break;+            case 0x64 : +                u->pfx_seg = UD_R_FS; +                u->pfx_rex = 0;+                break;+            case 0x65 : +                u->pfx_seg = UD_R_GS; +                u->pfx_rex = 0;+                break;+            case 0x67 : /* adress-size override prefix */ +                u->pfx_adr = 0x67;+                u->pfx_rex = 0;+                break;+            case 0xF0 : +                u->pfx_lock = 0xF0;+                u->pfx_rex  = 0;+                break;+            case 0x66: +                /* the 0x66 sse prefix is only effective if no other sse prefix+                 * has already been specified.+                 */+                if ( !u->pfx_insn ) u->pfx_insn = 0x66;+                u->pfx_opr = 0x66;           +                u->pfx_rex = 0;+                break;+            case 0xF2:+                u->pfx_insn  = 0xF2;+                u->pfx_repne = 0xF2; +                u->pfx_rex   = 0;+                break;+            case 0xF3:+                u->pfx_insn = 0xF3;+                u->pfx_rep  = 0xF3; +                u->pfx_repe = 0xF3; +                u->pfx_rex  = 0;+                break;+            default : +                /* No more prefixes */+                have_pfx = 0;+                break;+            }+        }++        /* check if we reached max instruction length */+        if ( i + 1 == MAX_INSN_LENGTH ) {+            u->error = 1;+            break;+        }+    }++    /* return status */+    if ( u->error ) +        return -1; ++    /* rewind back one byte in stream, since the above loop +     * stops with a non-prefix byte. +     */+    inp_back(u);++    /* speculatively determine the effective operand mode,+     * based on the prefixes and the current disassembly+     * mode. This may be inaccurate, but useful for mode+     * dependent decoding.+     */+    if ( u->dis_mode == 64 ) {+        u->opr_mode = REX_W( u->pfx_rex ) ? 64 : ( ( u->pfx_opr ) ? 16 : 32 ) ;+        u->adr_mode = ( u->pfx_adr ) ? 32 : 64;+    } else if ( u->dis_mode == 32 ) {+        u->opr_mode = ( u->pfx_opr ) ? 16 : 32;+        u->adr_mode = ( u->pfx_adr ) ? 16 : 32;+    } else if ( u->dis_mode == 16 ) {+        u->opr_mode = ( u->pfx_opr ) ? 32 : 16;+        u->adr_mode = ( u->pfx_adr ) ? 32 : 16;+    }++    return 0;+}+++/* Searches the instruction tables for the right entry.+ */+static int search_itab( struct ud * u )+{+    struct ud_itab_entry * e = NULL;+    enum ud_itab_index table;+    uint8_t peek;+    uint8_t did_peek = 0;+    uint8_t curr; +    uint8_t index;++    /* if in state of error, return */+    if ( u->error ) +        return -1;++    /* get first byte of opcode. */+    inp_next(u); +    if ( u->error ) +        return -1;+    curr = inp_curr(u); ++    /* resolve xchg, nop, pause crazyness */+    if ( 0x90 == curr ) {+        if ( !( u->dis_mode == 64 && REX_B( u->pfx_rex ) ) ) {+            if ( u->pfx_rep ) {+                u->pfx_rep = 0;+                e = & ie_pause;+            } else {+                e = & ie_nop;+            }+            goto found_entry;+        }+    }++    /* get top-level table */+    if ( 0x0F == curr ) {+        table = ITAB__0F;+        curr  = inp_next(u);+        if ( u->error )+            return -1;++        /* 2byte opcodes can be modified by 0x66, F3, and F2 prefixes */+        if ( 0x66 == u->pfx_insn ) {+            if ( ud_itab_list[ ITAB__PFX_SSE66__0F ][ curr ].mnemonic != UD_Iinvalid ) {+                table = ITAB__PFX_SSE66__0F;+                u->pfx_opr = 0;+            }+        } else if ( 0xF2 == u->pfx_insn ) {+            if ( ud_itab_list[ ITAB__PFX_SSEF2__0F ][ curr ].mnemonic != UD_Iinvalid ) {+                table = ITAB__PFX_SSEF2__0F; +                u->pfx_repne = 0;+            }+        } else if ( 0xF3 == u->pfx_insn ) {+            if ( ud_itab_list[ ITAB__PFX_SSEF3__0F ][ curr ].mnemonic != UD_Iinvalid ) {+                table = ITAB__PFX_SSEF3__0F;+                u->pfx_repe = 0;+                u->pfx_rep  = 0;+            }+        }+    /* pick an instruction from the 1byte table */+    } else {+        table = ITAB__1BYTE; +    }++    index = curr;++search:++    e = & ud_itab_list[ table ][ index ];++    /* if mnemonic constant is a standard instruction constant+     * our search is over.+     */+    +    if ( e->mnemonic < UD_Id3vil ) {+        if ( e->mnemonic == UD_Iinvalid ) {+            if ( did_peek ) {+                inp_next( u ); if ( u->error ) return -1;+            }+            goto found_entry;+        }+        goto found_entry;+    }++    table = e->prefix;++    switch ( e->mnemonic )+    {+    case UD_Igrp_reg:+        peek     = inp_peek( u );+        did_peek = 1;+        index    = MODRM_REG( peek );+        break;++    case UD_Igrp_mod:+        peek     = inp_peek( u );+        did_peek = 1;+        index    = MODRM_MOD( peek );+        if ( index == 3 )+           index = ITAB__MOD_INDX__11;+        else +           index = ITAB__MOD_INDX__NOT_11; +        break;++    case UD_Igrp_rm:+        curr     = inp_next( u );+        did_peek = 0;+        if ( u->error )+            return -1;+        index    = MODRM_RM( curr );+        break;++    case UD_Igrp_x87:+        curr     = inp_next( u );+        did_peek = 0;+        if ( u->error )+            return -1;+        index    = curr - 0xC0;+        break;++    case UD_Igrp_osize:+        if ( u->opr_mode == 64 ) +            index = ITAB__MODE_INDX__64;+        else if ( u->opr_mode == 32 ) +            index = ITAB__MODE_INDX__32;+        else+            index = ITAB__MODE_INDX__16;+        break;+ +    case UD_Igrp_asize:+        if ( u->adr_mode == 64 ) +            index = ITAB__MODE_INDX__64;+        else if ( u->adr_mode == 32 ) +            index = ITAB__MODE_INDX__32;+        else+            index = ITAB__MODE_INDX__16;+        break;               ++    case UD_Igrp_mode:+        if ( u->dis_mode == 64 ) +            index = ITAB__MODE_INDX__64;+        else if ( u->dis_mode == 32 ) +            index = ITAB__MODE_INDX__32;+        else+            index = ITAB__MODE_INDX__16;+        break;++    case UD_Igrp_vendor:+        if ( u->vendor == UD_VENDOR_INTEL ) +            index = ITAB__VENDOR_INDX__INTEL; +        else if ( u->vendor == UD_VENDOR_AMD )+            index = ITAB__VENDOR_INDX__AMD;+        else+            assert( !"unrecognized vendor id" );+        break;++    case UD_Id3vil:+        assert( !"invalid instruction mnemonic constant Id3vil" );+        break;++    default:+        assert( !"invalid instruction mnemonic constant" );+        break;+    }++    goto search;++found_entry:++    u->itab_entry = e;+    u->mnemonic = u->itab_entry->mnemonic;++    return 0;+}+++static unsigned int resolve_operand_size( const struct ud * u, unsigned int s )+{+    switch ( s ) +    {+    case SZ_V:+        return ( u->opr_mode );+    case SZ_Z:  +        return ( u->opr_mode == 16 ) ? 16 : 32;+    case SZ_P:  +        return ( u->opr_mode == 16 ) ? SZ_WP : SZ_DP;+    case SZ_MDQ:+        return ( u->opr_mode == 16 ) ? 32 : u->opr_mode;+    case SZ_RDQ:+        return ( u->dis_mode == 64 ) ? 64 : 32;+    default:+        return s;+    }+}+++static int resolve_mnemonic( struct ud* u )+{+  /* far/near flags */+  u->br_far = 0;+  u->br_near = 0;+  /* readjust operand sizes for call/jmp instrcutions */+  if ( u->mnemonic == UD_Icall || u->mnemonic == UD_Ijmp ) {+    /* WP: 16bit pointer */+    if ( u->operand[ 0 ].size == SZ_WP ) {+        u->operand[ 0 ].size = 16;+        u->br_far = 1;+        u->br_near= 0;+    /* DP: 32bit pointer */+    } else if ( u->operand[ 0 ].size == SZ_DP ) {+        u->operand[ 0 ].size = 32;+        u->br_far = 1;+        u->br_near= 0;+    } else {+        u->br_far = 0;+        u->br_near= 1;+    }+  /* resolve 3dnow weirdness. */+  } else if ( u->mnemonic == UD_I3dnow ) {+    u->mnemonic = ud_itab_list[ ITAB__3DNOW ][ inp_curr( u )  ].mnemonic;+  }+  /* SWAPGS is only valid in 64bits mode */+  if ( u->mnemonic == UD_Iswapgs && u->dis_mode != 64 ) {+    u->error = 1;+    return -1;+  }++  return 0;+}+++/* -----------------------------------------------------------------------------+ * decode_a()- Decodes operands of the type seg:offset+ * -----------------------------------------------------------------------------+ */+static void +decode_a(struct ud* u, struct ud_operand *op)+{+  if (u->opr_mode == 16) {  +    /* seg16:off16 */+    op->type = UD_OP_PTR;+    op->size = 32;+    op->lval.ptr.off = inp_uint16(u);+    op->lval.ptr.seg = inp_uint16(u);+  } else {+    /* seg16:off32 */+    op->type = UD_OP_PTR;+    op->size = 48;+    op->lval.ptr.off = inp_uint32(u);+    op->lval.ptr.seg = inp_uint16(u);+  }+}++/* -----------------------------------------------------------------------------+ * decode_gpr() - Returns decoded General Purpose Register + * -----------------------------------------------------------------------------+ */+static enum ud_type +decode_gpr(register struct ud* u, unsigned int s, unsigned char rm)+{+  s = resolve_operand_size(u, s);+        +  switch (s) {+    case 64:+        return UD_R_RAX + rm;+    case SZ_DP:+    case 32:+        return UD_R_EAX + rm;+    case SZ_WP:+    case 16:+        return UD_R_AX  + rm;+    case  8:+        if (u->dis_mode == 64 && u->pfx_rex) {+            if (rm >= 4)+                return UD_R_SPL + (rm-4);+            return UD_R_AL + rm;+        } else return UD_R_AL + rm;+    default:+        return 0;+  }+}++/* -----------------------------------------------------------------------------+ * resolve_gpr64() - 64bit General Purpose Register-Selection. + * -----------------------------------------------------------------------------+ */+static enum ud_type +resolve_gpr64(struct ud* u, enum ud_operand_code gpr_op)+{+  if (gpr_op >= OP_rAXr8 && gpr_op <= OP_rDIr15)+    gpr_op = (gpr_op - OP_rAXr8) | (REX_B(u->pfx_rex) << 3);          +  else  gpr_op = (gpr_op - OP_rAX);++  if (u->opr_mode == 16)+    return gpr_op + UD_R_AX;+  if (u->dis_mode == 32 || +    (u->opr_mode == 32 && ! (REX_W(u->pfx_rex) || u->default64))) {+    return gpr_op + UD_R_EAX;+  }++  return gpr_op + UD_R_RAX;+}++/* -----------------------------------------------------------------------------+ * resolve_gpr32 () - 32bit General Purpose Register-Selection. + * -----------------------------------------------------------------------------+ */+static enum ud_type +resolve_gpr32(struct ud* u, enum ud_operand_code gpr_op)+{+  gpr_op = gpr_op - OP_eAX;++  if (u->opr_mode == 16) +    return gpr_op + UD_R_AX;++  return gpr_op +  UD_R_EAX;+}++/* -----------------------------------------------------------------------------+ * resolve_reg() - Resolves the register type + * -----------------------------------------------------------------------------+ */+static enum ud_type +resolve_reg(struct ud* u, unsigned int type, unsigned char i)+{+  switch (type) {+    case T_MMX :    return UD_R_MM0  + (i & 7);+    case T_XMM :    return UD_R_XMM0 + i;+    case T_CRG :    return UD_R_CR0  + i;+    case T_DBG :    return UD_R_DR0  + i;+    case T_SEG :    return UD_R_ES   + (i & 7);+    case T_NONE:+    default:    return UD_NONE;+  }+}++/* -----------------------------------------------------------------------------+ * decode_imm() - Decodes Immediate values.+ * -----------------------------------------------------------------------------+ */+static void +decode_imm(struct ud* u, unsigned int s, struct ud_operand *op)+{+  op->size = resolve_operand_size(u, s);+  op->type = UD_OP_IMM;++  switch (op->size) {+    case  8: op->lval.sbyte = inp_uint8(u);   break;+    case 16: op->lval.uword = inp_uint16(u);  break;+    case 32: op->lval.udword = inp_uint32(u); break;+    case 64: op->lval.uqword = inp_uint64(u); break;+    default: return;+  }+}++/* -----------------------------------------------------------------------------+ * decode_modrm() - Decodes ModRM Byte+ * -----------------------------------------------------------------------------+ */+static void +decode_modrm(struct ud* u, struct ud_operand *op, unsigned int s, +         unsigned char rm_type, struct ud_operand *opreg, +         unsigned char reg_size, unsigned char reg_type)+{+  unsigned char mod, rm, reg;++  inp_next(u);++  /* get mod, r/m and reg fields */+  mod = MODRM_MOD(inp_curr(u));+  rm  = (REX_B(u->pfx_rex) << 3) | MODRM_RM(inp_curr(u));+  reg = (REX_R(u->pfx_rex) << 3) | MODRM_REG(inp_curr(u));++  op->size = resolve_operand_size(u, s);++  /* if mod is 11b, then the UD_R_m specifies a gpr/mmx/sse/control/debug */+  if (mod == 3) {+    op->type = UD_OP_REG;+    if (rm_type ==  T_GPR)+        op->base = decode_gpr(u, op->size, rm);+    else    op->base = resolve_reg(u, rm_type, (REX_B(u->pfx_rex) << 3) | (rm&7));+  } +  /* else its memory addressing */  +  else {+    op->type = UD_OP_MEM;++    /* 64bit addressing */+    if (u->adr_mode == 64) {++        op->base = UD_R_RAX + rm;++        /* get offset type */+        if (mod == 1)+            op->offset = 8;+        else if (mod == 2)+            op->offset = 32;+        else if (mod == 0 && (rm & 7) == 5) {           +            op->base = UD_R_RIP;+            op->offset = 32;+        } else  op->offset = 0;++        /* Scale-Index-Base (SIB) */+        if ((rm & 7) == 4) {+            inp_next(u);+            +            op->scale = (1 << SIB_S(inp_curr(u))) & ~1;+            op->index = UD_R_RAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3));+            op->base  = UD_R_RAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3));++            /* special conditions for base reference */+            if (op->index == UD_R_RSP) {+                op->index = UD_NONE;+                op->scale = UD_NONE;+            }++            if (op->base == UD_R_RBP || op->base == UD_R_R13) {+                if (mod == 0) +                    op->base = UD_NONE;+                if (mod == 1)+                    op->offset = 8;+                else op->offset = 32;+            }+        }+    } ++    /* 32-Bit addressing mode */+    else if (u->adr_mode == 32) {++        /* get base */+        op->base = UD_R_EAX + rm;++        /* get offset type */+        if (mod == 1)+            op->offset = 8;+        else if (mod == 2)+            op->offset = 32;+        else if (mod == 0 && rm == 5) {+            op->base = UD_NONE;+            op->offset = 32;+        } else  op->offset = 0;++        /* Scale-Index-Base (SIB) */+        if ((rm & 7) == 4) {+            inp_next(u);++            op->scale = (1 << SIB_S(inp_curr(u))) & ~1;+            op->index = UD_R_EAX + (SIB_I(inp_curr(u)) | (REX_X(u->pfx_rex) << 3));+            op->base  = UD_R_EAX + (SIB_B(inp_curr(u)) | (REX_B(u->pfx_rex) << 3));++            if (op->index == UD_R_ESP) {+                op->index = UD_NONE;+                op->scale = UD_NONE;+            }++            /* special condition for base reference */+            if (op->base == UD_R_EBP) {+                if (mod == 0)+                    op->base = UD_NONE;+                if (mod == 1)+                    op->offset = 8;+                else op->offset = 32;+            }+        }+    } ++    /* 16bit addressing mode */+    else  {+        switch (rm) {+            case 0: op->base = UD_R_BX; op->index = UD_R_SI; break;+            case 1: op->base = UD_R_BX; op->index = UD_R_DI; break;+            case 2: op->base = UD_R_BP; op->index = UD_R_SI; break;+            case 3: op->base = UD_R_BP; op->index = UD_R_DI; break;+            case 4: op->base = UD_R_SI; break;+            case 5: op->base = UD_R_DI; break;+            case 6: op->base = UD_R_BP; break;+            case 7: op->base = UD_R_BX; break;+        }++        if (mod == 0 && rm == 6) {+            op->offset= 16;+            op->base = UD_NONE;+        }+        else if (mod == 1)+            op->offset = 8;+        else if (mod == 2) +            op->offset = 16;+    }+  }  ++  /* extract offset, if any */+  switch(op->offset) {+    case 8 : op->lval.ubyte  = inp_uint8(u);  break;+    case 16: op->lval.uword  = inp_uint16(u);  break;+    case 32: op->lval.udword = inp_uint32(u); break;+    case 64: op->lval.uqword = inp_uint64(u); break;+    default: break;+  }++  /* resolve register encoded in reg field */+  if (opreg) {+    opreg->type = UD_OP_REG;+    opreg->size = resolve_operand_size(u, reg_size);+    if (reg_type == T_GPR) +        opreg->base = decode_gpr(u, opreg->size, reg);+    else opreg->base = resolve_reg(u, reg_type, reg);+  }+}++/* -----------------------------------------------------------------------------+ * decode_o() - Decodes offset+ * -----------------------------------------------------------------------------+ */+static void +decode_o(struct ud* u, unsigned int s, struct ud_operand *op)+{+  switch (u->adr_mode) {+    case 64:+        op->offset = 64; +        op->lval.uqword = inp_uint64(u); +        break;+    case 32:+        op->offset = 32; +        op->lval.udword = inp_uint32(u); +        break;+    case 16:+        op->offset = 16; +        op->lval.uword  = inp_uint16(u); +        break;+    default:+        return;+  }+  op->type = UD_OP_MEM;+  op->size = resolve_operand_size(u, s);+}++/* -----------------------------------------------------------------------------+ * disasm_operands() - Disassembles Operands.+ * -----------------------------------------------------------------------------+ */+static int disasm_operands(register struct ud* u)+{+++  /* mopXt = map entry, operand X, type; */+  enum ud_operand_code mop1t = u->itab_entry->operand1.type;+  enum ud_operand_code mop2t = u->itab_entry->operand2.type;+  enum ud_operand_code mop3t = u->itab_entry->operand3.type;++  /* mopXs = map entry, operand X, size */+  unsigned int mop1s = u->itab_entry->operand1.size;+  unsigned int mop2s = u->itab_entry->operand2.size;+  unsigned int mop3s = u->itab_entry->operand3.size;++  /* iop = instruction operand */+  register struct ud_operand* iop = u->operand;+    +  switch(mop1t) {+    +    case OP_A :+        decode_a(u, &(iop[0]));+        break;+    +    /* M[b] ... */+    case OP_M :+        if (MODRM_MOD(inp_peek(u)) == 3)+            u->error= 1;+    /* E, G/P/V/I/CL/1/S */+    case OP_E :+        if (mop2t == OP_G) {+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_GPR);+            if (mop3t == OP_I)+                decode_imm(u, mop3s, &(iop[2]));+            else if (mop3t == OP_CL) {+                iop[2].type = UD_OP_REG;+                iop[2].base = UD_R_CL;+                iop[2].size = 8;+            }+        }+        else if (mop2t == OP_P)+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_MMX);+        else if (mop2t == OP_V)+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_XMM);+        else if (mop2t == OP_S)+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_SEG);+        else {+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, NULL, 0, T_NONE);+            if (mop2t == OP_CL) {+                iop[1].type = UD_OP_REG;+                iop[1].base = UD_R_CL;+                iop[1].size = 8;+            } else if (mop2t == OP_I1) {+                iop[1].type = UD_OP_CONST;+                u->operand[1].lval.udword = 1;+            } else if (mop2t == OP_I) {+                decode_imm(u, mop2s, &(iop[1]));+            }+        }+        break;++    /* G, E/PR[,I]/VR */+    case OP_G :+        if (mop2t == OP_M) {+            if (MODRM_MOD(inp_peek(u)) == 3)+                u->error= 1;+            decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR);+        } else if (mop2t == OP_E) {+            decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_GPR);+            if (mop3t == OP_I)+                decode_imm(u, mop3s, &(iop[2]));+        } else if (mop2t == OP_PR) {+            decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_GPR);+            if (mop3t == OP_I)+                decode_imm(u, mop3s, &(iop[2]));+        } else if (mop2t == OP_VR) {+            if (MODRM_MOD(inp_peek(u)) != 3)+                u->error = 1;+            decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR);+        } else if (mop2t == OP_W)+            decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_GPR);+        break;++    /* AL..BH, I/O/DX */+    case OP_AL : case OP_CL : case OP_DL : case OP_BL :+    case OP_AH : case OP_CH : case OP_DH : case OP_BH :++        iop[0].type = UD_OP_REG;+        iop[0].base = UD_R_AL + (mop1t - OP_AL);+        iop[0].size = 8;++        if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        else if (mop2t == OP_DX) {+            iop[1].type = UD_OP_REG;+            iop[1].base = UD_R_DX;+            iop[1].size = 16;+        }+        else if (mop2t == OP_O)+            decode_o(u, mop2s, &(iop[1]));+        break;++    /* rAX[r8]..rDI[r15], I/rAX..rDI/O */+    case OP_rAXr8 : case OP_rCXr9 : case OP_rDXr10 : case OP_rBXr11 :+    case OP_rSPr12: case OP_rBPr13: case OP_rSIr14 : case OP_rDIr15 :+    case OP_rAX : case OP_rCX : case OP_rDX : case OP_rBX :+    case OP_rSP : case OP_rBP : case OP_rSI : case OP_rDI :++        iop[0].type = UD_OP_REG;+        iop[0].base = resolve_gpr64(u, mop1t);++        if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        else if (mop2t >= OP_rAX && mop2t <= OP_rDI) {+            iop[1].type = UD_OP_REG;+            iop[1].base = resolve_gpr64(u, mop2t);+        }+        else if (mop2t == OP_O) {+            decode_o(u, mop2s, &(iop[1]));  +            iop[0].size = resolve_operand_size(u, mop2s);+        }+        break;++    /* AL[r8b]..BH[r15b], I */+    case OP_ALr8b : case OP_CLr9b : case OP_DLr10b : case OP_BLr11b :+    case OP_AHr12b: case OP_CHr13b: case OP_DHr14b : case OP_BHr15b :+    {+        ud_type_t gpr = (mop1t - OP_ALr8b) + UD_R_AL + +                        (REX_B(u->pfx_rex) << 3);+        if (UD_R_AH <= gpr && u->pfx_rex)+            gpr = gpr + 4;+        iop[0].type = UD_OP_REG;+        iop[0].base = gpr;+        if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        break;+    }++    /* eAX..eDX, DX/I */+    case OP_eAX : case OP_eCX : case OP_eDX : case OP_eBX :+    case OP_eSP : case OP_eBP : case OP_eSI : case OP_eDI :+        iop[0].type = UD_OP_REG;+        iop[0].base = resolve_gpr32(u, mop1t);+        if (mop2t == OP_DX) {+            iop[1].type = UD_OP_REG;+            iop[1].base = UD_R_DX;+            iop[1].size = 16;+        } else if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        break;++    /* ES..GS */+    case OP_ES : case OP_CS : case OP_DS :+    case OP_SS : case OP_FS : case OP_GS :++        /* in 64bits mode, only fs and gs are allowed */+        if (u->dis_mode == 64)+            if (mop1t != OP_FS && mop1t != OP_GS)+                u->error= 1;+        iop[0].type = UD_OP_REG;+        iop[0].base = (mop1t - OP_ES) + UD_R_ES;+        iop[0].size = 16;++        break;++    /* J */+    case OP_J :+        decode_imm(u, mop1s, &(iop[0]));        +        iop[0].type = UD_OP_JIMM;+        break ;++    /* PR, I */+    case OP_PR:+        if (MODRM_MOD(inp_peek(u)) != 3)+            u->error = 1;+        decode_modrm(u, &(iop[0]), mop1s, T_MMX, NULL, 0, T_NONE);+        if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        break; ++    /* VR, I */+    case OP_VR:+        if (MODRM_MOD(inp_peek(u)) != 3)+            u->error = 1;+        decode_modrm(u, &(iop[0]), mop1s, T_XMM, NULL, 0, T_NONE);+        if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        break; ++    /* P, Q[,I]/W/E[,I],VR */+    case OP_P :+        if (mop2t == OP_Q) {+            decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_MMX);+            if (mop3t == OP_I)+                decode_imm(u, mop3s, &(iop[2]));+        } else if (mop2t == OP_W) {+            decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX);+        } else if (mop2t == OP_VR) {+            if (MODRM_MOD(inp_peek(u)) != 3)+                u->error = 1;+            decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_MMX);+        } else if (mop2t == OP_E) {+            decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_MMX);+            if (mop3t == OP_I)+                decode_imm(u, mop3s, &(iop[2]));+        }+        break;++    /* R, C/D */+    case OP_R :+        if (mop2t == OP_C)+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_CRG);+        else if (mop2t == OP_D)+            decode_modrm(u, &(iop[0]), mop1s, T_GPR, &(iop[1]), mop2s, T_DBG);+        break;++    /* C, R */+    case OP_C :+        decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_CRG);+        break;++    /* D, R */+    case OP_D :+        decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_DBG);+        break;++    /* Q, P */+    case OP_Q :+        decode_modrm(u, &(iop[0]), mop1s, T_MMX, &(iop[1]), mop2s, T_MMX);+        break;++    /* S, E */+    case OP_S :+        decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_SEG);+        break;++    /* W, V */+    case OP_W :+        decode_modrm(u, &(iop[0]), mop1s, T_XMM, &(iop[1]), mop2s, T_XMM);+        break;++    /* V, W[,I]/Q/M/E */+    case OP_V :+        if (mop2t == OP_W) {+            /* special cases for movlps and movhps */+            if (MODRM_MOD(inp_peek(u)) == 3) {+                if (u->mnemonic == UD_Imovlps)+                    u->mnemonic = UD_Imovhlps;+                else+                if (u->mnemonic == UD_Imovhps)+                    u->mnemonic = UD_Imovlhps;+            }+            decode_modrm(u, &(iop[1]), mop2s, T_XMM, &(iop[0]), mop1s, T_XMM);+            if (mop3t == OP_I)+                decode_imm(u, mop3s, &(iop[2]));+        } else if (mop2t == OP_Q)+            decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM);+        else if (mop2t == OP_M) {+            if (MODRM_MOD(inp_peek(u)) == 3)+                u->error= 1;+            decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM);+        } else if (mop2t == OP_E) {+            decode_modrm(u, &(iop[1]), mop2s, T_GPR, &(iop[0]), mop1s, T_XMM);+        } else if (mop2t == OP_PR) {+            decode_modrm(u, &(iop[1]), mop2s, T_MMX, &(iop[0]), mop1s, T_XMM);+        }+        break;++    /* DX, eAX/AL */+    case OP_DX :+        iop[0].type = UD_OP_REG;+        iop[0].base = UD_R_DX;+        iop[0].size = 16;++        if (mop2t == OP_eAX) {+            iop[1].type = UD_OP_REG;    +            iop[1].base = resolve_gpr32(u, mop2t);+        } else if (mop2t == OP_AL) {+            iop[1].type = UD_OP_REG;+            iop[1].base = UD_R_AL;+            iop[1].size = 8;+        }++        break;++    /* I, I/AL/eAX */+    case OP_I :+        decode_imm(u, mop1s, &(iop[0]));+        if (mop2t == OP_I)+            decode_imm(u, mop2s, &(iop[1]));+        else if (mop2t == OP_AL) {+            iop[1].type = UD_OP_REG;+            iop[1].base = UD_R_AL;+            iop[1].size = 16;+        } else if (mop2t == OP_eAX) {+            iop[1].type = UD_OP_REG;    +            iop[1].base = resolve_gpr32(u, mop2t);+        }+        break;++    /* O, AL/eAX */+    case OP_O :+        decode_o(u, mop1s, &(iop[0]));+        iop[1].type = UD_OP_REG;+        iop[1].size = resolve_operand_size(u, mop1s);+        if (mop2t == OP_AL)+            iop[1].base = UD_R_AL;+        else if (mop2t == OP_eAX)+            iop[1].base = resolve_gpr32(u, mop2t);+        else if (mop2t == OP_rAX)+            iop[1].base = resolve_gpr64(u, mop2t);      +        break;++    /* 3 */+    case OP_I3 :+        iop[0].type = UD_OP_CONST;+        iop[0].lval.sbyte = 3;+        break;++    /* ST(n), ST(n) */+    case OP_ST0 : case OP_ST1 : case OP_ST2 : case OP_ST3 :+    case OP_ST4 : case OP_ST5 : case OP_ST6 : case OP_ST7 :++        iop[0].type = UD_OP_REG;+        iop[0].base = (mop1t-OP_ST0) + UD_R_ST0;+        iop[0].size = 0;++        if (mop2t >= OP_ST0 && mop2t <= OP_ST7) {+            iop[1].type = UD_OP_REG;+            iop[1].base = (mop2t-OP_ST0) + UD_R_ST0;+            iop[1].size = 0;+        }+        break;++    /* AX */+    case OP_AX:+        iop[0].type = UD_OP_REG;+        iop[0].base = UD_R_AX;+        iop[0].size = 16;+        break;++    /* none */+    default :+        iop[0].type = iop[1].type = iop[2].type = UD_NONE;+  }++  return 0;+}++/* -----------------------------------------------------------------------------+ * clear_insn() - clear instruction pointer + * -----------------------------------------------------------------------------+ */+static int clear_insn(register struct ud* u)+{+  u->error     = 0;+  u->pfx_seg   = 0;+  u->pfx_opr   = 0;+  u->pfx_adr   = 0;+  u->pfx_lock  = 0;+  u->pfx_repne = 0;+  u->pfx_rep   = 0;+  u->pfx_repe  = 0;+  u->pfx_seg   = 0;+  u->pfx_rex   = 0;+  u->pfx_insn  = 0;+  u->mnemonic  = UD_Inone;+  u->itab_entry = NULL;++  memset( &u->operand[ 0 ], 0, sizeof( struct ud_operand ) );+  memset( &u->operand[ 1 ], 0, sizeof( struct ud_operand ) );+  memset( &u->operand[ 2 ], 0, sizeof( struct ud_operand ) );+ +  return 0;+}++static int do_mode( struct ud* u )+{+  /* if in error state, bail out */+  if ( u->error ) return -1; ++  /* propagate perfix effects */+  if ( u->dis_mode == 64 ) {  /* set 64bit-mode flags */++    /* Check validity of  instruction m64 */+    if ( P_INV64( u->itab_entry->prefix ) ) {+        u->error = 1;+        return -1;+    }++    /* effective rex prefix is the  effective mask for the +     * instruction hard-coded in the opcode map.+     */+    u->pfx_rex = ( u->pfx_rex & 0x40 ) | +                 ( u->pfx_rex & REX_PFX_MASK( u->itab_entry->prefix ) ); ++    /* whether this instruction has a default operand size of +     * 64bit, also hardcoded into the opcode map.+     */+    u->default64 = P_DEF64( u->itab_entry->prefix ); +    /* calculate effective operand size */+    if ( REX_W( u->pfx_rex ) ) {+        u->opr_mode = 64;+    } else if ( u->pfx_opr ) {+        u->opr_mode = 16;+    } else {+        /* unless the default opr size of instruction is 64,+         * the effective operand size in the absence of rex.w+         * prefix is 32.+         */+        u->opr_mode = ( u->default64 ) ? 64 : 32;+    }++    /* calculate effective address size */+    u->adr_mode = (u->pfx_adr) ? 32 : 64;+  } else if ( u->dis_mode == 32 ) { /* set 32bit-mode flags */+    u->opr_mode = ( u->pfx_opr ) ? 16 : 32;+    u->adr_mode = ( u->pfx_adr ) ? 16 : 32;+  } else if ( u->dis_mode == 16 ) { /* set 16bit-mode flags */+    u->opr_mode = ( u->pfx_opr ) ? 32 : 16;+    u->adr_mode = ( u->pfx_adr ) ? 32 : 16;+  }++  /* These flags determine which operand to apply the operand size+   * cast to.+   */+  u->c1 = ( P_C1( u->itab_entry->prefix ) ) ? 1 : 0;+  u->c2 = ( P_C2( u->itab_entry->prefix ) ) ? 1 : 0;+  u->c3 = ( P_C3( u->itab_entry->prefix ) ) ? 1 : 0;++  /* set flags for implicit addressing */+  u->implicit_addr = P_IMPADDR( u->itab_entry->prefix );++  return 0;+}++static int gen_hex( struct ud *u )+{+  unsigned int i;+  unsigned char *src_ptr = inp_sess( u );+  char* src_hex;++  /* bail out if in error stat. */+  if ( u->error ) return -1; +  /* output buffer pointe */+  src_hex = ( char* ) u->insn_hexcode;+  /* for each byte used to decode instruction */+  for ( i = 0; i < u->inp_ctr; ++i, ++src_ptr) {+    sprintf( src_hex, "%02x", *src_ptr & 0xFF );+    src_hex += 2;+  }+  return 0;+}++/* =============================================================================+ * ud_decode() - Instruction decoder. Returns the number of bytes decoded.+ * =============================================================================+ */+unsigned int ud_decode( struct ud* u )+{+  inp_start(u);++  if ( clear_insn( u ) ) {+    ; /* error */+  } else if ( get_prefixes( u ) != 0 ) {+    ; /* error */+  } else if ( search_itab( u ) != 0 ) {+    ; /* error */+  } else if ( do_mode( u ) != 0 ) {+    ; /* error */+  } else if ( disasm_operands( u ) != 0 ) {+    ; /* error */+  } else if ( resolve_mnemonic( u ) != 0 ) {+    ; /* error */+  }++  /* Handle decode error. */+  if ( u->error ) {+    /* clear out the decode data. */+    clear_insn( u );+    /* mark the sequence of bytes as invalid. */+    u->itab_entry = & ie_invalid;+    u->mnemonic = u->itab_entry->mnemonic;+  } ++  u->insn_offset = u->pc; /* set offset of instruction */+  u->insn_fill = 0;   /* set translation buffer index to 0 */+  u->pc += u->inp_ctr;    /* move program counter by bytes decoded */+  gen_hex( u );       /* generate hex code */++  /* return number of bytes disassembled. */+  return u->inp_ctr;+}++/* vim:cindent+ * vim:ts=4+ * vim:sw=4+ * vim:expandtab+ */
+ udis86-1.7/libudis86/decode.h view
@@ -0,0 +1,275 @@+#ifndef UD_DECODE_H+#define UD_DECODE_H++#define MAX_INSN_LENGTH 15++/* register classes */+#define T_NONE  0+#define T_GPR   1+#define T_MMX   2+#define T_CRG   3+#define T_DBG   4+#define T_SEG   5+#define T_XMM   6++/* itab prefix bits */+#define P_none          ( 0 )+#define P_c1            ( 1 << 0 )+#define P_C1(n)         ( ( n >> 0 ) & 1 )+#define P_rexb          ( 1 << 1 )+#define P_REXB(n)       ( ( n >> 1 ) & 1 )+#define P_depM          ( 1 << 2 )+#define P_DEPM(n)       ( ( n >> 2 ) & 1 )+#define P_c3            ( 1 << 3 )+#define P_C3(n)         ( ( n >> 3 ) & 1 )+#define P_inv64         ( 1 << 4 )+#define P_INV64(n)      ( ( n >> 4 ) & 1 )+#define P_rexw          ( 1 << 5 )+#define P_REXW(n)       ( ( n >> 5 ) & 1 )+#define P_c2            ( 1 << 6 )+#define P_C2(n)         ( ( n >> 6 ) & 1 )+#define P_def64         ( 1 << 7 )+#define P_DEF64(n)      ( ( n >> 7 ) & 1 )+#define P_rexr          ( 1 << 8 )+#define P_REXR(n)       ( ( n >> 8 ) & 1 )+#define P_oso           ( 1 << 9 )+#define P_OSO(n)        ( ( n >> 9 ) & 1 )+#define P_aso           ( 1 << 10 )+#define P_ASO(n)        ( ( n >> 10 ) & 1 )+#define P_rexx          ( 1 << 11 )+#define P_REXX(n)       ( ( n >> 11 ) & 1 )+#define P_ImpAddr       ( 1 << 12 )+#define P_IMPADDR(n)    ( ( n >> 12 ) & 1 )++/* rex prefix bits */+#define REX_W(r)        ( ( 0xF & ( r ) )  >> 3 )+#define REX_R(r)        ( ( 0x7 & ( r ) )  >> 2 )+#define REX_X(r)        ( ( 0x3 & ( r ) )  >> 1 )+#define REX_B(r)        ( ( 0x1 & ( r ) )  >> 0 )+#define REX_PFX_MASK(n) ( ( P_REXW(n) << 3 ) | \+                          ( P_REXR(n) << 2 ) | \+                          ( P_REXX(n) << 1 ) | \+                          ( P_REXB(n) << 0 ) )++/* scable-index-base bits */+#define SIB_S(b)        ( ( b ) >> 6 )+#define SIB_I(b)        ( ( ( b ) >> 3 ) & 7 )+#define SIB_B(b)        ( ( b ) & 7 )++/* modrm bits */+#define MODRM_REG(b)    ( ( ( b ) >> 3 ) & 7 )+#define MODRM_NNN(b)    ( ( ( b ) >> 3 ) & 7 )+#define MODRM_MOD(b)    ( ( ( b ) >> 6 ) & 3 )+#define MODRM_RM(b)     ( ( b ) & 7 )++/* operand type constants -- order is important! */++enum ud_operand_code {+    OP_NONE,++    OP_A,      OP_E,      OP_M,       OP_G,       +    OP_I,++    OP_AL,     OP_CL,     OP_DL,      OP_BL,+    OP_AH,     OP_CH,     OP_DH,      OP_BH,++    OP_ALr8b,  OP_CLr9b,  OP_DLr10b,  OP_BLr11b,+    OP_AHr12b, OP_CHr13b, OP_DHr14b,  OP_BHr15b,++    OP_AX,     OP_CX,     OP_DX,      OP_BX,+    OP_SI,     OP_DI,     OP_SP,      OP_BP,++    OP_rAX,    OP_rCX,    OP_rDX,     OP_rBX,  +    OP_rSP,    OP_rBP,    OP_rSI,     OP_rDI,++    OP_rAXr8,  OP_rCXr9,  OP_rDXr10,  OP_rBXr11,  +    OP_rSPr12, OP_rBPr13, OP_rSIr14,  OP_rDIr15,++    OP_eAX,    OP_eCX,    OP_eDX,     OP_eBX,+    OP_eSP,    OP_eBP,    OP_eSI,     OP_eDI,++    OP_ES,     OP_CS,     OP_SS,      OP_DS,  +    OP_FS,     OP_GS,++    OP_ST0,    OP_ST1,    OP_ST2,     OP_ST3,+    OP_ST4,    OP_ST5,    OP_ST6,     OP_ST7,++    OP_J,      OP_S,      OP_O,          +    OP_I1,     OP_I3, ++    OP_V,      OP_W,      OP_Q,       OP_P, ++    OP_R,      OP_C,  OP_D,       OP_VR,  OP_PR+};+++/* operand size constants */++enum ud_operand_size {+    SZ_NA  = 0,+    SZ_Z   = 1,+    SZ_V   = 2,+    SZ_P   = 3,+    SZ_WP  = 4,+    SZ_DP  = 5,+    SZ_MDQ = 6,+    SZ_RDQ = 7,++    /* the following values are used as is,+     * and thus hard-coded. changing them +     * will break internals +     */+    SZ_B   = 8,+    SZ_W   = 16,+    SZ_D   = 32,+    SZ_Q   = 64,+    SZ_T   = 80,+};++/* itab entry operand definitions */++#define O_rSPr12  { OP_rSPr12,   SZ_NA    }+#define O_BL      { OP_BL,       SZ_NA    }+#define O_BH      { OP_BH,       SZ_NA    }+#define O_BP      { OP_BP,       SZ_NA    }+#define O_AHr12b  { OP_AHr12b,   SZ_NA    }+#define O_BX      { OP_BX,       SZ_NA    }+#define O_Jz      { OP_J,        SZ_Z     }+#define O_Jv      { OP_J,        SZ_V     }+#define O_Jb      { OP_J,        SZ_B     }+#define O_rSIr14  { OP_rSIr14,   SZ_NA    }+#define O_GS      { OP_GS,       SZ_NA    }+#define O_D       { OP_D,        SZ_NA    }+#define O_rBPr13  { OP_rBPr13,   SZ_NA    }+#define O_Ob      { OP_O,        SZ_B     }+#define O_P       { OP_P,        SZ_NA    }+#define O_Ow      { OP_O,        SZ_W     }+#define O_Ov      { OP_O,        SZ_V     }+#define O_Gw      { OP_G,        SZ_W     }+#define O_Gv      { OP_G,        SZ_V     }+#define O_rDX     { OP_rDX,      SZ_NA    }+#define O_Gx      { OP_G,        SZ_MDQ   }+#define O_Gd      { OP_G,        SZ_D     }+#define O_Gb      { OP_G,        SZ_B     }+#define O_rBXr11  { OP_rBXr11,   SZ_NA    }+#define O_rDI     { OP_rDI,      SZ_NA    }+#define O_rSI     { OP_rSI,      SZ_NA    }+#define O_ALr8b   { OP_ALr8b,    SZ_NA    }+#define O_eDI     { OP_eDI,      SZ_NA    }+#define O_Gz      { OP_G,        SZ_Z     }+#define O_eDX     { OP_eDX,      SZ_NA    }+#define O_DHr14b  { OP_DHr14b,   SZ_NA    }+#define O_rSP     { OP_rSP,      SZ_NA    }+#define O_PR      { OP_PR,       SZ_NA    }+#define O_NONE    { OP_NONE,     SZ_NA    }+#define O_rCX     { OP_rCX,      SZ_NA    }+#define O_jWP     { OP_J,        SZ_WP    }+#define O_rDXr10  { OP_rDXr10,   SZ_NA    }+#define O_Md      { OP_M,        SZ_D     }+#define O_C       { OP_C,        SZ_NA    }+#define O_G       { OP_G,        SZ_NA    }+#define O_Mb      { OP_M,        SZ_B     }+#define O_Mt      { OP_M,        SZ_T     }+#define O_S       { OP_S,        SZ_NA    }+#define O_Mq      { OP_M,        SZ_Q     }+#define O_W       { OP_W,        SZ_NA    }+#define O_ES      { OP_ES,       SZ_NA    }+#define O_rBX     { OP_rBX,      SZ_NA    }+#define O_Ed      { OP_E,        SZ_D     }+#define O_DLr10b  { OP_DLr10b,   SZ_NA    }+#define O_Mw      { OP_M,        SZ_W     }+#define O_Eb      { OP_E,        SZ_B     }+#define O_Ex      { OP_E,        SZ_MDQ   }+#define O_Ez      { OP_E,        SZ_Z     }+#define O_Ew      { OP_E,        SZ_W     }+#define O_Ev      { OP_E,        SZ_V     }+#define O_Ep      { OP_E,        SZ_P     }+#define O_FS      { OP_FS,       SZ_NA    }+#define O_Ms      { OP_M,        SZ_W     }+#define O_rAXr8   { OP_rAXr8,    SZ_NA    }+#define O_eBP     { OP_eBP,      SZ_NA    }+#define O_Isb     { OP_I,        SZ_SB    }+#define O_eBX     { OP_eBX,      SZ_NA    }+#define O_rCXr9   { OP_rCXr9,    SZ_NA    }+#define O_jDP     { OP_J,        SZ_DP    }+#define O_CH      { OP_CH,       SZ_NA    }+#define O_CL      { OP_CL,       SZ_NA    }+#define O_R       { OP_R,        SZ_RDQ   }+#define O_V       { OP_V,        SZ_NA    }+#define O_CS      { OP_CS,       SZ_NA    }+#define O_CHr13b  { OP_CHr13b,   SZ_NA    }+#define O_eCX     { OP_eCX,      SZ_NA    }+#define O_eSP     { OP_eSP,      SZ_NA    }+#define O_SS      { OP_SS,       SZ_NA    }+#define O_SP      { OP_SP,       SZ_NA    }+#define O_BLr11b  { OP_BLr11b,   SZ_NA    }+#define O_SI      { OP_SI,       SZ_NA    }+#define O_eSI     { OP_eSI,      SZ_NA    }+#define O_DL      { OP_DL,       SZ_NA    }+#define O_DH      { OP_DH,       SZ_NA    }+#define O_DI      { OP_DI,       SZ_NA    }+#define O_DX      { OP_DX,       SZ_NA    }+#define O_rBP     { OP_rBP,      SZ_NA    }+#define O_Gvw     { OP_G,        SZ_MDQ   }+#define O_I1      { OP_I1,       SZ_NA    }+#define O_I3      { OP_I3,       SZ_NA    }+#define O_DS      { OP_DS,       SZ_NA    }+#define O_ST4     { OP_ST4,      SZ_NA    }+#define O_ST5     { OP_ST5,      SZ_NA    }+#define O_ST6     { OP_ST6,      SZ_NA    }+#define O_ST7     { OP_ST7,      SZ_NA    }+#define O_ST0     { OP_ST0,      SZ_NA    }+#define O_ST1     { OP_ST1,      SZ_NA    }+#define O_ST2     { OP_ST2,      SZ_NA    }+#define O_ST3     { OP_ST3,      SZ_NA    }+#define O_E       { OP_E,        SZ_NA    }+#define O_AH      { OP_AH,       SZ_NA    }+#define O_M       { OP_M,        SZ_NA    }+#define O_AL      { OP_AL,       SZ_NA    }+#define O_CLr9b   { OP_CLr9b,    SZ_NA    }+#define O_Q       { OP_Q,        SZ_NA    }+#define O_eAX     { OP_eAX,      SZ_NA    }+#define O_VR      { OP_VR,       SZ_NA    }+#define O_AX      { OP_AX,       SZ_NA    }+#define O_rAX     { OP_rAX,      SZ_NA    }+#define O_Iz      { OP_I,        SZ_Z     }+#define O_rDIr15  { OP_rDIr15,   SZ_NA    }+#define O_Iw      { OP_I,        SZ_W     }+#define O_Iv      { OP_I,        SZ_V     }+#define O_Ap      { OP_A,        SZ_P     }+#define O_CX      { OP_CX,       SZ_NA    }+#define O_Ib      { OP_I,        SZ_B     }+#define O_BHr15b  { OP_BHr15b,   SZ_NA    }+++/* A single operand of an entry in the instruction table. + * (internal use only)+ */+struct ud_itab_entry_operand +{+  enum ud_operand_code type;+  enum ud_operand_size size;+};+++/* A single entry in an instruction table. + *(internal use only)+ */+struct ud_itab_entry +{+  enum ud_mnemonic_code         mnemonic;+  struct ud_itab_entry_operand  operand1;+  struct ud_itab_entry_operand  operand2;+  struct ud_itab_entry_operand  operand3;+  uint32_t                      prefix;+};++extern const char * ud_lookup_mnemonic( enum ud_mnemonic_code c );++#endif /* UD_DECODE_H */++/* vim:cindent+ * vim:expandtab+ * vim:ts=4+ * vim:sw=4+ */
+ udis86-1.7/libudis86/extern.h view
@@ -0,0 +1,67 @@+/* -----------------------------------------------------------------------------+ * extern.h+ *+ * Copyright (c) 2004, 2005, 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */+#ifndef UD_EXTERN_H+#define UD_EXTERN_H++#ifdef __cplusplus+extern "C" {+#endif++#include <stdio.h>+#include "types.h"++/* ============================= PUBLIC API ================================= */++extern void ud_init(struct ud*);++extern void ud_set_mode(struct ud*, uint8_t);++extern void ud_set_pc(struct ud*, uint64_t);++extern void ud_set_input_hook(struct ud*, int (*)(struct ud*));++extern void ud_set_input_buffer(struct ud*, uint8_t*, size_t);++#ifndef __UD_STANDALONE__+extern void ud_set_input_file(struct ud*, FILE*);+#endif /* __UD_STANDALONE__ */++extern void ud_set_vendor(struct ud*, unsigned);++extern void ud_set_syntax(struct ud*, void (*)(struct ud*));++extern void ud_input_skip(struct ud*, size_t);++extern int ud_input_end(struct ud*);++extern unsigned int ud_decode(struct ud*);++extern unsigned int ud_disassemble(struct ud*);++extern void ud_translate_intel(struct ud*);++extern void ud_translate_att(struct ud*);++extern char* ud_insn_asm(struct ud* u);++extern uint8_t* ud_insn_ptr(struct ud* u);++extern uint64_t ud_insn_off(struct ud*);++extern char* ud_insn_hex(struct ud*);++extern unsigned int ud_insn_len(struct ud* u);++extern const char* ud_lookup_mnemonic(enum ud_mnemonic_code c);++/* ========================================================================== */++#ifdef __cplusplus+}+#endif+#endif
+ udis86-1.7/libudis86/input.c view
@@ -0,0 +1,226 @@+/* -----------------------------------------------------------------------------+ * input.c+ *+ * Copyright (c) 2004, 2005, 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */+#include "extern.h"+#include "types.h"+#include "input.h"++/* -----------------------------------------------------------------------------+ * inp_buff_hook() - Hook for buffered inputs.+ * -----------------------------------------------------------------------------+ */+static int +inp_buff_hook(struct ud* u)+{+  if (u->inp_buff < u->inp_buff_end)+	return *u->inp_buff++;+  else	return -1;+}++#ifndef __UD_STANDALONE__+/* -----------------------------------------------------------------------------+ * inp_file_hook() - Hook for FILE inputs.+ * -----------------------------------------------------------------------------+ */+static int +inp_file_hook(struct ud* u)+{+  return fgetc(u->inp_file);+}+#endif /* __UD_STANDALONE__*/++/* =============================================================================+ * ud_inp_set_hook() - Sets input hook.+ * =============================================================================+ */+extern void +ud_set_input_hook(register struct ud* u, int (*hook)(struct ud*))+{+  u->inp_hook = hook;+  inp_init(u);+}++/* =============================================================================+ * ud_inp_set_buffer() - Set buffer as input.+ * =============================================================================+ */+extern void +ud_set_input_buffer(register struct ud* u, uint8_t* buf, size_t len)+{+  u->inp_hook = inp_buff_hook;+  u->inp_buff = buf;+  u->inp_buff_end = buf + len;+  inp_init(u);+}++#ifndef __UD_STANDALONE__+/* =============================================================================+ * ud_input_set_file() - Set buffer as input.+ * =============================================================================+ */+extern void +ud_set_input_file(register struct ud* u, FILE* f)+{+  u->inp_hook = inp_file_hook;+  u->inp_file = f;+  inp_init(u);+}+#endif /* __UD_STANDALONE__ */++/* =============================================================================+ * ud_input_skip() - Skip n input bytes.+ * =============================================================================+ */+extern void +ud_input_skip(struct ud* u, size_t n)+{+  while (n--) {+	u->inp_hook(u);+  }+}++/* =============================================================================+ * ud_input_end() - Test for end of input.+ * =============================================================================+ */+extern int +ud_input_end(struct ud* u)+{+  return (u->inp_curr == u->inp_fill) && u->inp_end;+}++/* -----------------------------------------------------------------------------+ * inp_next() - Loads and returns the next byte from input.+ *+ * inp_curr and inp_fill are pointers to the cache. The program is written based+ * on the property that they are 8-bits in size, and will eventually wrap around+ * forming a circular buffer. So, the size of the cache is 256 in size, kind of+ * unnecessary yet optimized.+ *+ * A buffer inp_sess stores the bytes disassembled for a single session.+ * -----------------------------------------------------------------------------+ */+extern uint8_t inp_next(struct ud* u) +{+  int c = -1;+  /* if current pointer is not upto the fill point in the +   * input cache.+   */+  if ( u->inp_curr != u->inp_fill ) {+	c = u->inp_cache[ ++u->inp_curr ];+  /* if !end-of-input, call the input hook and get a byte */+  } else if ( u->inp_end || ( c = u->inp_hook( u ) ) == -1 ) {+	/* end-of-input, mark it as an error, since the decoder,+	 * expected a byte more.+	 */+	u->error = 1;+	/* flag end of input */+	u->inp_end = 1;+	return 0;+  } else {+	/* increment pointers, we have a new byte.  */+	u->inp_curr = ++u->inp_fill;+	/* add the byte to the cache */+	u->inp_cache[ u->inp_fill ] = c;+  }+  /* record bytes input per decode-session. */+  u->inp_sess[ u->inp_ctr++ ] = c;+  /* return byte */+  return ( uint8_t ) c;+}++/* -----------------------------------------------------------------------------+ * inp_back() - Move back a single byte in the stream.+ * -----------------------------------------------------------------------------+ */+extern void+inp_back(struct ud* u) +{+  if ( u->inp_ctr > 0 ) {+	--u->inp_curr;+	--u->inp_ctr;+  }+}++/* -----------------------------------------------------------------------------+ * inp_peek() - Peek into the next byte in source. + * -----------------------------------------------------------------------------+ */+extern uint8_t+inp_peek(struct ud* u) +{+  uint8_t r = inp_next(u);+  if ( !u->error ) inp_back(u); /* Don't backup if there was an error */+  return r;+}++/* -----------------------------------------------------------------------------+ * inp_move() - Move ahead n input bytes.+ * -----------------------------------------------------------------------------+ */+extern void+inp_move(struct ud* u, size_t n) +{+  while (n--)+	inp_next(u);+}++/*------------------------------------------------------------------------------+ *  inp_uintN() - return uintN from source.+ *------------------------------------------------------------------------------+ */+extern uint8_t +inp_uint8(struct ud* u)+{+  return inp_next(u);+}++extern uint16_t +inp_uint16(struct ud* u)+{+  uint16_t r, ret;++  ret = inp_next(u);+  r = inp_next(u);+  return ret | (r << 8);+}++extern uint32_t +inp_uint32(struct ud* u)+{+  uint32_t r, ret;++  ret = inp_next(u);+  r = inp_next(u);+  ret = ret | (r << 8);+  r = inp_next(u);+  ret = ret | (r << 16);+  r = inp_next(u);+  return ret | (r << 24);+}++extern uint64_t +inp_uint64(struct ud* u)+{+  uint64_t r, ret;++  ret = inp_next(u);+  r = inp_next(u);+  ret = ret | (r << 8);+  r = inp_next(u);+  ret = ret | (r << 16);+  r = inp_next(u);+  ret = ret | (r << 24);+  r = inp_next(u);+  ret = ret | (r << 32);+  r = inp_next(u);+  ret = ret | (r << 40);+  r = inp_next(u);+  ret = ret | (r << 48);+  r = inp_next(u);+  return ret | (r << 56);+}
+ udis86-1.7/libudis86/input.h view
@@ -0,0 +1,49 @@+/* -----------------------------------------------------------------------------+ * input.h+ *+ * Copyright (c) 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */+#ifndef UD_INPUT_H+#define UD_INPUT_H++#include "types.h"++uint8_t inp_next(struct ud*);+uint8_t inp_peek(struct ud*);+uint8_t inp_uint8(struct ud*);+uint16_t inp_uint16(struct ud*);+uint32_t inp_uint32(struct ud*);+uint64_t inp_uint64(struct ud*);+void inp_move(struct ud*, size_t);+void inp_back(struct ud*);++/* inp_init() - Initializes the input system. */+#define inp_init(u) \+do { \+  u->inp_curr = 0; \+  u->inp_fill = 0; \+  u->inp_ctr  = 0; \+  u->inp_end  = 0; \+} while (0)++/* inp_start() - Should be called before each de-code operation. */+#define inp_start(u) u->inp_ctr = 0++/* inp_back() - Resets the current pointer to its position before the current+ * instruction disassembly was started.+ */+#define inp_reset(u) \+do { \+  u->inp_curr -= u->inp_ctr; \+  u->inp_ctr = 0; \+} while (0)++/* inp_sess() - Returns the pointer to current session. */+#define inp_sess(u) (u->inp_sess)++/* inp_cur() - Returns the current input byte. */+#define inp_curr(u) ((u)->inp_cache[(u)->inp_curr])++#endif
+ udis86-1.7/libudis86/itab.c view
@@ -0,0 +1,3668 @@++/* itab.c -- auto generated by opgen.py, do not edit. */++#include "types.h"+#include "decode.h"+#include "itab.h"++const char * ud_mnemonics_str[] = {+  "3dnow",+  "aaa",+  "aad",+  "aam",+  "aas",+  "adc",+  "add",+  "addpd",+  "addps",+  "addsd",+  "addss",+  "addsubpd",+  "addsubps",+  "and",+  "andpd",+  "andps",+  "andnpd",+  "andnps",+  "arpl",+  "movsxd",+  "bound",+  "bsf",+  "bsr",+  "bswap",+  "bt",+  "btc",+  "btr",+  "bts",+  "call",+  "cbw",+  "cwde",+  "cdqe",+  "clc",+  "cld",+  "clflush",+  "clgi",+  "cli",+  "clts",+  "cmc",+  "cmovo",+  "cmovno",+  "cmovb",+  "cmovae",+  "cmovz",+  "cmovnz",+  "cmovbe",+  "cmova",+  "cmovs",+  "cmovns",+  "cmovp",+  "cmovnp",+  "cmovl",+  "cmovge",+  "cmovle",+  "cmovg",+  "cmp",+  "cmppd",+  "cmpps",+  "cmpsb",+  "cmpsw",+  "cmpsd",+  "cmpsq",+  "cmpss",+  "cmpxchg",+  "cmpxchg8b",+  "comisd",+  "comiss",+  "cpuid",+  "cvtdq2pd",+  "cvtdq2ps",+  "cvtpd2dq",+  "cvtpd2pi",+  "cvtpd2ps",+  "cvtpi2ps",+  "cvtpi2pd",+  "cvtps2dq",+  "cvtps2pi",+  "cvtps2pd",+  "cvtsd2si",+  "cvtsd2ss",+  "cvtsi2ss",+  "cvtss2si",+  "cvtss2sd",+  "cvttpd2pi",+  "cvttpd2dq",+  "cvttps2dq",+  "cvttps2pi",+  "cvttsd2si",+  "cvtsi2sd",+  "cvttss2si",+  "cwd",+  "cdq",+  "cqo",+  "daa",+  "das",+  "dec",+  "div",+  "divpd",+  "divps",+  "divsd",+  "divss",+  "emms",+  "enter",+  "f2xm1",+  "fabs",+  "fadd",+  "faddp",+  "fbld",+  "fbstp",+  "fchs",+  "fclex",+  "fcmovb",+  "fcmove",+  "fcmovbe",+  "fcmovu",+  "fcmovnb",+  "fcmovne",+  "fcmovnbe",+  "fcmovnu",+  "fucomi",+  "fcom",+  "fcom2",+  "fcomp3",+  "fcomi",+  "fucomip",+  "fcomip",+  "fcomp",+  "fcomp5",+  "fcompp",+  "fcos",+  "fdecstp",+  "fdiv",+  "fdivp",+  "fdivr",+  "fdivrp",+  "femms",+  "ffree",+  "ffreep",+  "ficom",+  "ficomp",+  "fild",+  "fncstp",+  "fninit",+  "fiadd",+  "fidivr",+  "fidiv",+  "fisub",+  "fisubr",+  "fist",+  "fistp",+  "fisttp",+  "fld",+  "fld1",+  "fldl2t",+  "fldl2e",+  "fldlpi",+  "fldlg2",+  "fldln2",+  "fldz",+  "fldcw",+  "fldenv",+  "fmul",+  "fmulp",+  "fimul",+  "fnop",+  "fpatan",+  "fprem",+  "fprem1",+  "fptan",+  "frndint",+  "frstor",+  "fnsave",+  "fscale",+  "fsin",+  "fsincos",+  "fsqrt",+  "fstp",+  "fstp1",+  "fstp8",+  "fstp9",+  "fst",+  "fnstcw",+  "fnstenv",+  "fnstsw",+  "fsub",+  "fsubp",+  "fsubr",+  "fsubrp",+  "ftst",+  "fucom",+  "fucomp",+  "fucompp",+  "fxam",+  "fxch",+  "fxch4",+  "fxch7",+  "fxrstor",+  "fxsave",+  "fpxtract",+  "fyl2x",+  "fyl2xp1",+  "haddpd",+  "haddps",+  "hlt",+  "hsubpd",+  "hsubps",+  "idiv",+  "in",+  "imul",+  "inc",+  "insb",+  "insw",+  "insd",+  "int1",+  "int3",+  "int",+  "into",+  "invd",+  "invlpg",+  "invlpga",+  "iretw",+  "iretd",+  "iretq",+  "jo",+  "jno",+  "jb",+  "jae",+  "jz",+  "jnz",+  "jbe",+  "ja",+  "js",+  "jns",+  "jp",+  "jnp",+  "jl",+  "jge",+  "jle",+  "jg",+  "jcxz",+  "jecxz",+  "jrcxz",+  "jmp",+  "lahf",+  "lar",+  "lddqu",+  "ldmxcsr",+  "lds",+  "lea",+  "les",+  "lfs",+  "lgs",+  "lidt",+  "lss",+  "leave",+  "lfence",+  "lgdt",+  "lldt",+  "lmsw",+  "lock",+  "lodsb",+  "lodsw",+  "lodsd",+  "lodsq",+  "loopnz",+  "loope",+  "loop",+  "lsl",+  "ltr",+  "maskmovq",+  "maxpd",+  "maxps",+  "maxsd",+  "maxss",+  "mfence",+  "minpd",+  "minps",+  "minsd",+  "minss",+  "monitor",+  "mov",+  "movapd",+  "movaps",+  "movd",+  "movddup",+  "movdqa",+  "movdqu",+  "movdq2q",+  "movhpd",+  "movhps",+  "movlhps",+  "movlpd",+  "movlps",+  "movhlps",+  "movmskpd",+  "movmskps",+  "movntdq",+  "movnti",+  "movntpd",+  "movntps",+  "movntq",+  "movq",+  "movqa",+  "movq2dq",+  "movsb",+  "movsw",+  "movsd",+  "movsq",+  "movsldup",+  "movshdup",+  "movss",+  "movsx",+  "movupd",+  "movups",+  "movzx",+  "mul",+  "mulpd",+  "mulps",+  "mulsd",+  "mulss",+  "mwait",+  "neg",+  "nop",+  "not",+  "or",+  "orpd",+  "orps",+  "out",+  "outsb",+  "outsw",+  "outsd",+  "outsq",+  "packsswb",+  "packssdw",+  "packuswb",+  "paddb",+  "paddw",+  "paddq",+  "paddsb",+  "paddsw",+  "paddusb",+  "paddusw",+  "pand",+  "pandn",+  "pause",+  "pavgb",+  "pavgw",+  "pcmpeqb",+  "pcmpeqw",+  "pcmpeqd",+  "pcmpgtb",+  "pcmpgtw",+  "pcmpgtd",+  "pextrw",+  "pinsrw",+  "pmaddwd",+  "pmaxsw",+  "pmaxub",+  "pminsw",+  "pminub",+  "pmovmskb",+  "pmulhuw",+  "pmulhw",+  "pmullw",+  "pmuludq",+  "pop",+  "popa",+  "popad",+  "popfw",+  "popfd",+  "popfq",+  "por",+  "prefetch",+  "prefetchnta",+  "prefetcht0",+  "prefetcht1",+  "prefetcht2",+  "psadbw",+  "pshufd",+  "pshufhw",+  "pshuflw",+  "pshufw",+  "pslldq",+  "psllw",+  "pslld",+  "psllq",+  "psraw",+  "psrad",+  "psrlw",+  "psrld",+  "psrlq",+  "psrldq",+  "psubb",+  "psubw",+  "psubd",+  "psubq",+  "psubsb",+  "psubsw",+  "psubusb",+  "psubusw",+  "punpckhbw",+  "punpckhwd",+  "punpckhdq",+  "punpckhqdq",+  "punpcklbw",+  "punpcklwd",+  "punpckldq",+  "punpcklqdq",+  "pi2fw",+  "pi2fd",+  "pf2iw",+  "pf2id",+  "pfnacc",+  "pfpnacc",+  "pfcmpge",+  "pfmin",+  "pfrcp",+  "pfrsqrt",+  "pfsub",+  "pfadd",+  "pfcmpgt",+  "pfmax",+  "pfrcpit1",+  "pfrspit1",+  "pfsubr",+  "pfacc",+  "pfcmpeq",+  "pfmul",+  "pfrcpit2",+  "pmulhrw",+  "pswapd",+  "pavgusb",+  "push",+  "pusha",+  "pushad",+  "pushfw",+  "pushfd",+  "pushfq",+  "pxor",+  "rcl",+  "rcr",+  "rol",+  "ror",+  "rcpps",+  "rcpss",+  "rdmsr",+  "rdpmc",+  "rdtsc",+  "rdtscp",+  "repne",+  "rep",+  "ret",+  "retf",+  "rsm",+  "rsqrtps",+  "rsqrtss",+  "sahf",+  "sal",+  "salc",+  "sar",+  "shl",+  "shr",+  "sbb",+  "scasb",+  "scasw",+  "scasd",+  "scasq",+  "seto",+  "setno",+  "setb",+  "setnb",+  "setz",+  "setnz",+  "setbe",+  "seta",+  "sets",+  "setns",+  "setp",+  "setnp",+  "setl",+  "setge",+  "setle",+  "setg",+  "sfence",+  "sgdt",+  "shld",+  "shrd",+  "shufpd",+  "shufps",+  "sidt",+  "sldt",+  "smsw",+  "sqrtps",+  "sqrtpd",+  "sqrtsd",+  "sqrtss",+  "stc",+  "std",+  "stgi",+  "sti",+  "skinit",+  "stmxcsr",+  "stosb",+  "stosw",+  "stosd",+  "stosq",+  "str",+  "sub",+  "subpd",+  "subps",+  "subsd",+  "subss",+  "swapgs",+  "syscall",+  "sysenter",+  "sysexit",+  "sysret",+  "test",+  "ucomisd",+  "ucomiss",+  "ud2",+  "unpckhpd",+  "unpckhps",+  "unpcklps",+  "unpcklpd",+  "verr",+  "verw",+  "vmcall",+  "vmclear",+  "vmxon",+  "vmptrld",+  "vmptrst",+  "vmresume",+  "vmxoff",+  "vmrun",+  "vmmcall",+  "vmload",+  "vmsave",+  "wait",+  "wbinvd",+  "wrmsr",+  "xadd",+  "xchg",+  "xlatb",+  "xor",+  "xorpd",+  "xorps",+  "db",+  "invalid",+};++++static struct ud_itab_entry itab__0f[256] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_00__REG },+  /* 01 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG },+  /* 02 */  { UD_Ilar,         O_Gv,    O_Ew,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ilsl,         O_Gv,    O_Ew,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Isyscall,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 06 */  { UD_Iclts,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 07 */  { UD_Isysret,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 08 */  { UD_Iinvd,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 09 */  { UD_Iwbinvd,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 0A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0B */  { UD_Iud2,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 0C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0D */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_0D__REG },+  /* 0E */  { UD_Ifemms,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Imovups,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 11 */  { UD_Imovups,      O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 12 */  { UD_Imovlps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 13 */  { UD_Imovlps,      O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 14 */  { UD_Iunpcklps,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 15 */  { UD_Iunpckhps,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 16 */  { UD_Imovhps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 17 */  { UD_Imovhps,      O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 18 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_18__REG },+  /* 19 */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1A */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1B */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1C */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1D */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1E */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1F */  { UD_Inop,         O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 20 */  { UD_Imov,         O_R,     O_C,     O_NONE,  P_rexr },+  /* 21 */  { UD_Imov,         O_R,     O_D,     O_NONE,  P_rexr },+  /* 22 */  { UD_Imov,         O_C,     O_R,     O_NONE,  P_rexr },+  /* 23 */  { UD_Imov,         O_D,     O_R,     O_NONE,  P_rexr },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Imovaps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 29 */  { UD_Imovaps,      O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2A */  { UD_Icvtpi2ps,    O_V,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2B */  { UD_Imovntps,     O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2C */  { UD_Icvttps2pi,   O_P,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2D */  { UD_Icvtps2pi,    O_P,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2E */  { UD_Iucomiss,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2F */  { UD_Icomiss,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 30 */  { UD_Iwrmsr,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 31 */  { UD_Irdtsc,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 32 */  { UD_Irdmsr,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 33 */  { UD_Irdpmc,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 34 */  { UD_Isysenter,    O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* 35 */  { UD_Isysexit,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 40 */  { UD_Icmovo,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 41 */  { UD_Icmovno,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 42 */  { UD_Icmovb,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 43 */  { UD_Icmovae,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 44 */  { UD_Icmovz,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 45 */  { UD_Icmovnz,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 46 */  { UD_Icmovbe,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 47 */  { UD_Icmova,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 48 */  { UD_Icmovs,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 49 */  { UD_Icmovns,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 4A */  { UD_Icmovp,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 4B */  { UD_Icmovnp,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 4C */  { UD_Icmovl,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 4D */  { UD_Icmovge,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 4E */  { UD_Icmovle,      O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 4F */  { UD_Icmovg,       O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 50 */  { UD_Imovmskps,    O_Gd,    O_VR,    O_NONE,  P_oso|P_rexr|P_rexb },+  /* 51 */  { UD_Isqrtps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 52 */  { UD_Irsqrtps,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 53 */  { UD_Ircpps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 54 */  { UD_Iandps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 55 */  { UD_Iandnps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 56 */  { UD_Iorps,        O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 57 */  { UD_Ixorps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 58 */  { UD_Iaddps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 59 */  { UD_Imulps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5A */  { UD_Icvtps2pd,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5B */  { UD_Icvtdq2ps,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5C */  { UD_Isubps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5D */  { UD_Iminps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5E */  { UD_Idivps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5F */  { UD_Imaxps,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 60 */  { UD_Ipunpcklbw,   O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 61 */  { UD_Ipunpcklwd,   O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 62 */  { UD_Ipunpckldq,   O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 63 */  { UD_Ipacksswb,    O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 64 */  { UD_Ipcmpgtb,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 65 */  { UD_Ipcmpgtw,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 66 */  { UD_Ipcmpgtd,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 67 */  { UD_Ipackuswb,    O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 68 */  { UD_Ipunpckhbw,   O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 69 */  { UD_Ipunpckhwd,   O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6A */  { UD_Ipunpckhdq,   O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6B */  { UD_Ipackssdw,    O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6E */  { UD_Imovd,        O_P,     O_Ex,    O_NONE,  P_c2|P_aso|P_rexr|P_rexx|P_rexb },+  /* 6F */  { UD_Imovq,        O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 70 */  { UD_Ipshufw,      O_P,     O_Q,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* 71 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_71__REG },+  /* 72 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_72__REG },+  /* 73 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_73__REG },+  /* 74 */  { UD_Ipcmpeqb,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 75 */  { UD_Ipcmpeqw,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 76 */  { UD_Ipcmpeqd,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 77 */  { UD_Iemms,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 78 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 79 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7E */  { UD_Imovd,        O_Ex,    O_P,     O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 7F */  { UD_Imovq,        O_Q,     O_P,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 80 */  { UD_Ijo,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 81 */  { UD_Ijno,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 82 */  { UD_Ijb,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 83 */  { UD_Ijae,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 84 */  { UD_Ijz,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 85 */  { UD_Ijnz,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 86 */  { UD_Ijbe,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 87 */  { UD_Ija,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 88 */  { UD_Ijs,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 89 */  { UD_Ijns,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 8A */  { UD_Ijp,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 8B */  { UD_Ijnp,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 8C */  { UD_Ijl,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 8D */  { UD_Ijge,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 8E */  { UD_Ijle,         O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 8F */  { UD_Ijg,          O_Jz,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_oso },+  /* 90 */  { UD_Iseto,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 91 */  { UD_Isetno,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 92 */  { UD_Isetb,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 93 */  { UD_Isetnb,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 94 */  { UD_Isetz,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 95 */  { UD_Isetnz,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 96 */  { UD_Isetbe,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 97 */  { UD_Iseta,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 98 */  { UD_Isets,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 99 */  { UD_Isetns,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 9A */  { UD_Isetp,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 9B */  { UD_Isetnp,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 9C */  { UD_Isetl,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 9D */  { UD_Isetge,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 9E */  { UD_Isetle,       O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 9F */  { UD_Isetg,        O_Eb,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* A0 */  { UD_Ipush,        O_FS,    O_NONE,  O_NONE,  P_none },+  /* A1 */  { UD_Ipop,         O_FS,    O_NONE,  O_NONE,  P_none },+  /* A2 */  { UD_Icpuid,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* A3 */  { UD_Ibt,          O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* A4 */  { UD_Ishld,        O_Ev,    O_Gv,    O_Ib,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* A5 */  { UD_Ishld,        O_Ev,    O_Gv,    O_CL,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* A6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A8 */  { UD_Ipush,        O_GS,    O_NONE,  O_NONE,  P_none },+  /* A9 */  { UD_Ipop,         O_GS,    O_NONE,  O_NONE,  P_none },+  /* AA */  { UD_Irsm,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* AB */  { UD_Ibts,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* AC */  { UD_Ishrd,        O_Ev,    O_Gv,    O_Ib,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* AD */  { UD_Ishrd,        O_Ev,    O_Gv,    O_CL,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* AE */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG },+  /* AF */  { UD_Iimul,        O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B0 */  { UD_Icmpxchg,     O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* B1 */  { UD_Icmpxchg,     O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B2 */  { UD_Ilss,         O_Gz,    O_M,     O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B3 */  { UD_Ibtr,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B4 */  { UD_Ilfs,         O_Gz,    O_M,     O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B5 */  { UD_Ilgs,         O_Gz,    O_M,     O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B6 */  { UD_Imovzx,       O_Gv,    O_Eb,    O_NONE,  P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B7 */  { UD_Imovzx,       O_Gv,    O_Ew,    O_NONE,  P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* B8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BA */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_BA__REG },+  /* BB */  { UD_Ibtc,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* BC */  { UD_Ibsf,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* BD */  { UD_Ibsr,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* BE */  { UD_Imovsx,       O_Gv,    O_Eb,    O_NONE,  P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* BF */  { UD_Imovsx,       O_Gv,    O_Ew,    O_NONE,  P_c2|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C0 */  { UD_Ixadd,        O_Eb,    O_Gb,    O_NONE,  P_aso|P_oso|P_rexr|P_rexx|P_rexb },+  /* C1 */  { UD_Ixadd,        O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C2 */  { UD_Icmpps,       O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* C3 */  { UD_Imovnti,      O_M,     O_Gvw,   O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C4 */  { UD_Ipinsrw,      O_P,     O_Ew,    O_Ib,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C5 */  { UD_Ipextrw,      O_Gd,    O_PR,    O_Ib,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C6 */  { UD_Ishufps,      O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* C7 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_C7__REG },+  /* C8 */  { UD_Ibswap,       O_rAXr8, O_NONE,  O_NONE,  P_oso|P_rexw|P_rexb },+  /* C9 */  { UD_Ibswap,       O_rCXr9, O_NONE,  O_NONE,  P_oso|P_rexw|P_rexb },+  /* CA */  { UD_Ibswap,       O_rDXr10, O_NONE,  O_NONE, P_oso|P_rexw|P_rexb },+  /* CB */  { UD_Ibswap,       O_rBXr11, O_NONE,  O_NONE, P_oso|P_rexw|P_rexb },+  /* CC */  { UD_Ibswap,       O_rSPr12, O_NONE,  O_NONE, P_oso|P_rexw|P_rexb },+  /* CD */  { UD_Ibswap,       O_rBPr13, O_NONE,  O_NONE, P_oso|P_rexw|P_rexb },+  /* CE */  { UD_Ibswap,       O_rSIr14, O_NONE,  O_NONE, P_oso|P_rexw|P_rexb },+  /* CF */  { UD_Ibswap,       O_rDIr15, O_NONE,  O_NONE, P_oso|P_rexw|P_rexb },+  /* D0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D1 */  { UD_Ipsrlw,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D2 */  { UD_Ipsrld,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D3 */  { UD_Ipsrlq,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D4 */  { UD_Ipaddq,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D5 */  { UD_Ipmullw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D7 */  { UD_Ipmovmskb,    O_Gd,    O_PR,    O_NONE,  P_oso|P_rexr|P_rexb },+  /* D8 */  { UD_Ipsubusb,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D9 */  { UD_Ipsubusw,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DA */  { UD_Ipminub,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DB */  { UD_Ipand,        O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DC */  { UD_Ipaddusb,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DD */  { UD_Ipaddusw,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DE */  { UD_Ipmaxub,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DF */  { UD_Ipandn,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E0 */  { UD_Ipavgb,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E1 */  { UD_Ipsraw,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E2 */  { UD_Ipsrad,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E3 */  { UD_Ipavgw,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E4 */  { UD_Ipmulhuw,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E5 */  { UD_Ipmulhw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E7 */  { UD_Imovntq,      O_M,     O_P,     O_NONE,  P_none },+  /* E8 */  { UD_Ipsubsb,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E9 */  { UD_Ipsubsw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EA */  { UD_Ipminsw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EB */  { UD_Ipor,         O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EC */  { UD_Ipaddsb,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* ED */  { UD_Ipaddsw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EE */  { UD_Ipmaxsw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EF */  { UD_Ipxor,        O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F1 */  { UD_Ipsllw,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F2 */  { UD_Ipslld,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F3 */  { UD_Ipsllq,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F4 */  { UD_Ipmuludq,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F5 */  { UD_Ipmaddwd,     O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F6 */  { UD_Ipsadbw,      O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F7 */  { UD_Imaskmovq,    O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F8 */  { UD_Ipsubb,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F9 */  { UD_Ipsubw,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FA */  { UD_Ipsubd,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FB */  { UD_Ipsubq,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FC */  { UD_Ipaddb,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FD */  { UD_Ipaddw,       O_P,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_00__reg[8] = {+  /* 00 */  { UD_Isldt,        O_Ev,    O_NONE,  O_NONE,  P_aso|P_oso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Istr,         O_Ev,    O_NONE,  O_NONE,  P_aso|P_oso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Illdt,        O_Ew,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Iltr,         O_Ew,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iverr,        O_Ew,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Iverw,        O_Ew,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg[8] = {+  /* 00 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_00__MOD },+  /* 01 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_01__MOD },+  /* 02 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_02__MOD },+  /* 03 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD },+  /* 04 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_04__MOD },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_06__MOD },+  /* 07 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_07__MOD },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod[2] = {+  /* 00 */  { UD_Isgdt,        O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR },+  /* 04 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmcall,      O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmresume,    O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmxoff,      O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod[2] = {+  /* 00 */  { UD_Isidt,        O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_01__mod__op_01__rm[8] = {+  /* 00 */  { UD_Imonitor,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Imwait,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_02__mod[2] = {+  /* 00 */  { UD_Ilgdt,        O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod[2] = {+  /* 00 */  { UD_Ilidt,        O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm[8] = {+  /* 00 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR },+  /* 01 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR },+  /* 02 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR },+  /* 03 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR },+  /* 04 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR },+  /* 05 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR },+  /* 06 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR },+  /* 07 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor[2] = {+  /* 00 */  { UD_Ivmrun,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor[2] = {+  /* 00 */  { UD_Ivmmcall,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor[2] = {+  /* 00 */  { UD_Ivmload,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor[2] = {+  /* 00 */  { UD_Ivmsave,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor[2] = {+  /* 00 */  { UD_Istgi,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor[2] = {+  /* 00 */  { UD_Iclgi,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor[2] = {+  /* 00 */  { UD_Iskinit,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor[2] = {+  /* 00 */  { UD_Iinvlpga,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_04__mod[2] = {+  /* 00 */  { UD_Ismsw,        O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_06__mod[2] = {+  /* 00 */  { UD_Ilmsw,        O_Ew,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod[2] = {+  /* 00 */  { UD_Iinvlpg,      O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm[8] = {+  /* 00 */  { UD_Iswapgs,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor[2] = {+  /* 00 */  { UD_Irdtscp,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_0d__reg[8] = {+  /* 00 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Iprefetch,    O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__0f__op_18__reg[8] = {+  /* 00 */  { UD_Iprefetchnta, O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iprefetcht0,  O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iprefetcht1,  O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Iprefetcht2,  O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_71__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ipsrlw,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Ipsraw,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ipsllw,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_72__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ipsrld,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Ipsrad,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ipslld,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_73__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ipsrlq,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ipsllq,       O_PR,    O_Ib,    O_NONE,  P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__0f__op_ae__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ildmxcsr,     O_Md,    O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Istmxcsr,     O_Md,    O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG__OP_05__MOD },+  /* 06 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG__OP_06__MOD },+  /* 07 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG__OP_07__MOD },+};++static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_ae__reg__op_05__mod__op_01__rm[8] = {+  /* 00 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 02 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 03 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 04 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 05 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 06 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 07 */  { UD_Ilfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_ae__reg__op_06__mod__op_01__rm[8] = {+  /* 00 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 02 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 03 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 04 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 05 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 06 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 07 */  { UD_Imfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod[2] = {+  /* 00 */  { UD_Iclflush,     O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Igrp_rm,      O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM },+};++static struct ud_itab_entry itab__0f__op_ae__reg__op_07__mod__op_01__rm[8] = {+  /* 00 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 02 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 03 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 04 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 05 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 06 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 07 */  { UD_Isfence,      O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__0f__op_ba__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Ibt,          O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ibts,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ibtr,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ibtc,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__0f__op_c7__reg[8] = {+  /* 00 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_C7__REG__OP_00__VENDOR },+  /* 01 */  { UD_Icmpxchg8b,   O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_C7__REG__OP_07__VENDOR },+};++static struct ud_itab_entry itab__0f__op_c7__reg__op_00__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmptrld,     O_Mq,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__0f__op_c7__reg__op_07__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmptrst,     O_Mq,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__0f__op_d9__mod[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__0F__OP_D9__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__0f__op_d9__mod__op_01__x87[64] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 08 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 09 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 11 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 12 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 13 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 14 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 15 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 16 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 17 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 18 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 19 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Ifabs,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 29 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 30 */  { UD_If2xm1,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte[256] = {+  /* 00 */  { UD_Iadd,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iadd,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iadd,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Iadd,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iadd,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 05 */  { UD_Iadd,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 06 */  { UD_Ipush,        O_ES,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 07 */  { UD_Ipop,         O_ES,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 08 */  { UD_Ior,          O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 09 */  { UD_Ior,          O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 0A */  { UD_Ior,          O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 0B */  { UD_Ior,          O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 0C */  { UD_Ior,          O_AL,    O_Ib,    O_NONE,  P_none },+  /* 0D */  { UD_Ior,          O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 0E */  { UD_Ipush,        O_CS,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Iadc,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 11 */  { UD_Iadc,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 12 */  { UD_Iadc,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 13 */  { UD_Iadc,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 14 */  { UD_Iadc,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 15 */  { UD_Iadc,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 16 */  { UD_Ipush,        O_SS,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 17 */  { UD_Ipop,         O_SS,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 18 */  { UD_Isbb,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 19 */  { UD_Isbb,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 1A */  { UD_Isbb,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 1B */  { UD_Isbb,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 1C */  { UD_Isbb,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 1D */  { UD_Isbb,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 1E */  { UD_Ipush,        O_DS,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 1F */  { UD_Ipop,         O_DS,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* 20 */  { UD_Iand,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 21 */  { UD_Iand,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 22 */  { UD_Iand,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 23 */  { UD_Iand,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 24 */  { UD_Iand,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 25 */  { UD_Iand,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Idaa,         O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* 28 */  { UD_Isub,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 29 */  { UD_Isub,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 2A */  { UD_Isub,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2B */  { UD_Isub,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 2C */  { UD_Isub,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 2D */  { UD_Isub,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 2E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2F */  { UD_Idas,         O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* 30 */  { UD_Ixor,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 31 */  { UD_Ixor,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 32 */  { UD_Ixor,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 33 */  { UD_Ixor,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 34 */  { UD_Ixor,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 35 */  { UD_Ixor,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iaaa,         O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* 38 */  { UD_Icmp,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 39 */  { UD_Icmp,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 3A */  { UD_Icmp,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 3B */  { UD_Icmp,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 3C */  { UD_Icmp,         O_AL,    O_Ib,    O_NONE,  P_none },+  /* 3D */  { UD_Icmp,         O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iaas,         O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* 40 */  { UD_Iinc,         O_eAX,   O_NONE,  O_NONE,  P_oso },+  /* 41 */  { UD_Iinc,         O_eCX,   O_NONE,  O_NONE,  P_oso },+  /* 42 */  { UD_Iinc,         O_eDX,   O_NONE,  O_NONE,  P_oso },+  /* 43 */  { UD_Iinc,         O_eBX,   O_NONE,  O_NONE,  P_oso },+  /* 44 */  { UD_Iinc,         O_eSP,   O_NONE,  O_NONE,  P_oso },+  /* 45 */  { UD_Iinc,         O_eBP,   O_NONE,  O_NONE,  P_oso },+  /* 46 */  { UD_Iinc,         O_eSI,   O_NONE,  O_NONE,  P_oso },+  /* 47 */  { UD_Iinc,         O_eDI,   O_NONE,  O_NONE,  P_oso },+  /* 48 */  { UD_Idec,         O_eAX,   O_NONE,  O_NONE,  P_oso },+  /* 49 */  { UD_Idec,         O_eCX,   O_NONE,  O_NONE,  P_oso },+  /* 4A */  { UD_Idec,         O_eDX,   O_NONE,  O_NONE,  P_oso },+  /* 4B */  { UD_Idec,         O_eBX,   O_NONE,  O_NONE,  P_oso },+  /* 4C */  { UD_Idec,         O_eSP,   O_NONE,  O_NONE,  P_oso },+  /* 4D */  { UD_Idec,         O_eBP,   O_NONE,  O_NONE,  P_oso },+  /* 4E */  { UD_Idec,         O_eSI,   O_NONE,  O_NONE,  P_oso },+  /* 4F */  { UD_Idec,         O_eDI,   O_NONE,  O_NONE,  P_oso },+  /* 50 */  { UD_Ipush,        O_rAXr8, O_NONE,  O_NONE,  P_def64|P_depM|P_oso|P_rexb },+  /* 51 */  { UD_Ipush,        O_rCXr9, O_NONE,  O_NONE,  P_def64|P_depM|P_oso|P_rexb },+  /* 52 */  { UD_Ipush,        O_rDXr10, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 53 */  { UD_Ipush,        O_rBXr11, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 54 */  { UD_Ipush,        O_rSPr12, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 55 */  { UD_Ipush,        O_rBPr13, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 56 */  { UD_Ipush,        O_rSIr14, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 57 */  { UD_Ipush,        O_rDIr15, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 58 */  { UD_Ipop,         O_rAXr8, O_NONE,  O_NONE,  P_def64|P_depM|P_oso|P_rexb },+  /* 59 */  { UD_Ipop,         O_rCXr9, O_NONE,  O_NONE,  P_def64|P_depM|P_oso|P_rexb },+  /* 5A */  { UD_Ipop,         O_rDXr10, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 5B */  { UD_Ipop,         O_rBXr11, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 5C */  { UD_Ipop,         O_rSPr12, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 5D */  { UD_Ipop,         O_rBPr13, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 5E */  { UD_Ipop,         O_rSIr14, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 5F */  { UD_Ipop,         O_rDIr15, O_NONE,  O_NONE, P_def64|P_depM|P_oso|P_rexb },+  /* 60 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_60__OSIZE },+  /* 61 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_61__OSIZE },+  /* 62 */  { UD_Ibound,       O_Gv,    O_M,     O_NONE,  P_inv64|P_aso|P_oso },+  /* 63 */  { UD_Igrp_mode,    O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_63__MODE },+  /* 64 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 65 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 66 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 67 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 68 */  { UD_Ipush,        O_Iz,    O_NONE,  O_NONE,  P_c1|P_oso },+  /* 69 */  { UD_Iimul,        O_Gv,    O_Ev,    O_Iz,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 6A */  { UD_Ipush,        O_Ib,    O_NONE,  O_NONE,  P_none },+  /* 6B */  { UD_Iimul,        O_Gv,    O_Ev,    O_Ib,    P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 6C */  { UD_Iinsb,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 6D */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_6D__OSIZE },+  /* 6E */  { UD_Ioutsb,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 6F */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_6F__OSIZE },+  /* 70 */  { UD_Ijo,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 71 */  { UD_Ijno,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 72 */  { UD_Ijb,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 73 */  { UD_Ijae,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 74 */  { UD_Ijz,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 75 */  { UD_Ijnz,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 76 */  { UD_Ijbe,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 77 */  { UD_Ija,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 78 */  { UD_Ijs,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 79 */  { UD_Ijns,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 7A */  { UD_Ijp,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 7B */  { UD_Ijnp,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 7C */  { UD_Ijl,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 7D */  { UD_Ijge,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 7E */  { UD_Ijle,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 7F */  { UD_Ijg,          O_Jb,    O_NONE,  O_NONE,  P_none },+  /* 80 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_80__REG },+  /* 81 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_81__REG },+  /* 82 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_82__REG },+  /* 83 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_83__REG },+  /* 84 */  { UD_Itest,        O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 85 */  { UD_Itest,        O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 86 */  { UD_Ixchg,        O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 87 */  { UD_Ixchg,        O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 88 */  { UD_Imov,         O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 89 */  { UD_Imov,         O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 8A */  { UD_Imov,         O_Gb,    O_Eb,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 8B */  { UD_Imov,         O_Gv,    O_Ev,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 8C */  { UD_Imov,         O_Ev,    O_S,     O_NONE,  P_aso|P_oso|P_rexr|P_rexx|P_rexb },+  /* 8D */  { UD_Ilea,         O_Gv,    O_M,     O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 8E */  { UD_Imov,         O_S,     O_Ev,    O_NONE,  P_aso|P_oso|P_rexr|P_rexx|P_rexb },+  /* 8F */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_8F__REG },+  /* 90 */  { UD_Ixchg,        O_rAXr8, O_rAX,   O_NONE,  P_oso|P_rexw|P_rexb },+  /* 91 */  { UD_Ixchg,        O_rCXr9, O_rAX,   O_NONE,  P_oso|P_rexw|P_rexb },+  /* 92 */  { UD_Ixchg,        O_rDXr10, O_rAX,   O_NONE, P_oso|P_rexw|P_rexb },+  /* 93 */  { UD_Ixchg,        O_rBXr11, O_rAX,   O_NONE, P_oso|P_rexw|P_rexb },+  /* 94 */  { UD_Ixchg,        O_rSPr12, O_rAX,   O_NONE, P_oso|P_rexw|P_rexb },+  /* 95 */  { UD_Ixchg,        O_rBPr13, O_rAX,   O_NONE, P_oso|P_rexw|P_rexb },+  /* 96 */  { UD_Ixchg,        O_rSIr14, O_rAX,   O_NONE, P_oso|P_rexw|P_rexb },+  /* 97 */  { UD_Ixchg,        O_rDIr15, O_rAX,   O_NONE, P_oso|P_rexw|P_rexb },+  /* 98 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_98__OSIZE },+  /* 99 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_99__OSIZE },+  /* 9A */  { UD_Icall,        O_Ap,    O_NONE,  O_NONE,  P_inv64|P_oso },+  /* 9B */  { UD_Iwait,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 9C */  { UD_Igrp_mode,    O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_9C__MODE },+  /* 9D */  { UD_Igrp_mode,    O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_9D__MODE },+  /* 9E */  { UD_Isahf,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 9F */  { UD_Ilahf,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* A0 */  { UD_Imov,         O_AL,    O_Ob,    O_NONE,  P_none },+  /* A1 */  { UD_Imov,         O_rAX,   O_Ov,    O_NONE,  P_aso|P_oso|P_rexw },+  /* A2 */  { UD_Imov,         O_Ob,    O_AL,    O_NONE,  P_none },+  /* A3 */  { UD_Imov,         O_Ov,    O_rAX,   O_NONE,  P_aso|P_oso|P_rexw },+  /* A4 */  { UD_Imovsb,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_none },+  /* A5 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_A5__OSIZE },+  /* A6 */  { UD_Icmpsb,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* A7 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_A7__OSIZE },+  /* A8 */  { UD_Itest,        O_AL,    O_Ib,    O_NONE,  P_none },+  /* A9 */  { UD_Itest,        O_rAX,   O_Iz,    O_NONE,  P_oso|P_rexw },+  /* AA */  { UD_Istosb,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_none },+  /* AB */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_AB__OSIZE },+  /* AC */  { UD_Ilodsb,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_none },+  /* AD */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_AD__OSIZE },+  /* AE */  { UD_Iscasb,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* AF */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_AF__OSIZE },+  /* B0 */  { UD_Imov,         O_ALr8b, O_Ib,    O_NONE,  P_rexb },+  /* B1 */  { UD_Imov,         O_CLr9b, O_Ib,    O_NONE,  P_rexb },+  /* B2 */  { UD_Imov,         O_DLr10b, O_Ib,    O_NONE, P_rexb },+  /* B3 */  { UD_Imov,         O_BLr11b, O_Ib,    O_NONE, P_rexb },+  /* B4 */  { UD_Imov,         O_AHr12b, O_Ib,    O_NONE, P_rexb },+  /* B5 */  { UD_Imov,         O_CHr13b, O_Ib,    O_NONE, P_rexb },+  /* B6 */  { UD_Imov,         O_DHr14b, O_Ib,    O_NONE, P_rexb },+  /* B7 */  { UD_Imov,         O_BHr15b, O_Ib,    O_NONE, P_rexb },+  /* B8 */  { UD_Imov,         O_rAXr8, O_Iv,    O_NONE,  P_oso|P_rexw|P_rexb },+  /* B9 */  { UD_Imov,         O_rCXr9, O_Iv,    O_NONE,  P_oso|P_rexw|P_rexb },+  /* BA */  { UD_Imov,         O_rDXr10, O_Iv,    O_NONE, P_oso|P_rexw|P_rexb },+  /* BB */  { UD_Imov,         O_rBXr11, O_Iv,    O_NONE, P_oso|P_rexw|P_rexb },+  /* BC */  { UD_Imov,         O_rSPr12, O_Iv,    O_NONE, P_oso|P_rexw|P_rexb },+  /* BD */  { UD_Imov,         O_rBPr13, O_Iv,    O_NONE, P_oso|P_rexw|P_rexb },+  /* BE */  { UD_Imov,         O_rSIr14, O_Iv,    O_NONE, P_oso|P_rexw|P_rexb },+  /* BF */  { UD_Imov,         O_rDIr15, O_Iv,    O_NONE, P_oso|P_rexw|P_rexb },+  /* C0 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_C0__REG },+  /* C1 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_C1__REG },+  /* C2 */  { UD_Iret,         O_Iw,    O_NONE,  O_NONE,  P_none },+  /* C3 */  { UD_Iret,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* C4 */  { UD_Iles,         O_Gv,    O_M,     O_NONE,  P_inv64|P_aso|P_oso },+  /* C5 */  { UD_Ilds,         O_Gv,    O_M,     O_NONE,  P_inv64|P_aso|P_oso },+  /* C6 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_C6__REG },+  /* C7 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_C7__REG },+  /* C8 */  { UD_Ienter,       O_Iw,    O_Ib,    O_NONE,  P_def64|P_depM|P_none },+  /* C9 */  { UD_Ileave,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* CA */  { UD_Iretf,        O_Iw,    O_NONE,  O_NONE,  P_none },+  /* CB */  { UD_Iretf,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* CC */  { UD_Iint3,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* CD */  { UD_Iint,         O_Ib,    O_NONE,  O_NONE,  P_none },+  /* CE */  { UD_Iinto,        O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* CF */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_CF__OSIZE },+  /* D0 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D0__REG },+  /* D1 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D1__REG },+  /* D2 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D2__REG },+  /* D3 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D3__REG },+  /* D4 */  { UD_Iaam,         O_Ib,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* D5 */  { UD_Iaad,         O_Ib,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* D6 */  { UD_Isalc,        O_NONE,  O_NONE,  O_NONE,  P_inv64|P_none },+  /* D7 */  { UD_Ixlatb,       O_NONE,  O_NONE,  O_NONE,  P_rexw },+  /* D8 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D8__MOD },+  /* D9 */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D9__MOD },+  /* DA */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DA__MOD },+  /* DB */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DB__MOD },+  /* DC */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DC__MOD },+  /* DD */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DD__MOD },+  /* DE */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DE__MOD },+  /* DF */  { UD_Igrp_mod,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DF__MOD },+  /* E0 */  { UD_Iloopnz,      O_Jb,    O_NONE,  O_NONE,  P_none },+  /* E1 */  { UD_Iloope,       O_Jb,    O_NONE,  O_NONE,  P_none },+  /* E2 */  { UD_Iloop,        O_Jb,    O_NONE,  O_NONE,  P_none },+  /* E3 */  { UD_Igrp_asize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_E3__ASIZE },+  /* E4 */  { UD_Iin,          O_AL,    O_Ib,    O_NONE,  P_none },+  /* E5 */  { UD_Iin,          O_eAX,   O_Ib,    O_NONE,  P_oso },+  /* E6 */  { UD_Iout,         O_Ib,    O_AL,    O_NONE,  P_none },+  /* E7 */  { UD_Iout,         O_Ib,    O_eAX,   O_NONE,  P_oso },+  /* E8 */  { UD_Icall,        O_Jz,    O_NONE,  O_NONE,  P_def64|P_oso },+  /* E9 */  { UD_Ijmp,         O_Jz,    O_NONE,  O_NONE,  P_def64|P_depM|P_oso },+  /* EA */  { UD_Ijmp,         O_Ap,    O_NONE,  O_NONE,  P_inv64|P_none },+  /* EB */  { UD_Ijmp,         O_Jb,    O_NONE,  O_NONE,  P_none },+  /* EC */  { UD_Iin,          O_AL,    O_DX,    O_NONE,  P_none },+  /* ED */  { UD_Iin,          O_eAX,   O_DX,    O_NONE,  P_oso },+  /* EE */  { UD_Iout,         O_DX,    O_AL,    O_NONE,  P_none },+  /* EF */  { UD_Iout,         O_DX,    O_eAX,   O_NONE,  P_oso },+  /* F0 */  { UD_Ilock,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F1 */  { UD_Iint1,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F2 */  { UD_Irepne,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F3 */  { UD_Irep,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F4 */  { UD_Ihlt,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F5 */  { UD_Icmc,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F6 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_F6__REG },+  /* F7 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_F7__REG },+  /* F8 */  { UD_Iclc,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* F9 */  { UD_Istc,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* FA */  { UD_Icli,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* FB */  { UD_Isti,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* FC */  { UD_Icld,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* FD */  { UD_Istd,         O_NONE,  O_NONE,  O_NONE,  P_none },+  /* FE */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_FE__REG },+  /* FF */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_FF__REG },+};++static struct ud_itab_entry itab__1byte__op_60__osize[3] = {+  /* 00 */  { UD_Ipusha,       O_NONE,  O_NONE,  O_NONE,  P_inv64|P_oso },+  /* 01 */  { UD_Ipushad,      O_NONE,  O_NONE,  O_NONE,  P_inv64|P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_61__osize[3] = {+  /* 00 */  { UD_Ipopa,        O_NONE,  O_NONE,  O_NONE,  P_inv64|P_oso },+  /* 01 */  { UD_Ipopad,       O_NONE,  O_NONE,  O_NONE,  P_inv64|P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_63__mode[3] = {+  /* 00 */  { UD_Iarpl,        O_Ew,    O_Gw,    O_NONE,  P_inv64|P_aso },+  /* 01 */  { UD_Iarpl,        O_Ew,    O_Gw,    O_NONE,  P_inv64|P_aso },+  /* 02 */  { UD_Imovsxd,      O_Gv,    O_Ed,    O_NONE,  P_c2|P_aso|P_oso|P_rexw|P_rexx|P_rexr|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_6d__osize[3] = {+  /* 00 */  { UD_Iinsw,        O_NONE,  O_NONE,  O_NONE,  P_oso },+  /* 01 */  { UD_Iinsd,        O_NONE,  O_NONE,  O_NONE,  P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_6f__osize[3] = {+  /* 00 */  { UD_Ioutsw,       O_NONE,  O_NONE,  O_NONE,  P_oso },+  /* 01 */  { UD_Ioutsd,       O_NONE,  O_NONE,  O_NONE,  P_oso },+  /* 02 */  { UD_Ioutsq,       O_NONE,  O_NONE,  O_NONE,  P_oso },+};++static struct ud_itab_entry itab__1byte__op_80__reg[8] = {+  /* 00 */  { UD_Iadd,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ior,          O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iadc,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Isbb,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iand,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Isub,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ixor,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Icmp,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_81__reg[8] = {+  /* 00 */  { UD_Iadd,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ior,          O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iadc,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Isbb,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iand,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Isub,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ixor,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Icmp,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_82__reg[8] = {+  /* 00 */  { UD_Iadd,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ior,          O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iadc,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Isbb,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iand,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Isub,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ixor,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Icmp,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_inv64|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_83__reg[8] = {+  /* 00 */  { UD_Iadd,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ior,          O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iadc,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Isbb,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iand,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Isub,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ixor,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Icmp,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_8f__reg[8] = {+  /* 00 */  { UD_Ipop,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_98__osize[3] = {+  /* 00 */  { UD_Icbw,         O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 01 */  { UD_Icwde,        O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 02 */  { UD_Icdqe,        O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_99__osize[3] = {+  /* 00 */  { UD_Icwd,         O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 01 */  { UD_Icdq,         O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 02 */  { UD_Icqo,         O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_9c__mode[3] = {+  /* 00 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE },+  /* 01 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE },+  /* 02 */  { UD_Ipushfq,      O_NONE,  O_NONE,  O_NONE,  P_def64|P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_9c__mode__op_00__osize[3] = {+  /* 00 */  { UD_Ipushfw,      O_NONE,  O_NONE,  O_NONE,  P_def64|P_oso },+  /* 01 */  { UD_Ipushfd,      O_NONE,  O_NONE,  O_NONE,  P_def64|P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_9c__mode__op_01__osize[3] = {+  /* 00 */  { UD_Ipushfw,      O_NONE,  O_NONE,  O_NONE,  P_def64|P_oso },+  /* 01 */  { UD_Ipushfd,      O_NONE,  O_NONE,  O_NONE,  P_def64|P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_9d__mode[3] = {+  /* 00 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE },+  /* 01 */  { UD_Igrp_osize,   O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE },+  /* 02 */  { UD_Ipopfq,       O_NONE,  O_NONE,  O_NONE,  P_def64|P_depM|P_oso },+};++static struct ud_itab_entry itab__1byte__op_9d__mode__op_00__osize[3] = {+  /* 00 */  { UD_Ipopfw,       O_NONE,  O_NONE,  O_NONE,  P_def64|P_depM|P_oso },+  /* 01 */  { UD_Ipopfd,       O_NONE,  O_NONE,  O_NONE,  P_def64|P_depM|P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_9d__mode__op_01__osize[3] = {+  /* 00 */  { UD_Ipopfw,       O_NONE,  O_NONE,  O_NONE,  P_def64|P_depM|P_oso },+  /* 01 */  { UD_Ipopfd,       O_NONE,  O_NONE,  O_NONE,  P_def64|P_depM|P_oso },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_a5__osize[3] = {+  /* 00 */  { UD_Imovsw,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+  /* 01 */  { UD_Imovsd,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+  /* 02 */  { UD_Imovsq,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_a7__osize[3] = {+  /* 00 */  { UD_Icmpsw,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 01 */  { UD_Icmpsd,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 02 */  { UD_Icmpsq,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_ab__osize[3] = {+  /* 00 */  { UD_Istosw,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+  /* 01 */  { UD_Istosd,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+  /* 02 */  { UD_Istosq,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_ad__osize[3] = {+  /* 00 */  { UD_Ilodsw,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+  /* 01 */  { UD_Ilodsd,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+  /* 02 */  { UD_Ilodsq,       O_NONE,  O_NONE,  O_NONE,  P_ImpAddr|P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_ae__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_AE__MOD__OP_00__REG },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_ae__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifxsave,      O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifxrstor,     O_M,     O_NONE,  O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_af__osize[3] = {+  /* 00 */  { UD_Iscasw,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 01 */  { UD_Iscasd,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 02 */  { UD_Iscasq,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_c0__reg[8] = {+  /* 00 */  { UD_Irol,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iror,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ircl,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ircr,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ishl,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ishr,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ishl,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Isar,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_c1__reg[8] = {+  /* 00 */  { UD_Irol,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iror,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ircl,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ircr,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ishl,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ishr,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ishl,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Isar,         O_Ev,    O_Ib,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_c6__reg[8] = {+  /* 00 */  { UD_Imov,         O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_c7__reg[8] = {+  /* 00 */  { UD_Imov,         O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_cf__osize[3] = {+  /* 00 */  { UD_Iiretw,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 01 */  { UD_Iiretd,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+  /* 02 */  { UD_Iiretq,       O_NONE,  O_NONE,  O_NONE,  P_oso|P_rexw },+};++static struct ud_itab_entry itab__1byte__op_d0__reg[8] = {+  /* 00 */  { UD_Irol,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iror,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ircl,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ircr,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ishl,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ishr,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ishl,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Isar,         O_Eb,    O_I1,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_d1__reg[8] = {+  /* 00 */  { UD_Irol,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iror,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ircl,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ircr,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ishl,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ishr,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ishl,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Isar,         O_Ev,    O_I1,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_d2__reg[8] = {+  /* 00 */  { UD_Irol,         O_Eb,    O_CL,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iror,         O_Eb,    O_CL,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ircl,         O_Eb,    O_CL,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ircr,         O_Eb,    O_CL,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ishl,         O_Eb,    O_CL,    O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ishr,         O_Eb,    O_CL,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ishl,         O_Eb,    O_CL,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Isar,         O_Eb,    O_CL,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_d3__reg[8] = {+  /* 00 */  { UD_Irol,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iror,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ircl,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ircr,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ishl,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ishr,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ishl,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Isar,         O_Ev,    O_CL,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_d8__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D8__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D8__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_d8__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifadd,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifmul,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ifcom,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ifcomp,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifsub,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ifsubr,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ifdiv,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifdivr,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_d8__mod__op_01__x87[64] = {+  /* 00 */  { UD_Ifadd,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 01 */  { UD_Ifadd,        O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 02 */  { UD_Ifadd,        O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 03 */  { UD_Ifadd,        O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 04 */  { UD_Ifadd,        O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 05 */  { UD_Ifadd,        O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 06 */  { UD_Ifadd,        O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 07 */  { UD_Ifadd,        O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 08 */  { UD_Ifmul,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 09 */  { UD_Ifmul,        O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 0A */  { UD_Ifmul,        O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 0B */  { UD_Ifmul,        O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 0C */  { UD_Ifmul,        O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 0D */  { UD_Ifmul,        O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 0E */  { UD_Ifmul,        O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 0F */  { UD_Ifmul,        O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 10 */  { UD_Ifcom,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 11 */  { UD_Ifcom,        O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 12 */  { UD_Ifcom,        O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 13 */  { UD_Ifcom,        O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 14 */  { UD_Ifcom,        O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 15 */  { UD_Ifcom,        O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 16 */  { UD_Ifcom,        O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 17 */  { UD_Ifcom,        O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 18 */  { UD_Ifcomp,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 19 */  { UD_Ifcomp,       O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 1A */  { UD_Ifcomp,       O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 1B */  { UD_Ifcomp,       O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 1C */  { UD_Ifcomp,       O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 1D */  { UD_Ifcomp,       O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 1E */  { UD_Ifcomp,       O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 1F */  { UD_Ifcomp,       O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 20 */  { UD_Ifsub,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 21 */  { UD_Ifsub,        O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 22 */  { UD_Ifsub,        O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 23 */  { UD_Ifsub,        O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 24 */  { UD_Ifsub,        O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 25 */  { UD_Ifsub,        O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 26 */  { UD_Ifsub,        O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 27 */  { UD_Ifsub,        O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 28 */  { UD_Ifsubr,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 29 */  { UD_Ifsubr,       O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 2A */  { UD_Ifsubr,       O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 2B */  { UD_Ifsubr,       O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 2C */  { UD_Ifsubr,       O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 2D */  { UD_Ifsubr,       O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 2E */  { UD_Ifsubr,       O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 2F */  { UD_Ifsubr,       O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 30 */  { UD_Ifdiv,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 31 */  { UD_Ifdiv,        O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 32 */  { UD_Ifdiv,        O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 33 */  { UD_Ifdiv,        O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 34 */  { UD_Ifdiv,        O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 35 */  { UD_Ifdiv,        O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 36 */  { UD_Ifdiv,        O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 37 */  { UD_Ifdiv,        O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 38 */  { UD_Ifdivr,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 39 */  { UD_Ifdivr,       O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 3A */  { UD_Ifdivr,       O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 3B */  { UD_Ifdivr,       O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 3C */  { UD_Ifdivr,       O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 3D */  { UD_Ifdivr,       O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 3E */  { UD_Ifdivr,       O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 3F */  { UD_Ifdivr,       O_ST0,   O_ST7,   O_NONE,  P_none },+};++static struct ud_itab_entry itab__1byte__op_d9__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D9__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_D9__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_d9__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifld,         O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ifst,         O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ifstp,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifldenv,      O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ifldcw,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ifnstenv,     O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifnstcw,      O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_d9__mod__op_01__x87[64] = {+  /* 00 */  { UD_Ifld,         O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 01 */  { UD_Ifld,         O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 02 */  { UD_Ifld,         O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 03 */  { UD_Ifld,         O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 04 */  { UD_Ifld,         O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 05 */  { UD_Ifld,         O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 06 */  { UD_Ifld,         O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 07 */  { UD_Ifld,         O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 08 */  { UD_Ifxch,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 09 */  { UD_Ifxch,        O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 0A */  { UD_Ifxch,        O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 0B */  { UD_Ifxch,        O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 0C */  { UD_Ifxch,        O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 0D */  { UD_Ifxch,        O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 0E */  { UD_Ifxch,        O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 0F */  { UD_Ifxch,        O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 10 */  { UD_Ifnop,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 11 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 12 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 13 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 14 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 15 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 16 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 17 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 18 */  { UD_Ifstp1,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 19 */  { UD_Ifstp1,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 1A */  { UD_Ifstp1,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 1B */  { UD_Ifstp1,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 1C */  { UD_Ifstp1,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 1D */  { UD_Ifstp1,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 1E */  { UD_Ifstp1,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 1F */  { UD_Ifstp1,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 20 */  { UD_Ifchs,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iftst,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 25 */  { UD_Ifxam,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Ifld1,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 29 */  { UD_Ifldl2t,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2A */  { UD_Ifldl2e,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2B */  { UD_Ifldlpi,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2C */  { UD_Ifldlg2,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2D */  { UD_Ifldln2,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2E */  { UD_Ifldz,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Ifyl2x,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 32 */  { UD_Ifptan,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 33 */  { UD_Ifpatan,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 34 */  { UD_Ifpxtract,    O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 35 */  { UD_Ifprem1,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 36 */  { UD_Ifdecstp,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 37 */  { UD_Ifncstp,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 38 */  { UD_Ifprem,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 39 */  { UD_Ifyl2xp1,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 3A */  { UD_Ifsqrt,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 3B */  { UD_Ifsincos,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 3C */  { UD_Ifrndint,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 3D */  { UD_Ifscale,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 3E */  { UD_Ifsin,        O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 3F */  { UD_Ifcos,        O_NONE,  O_NONE,  O_NONE,  P_none },+};++static struct ud_itab_entry itab__1byte__op_da__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DA__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DA__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_da__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifiadd,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifimul,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ificom,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ificomp,      O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifisub,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ifisubr,      O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ifidiv,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifidivr,      O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_da__mod__op_01__x87[64] = {+  /* 00 */  { UD_Ifcmovb,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 01 */  { UD_Ifcmovb,      O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 02 */  { UD_Ifcmovb,      O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 03 */  { UD_Ifcmovb,      O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 04 */  { UD_Ifcmovb,      O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 05 */  { UD_Ifcmovb,      O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 06 */  { UD_Ifcmovb,      O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 07 */  { UD_Ifcmovb,      O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 08 */  { UD_Ifcmove,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 09 */  { UD_Ifcmove,      O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 0A */  { UD_Ifcmove,      O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 0B */  { UD_Ifcmove,      O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 0C */  { UD_Ifcmove,      O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 0D */  { UD_Ifcmove,      O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 0E */  { UD_Ifcmove,      O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 0F */  { UD_Ifcmove,      O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 10 */  { UD_Ifcmovbe,     O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 11 */  { UD_Ifcmovbe,     O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 12 */  { UD_Ifcmovbe,     O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 13 */  { UD_Ifcmovbe,     O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 14 */  { UD_Ifcmovbe,     O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 15 */  { UD_Ifcmovbe,     O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 16 */  { UD_Ifcmovbe,     O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 17 */  { UD_Ifcmovbe,     O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 18 */  { UD_Ifcmovu,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 19 */  { UD_Ifcmovu,      O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 1A */  { UD_Ifcmovu,      O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 1B */  { UD_Ifcmovu,      O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 1C */  { UD_Ifcmovu,      O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 1D */  { UD_Ifcmovu,      O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 1E */  { UD_Ifcmovu,      O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 1F */  { UD_Ifcmovu,      O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 29 */  { UD_Ifucompp,     O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 2A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_db__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DB__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DB__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_db__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifild,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifisttp,      O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ifist,        O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ifistp,       O_Md,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Ifld,         O_Mt,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Ifstp,        O_Mt,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_db__mod__op_01__x87[64] = {+  /* 00 */  { UD_Ifcmovnb,     O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 01 */  { UD_Ifcmovnb,     O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 02 */  { UD_Ifcmovnb,     O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 03 */  { UD_Ifcmovnb,     O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 04 */  { UD_Ifcmovnb,     O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 05 */  { UD_Ifcmovnb,     O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 06 */  { UD_Ifcmovnb,     O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 07 */  { UD_Ifcmovnb,     O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 08 */  { UD_Ifcmovne,     O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 09 */  { UD_Ifcmovne,     O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 0A */  { UD_Ifcmovne,     O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 0B */  { UD_Ifcmovne,     O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 0C */  { UD_Ifcmovne,     O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 0D */  { UD_Ifcmovne,     O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 0E */  { UD_Ifcmovne,     O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 0F */  { UD_Ifcmovne,     O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 10 */  { UD_Ifcmovnbe,    O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 11 */  { UD_Ifcmovnbe,    O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 12 */  { UD_Ifcmovnbe,    O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 13 */  { UD_Ifcmovnbe,    O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 14 */  { UD_Ifcmovnbe,    O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 15 */  { UD_Ifcmovnbe,    O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 16 */  { UD_Ifcmovnbe,    O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 17 */  { UD_Ifcmovnbe,    O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 18 */  { UD_Ifcmovnu,     O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 19 */  { UD_Ifcmovnu,     O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 1A */  { UD_Ifcmovnu,     O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 1B */  { UD_Ifcmovnu,     O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 1C */  { UD_Ifcmovnu,     O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 1D */  { UD_Ifcmovnu,     O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 1E */  { UD_Ifcmovnu,     O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 1F */  { UD_Ifcmovnu,     O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Ifclex,       O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 23 */  { UD_Ifninit,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Ifucomi,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 29 */  { UD_Ifucomi,      O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 2A */  { UD_Ifucomi,      O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 2B */  { UD_Ifucomi,      O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 2C */  { UD_Ifucomi,      O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 2D */  { UD_Ifucomi,      O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 2E */  { UD_Ifucomi,      O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 2F */  { UD_Ifucomi,      O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 30 */  { UD_Ifcomi,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 31 */  { UD_Ifcomi,       O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 32 */  { UD_Ifcomi,       O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 33 */  { UD_Ifcomi,       O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 34 */  { UD_Ifcomi,       O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 35 */  { UD_Ifcomi,       O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 36 */  { UD_Ifcomi,       O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 37 */  { UD_Ifcomi,       O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_dc__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DC__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DC__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_dc__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifadd,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifmul,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ifcom,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ifcomp,       O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifsub,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ifsubr,       O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ifdiv,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifdivr,       O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_dc__mod__op_01__x87[64] = {+  /* 00 */  { UD_Ifadd,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 01 */  { UD_Ifadd,        O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 02 */  { UD_Ifadd,        O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 03 */  { UD_Ifadd,        O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 04 */  { UD_Ifadd,        O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 05 */  { UD_Ifadd,        O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 06 */  { UD_Ifadd,        O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 07 */  { UD_Ifadd,        O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 08 */  { UD_Ifmul,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 09 */  { UD_Ifmul,        O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 0A */  { UD_Ifmul,        O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 0B */  { UD_Ifmul,        O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 0C */  { UD_Ifmul,        O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 0D */  { UD_Ifmul,        O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 0E */  { UD_Ifmul,        O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 0F */  { UD_Ifmul,        O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 10 */  { UD_Ifcom2,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 11 */  { UD_Ifcom2,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 12 */  { UD_Ifcom2,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 13 */  { UD_Ifcom2,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 14 */  { UD_Ifcom2,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 15 */  { UD_Ifcom2,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 16 */  { UD_Ifcom2,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 17 */  { UD_Ifcom2,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 18 */  { UD_Ifcomp3,      O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 19 */  { UD_Ifcomp3,      O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 1A */  { UD_Ifcomp3,      O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 1B */  { UD_Ifcomp3,      O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 1C */  { UD_Ifcomp3,      O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 1D */  { UD_Ifcomp3,      O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 1E */  { UD_Ifcomp3,      O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 1F */  { UD_Ifcomp3,      O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 20 */  { UD_Ifsubr,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 21 */  { UD_Ifsubr,       O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 22 */  { UD_Ifsubr,       O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 23 */  { UD_Ifsubr,       O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 24 */  { UD_Ifsubr,       O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 25 */  { UD_Ifsubr,       O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 26 */  { UD_Ifsubr,       O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 27 */  { UD_Ifsubr,       O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 28 */  { UD_Ifsub,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 29 */  { UD_Ifsub,        O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 2A */  { UD_Ifsub,        O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 2B */  { UD_Ifsub,        O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 2C */  { UD_Ifsub,        O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 2D */  { UD_Ifsub,        O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 2E */  { UD_Ifsub,        O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 2F */  { UD_Ifsub,        O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 30 */  { UD_Ifdivr,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 31 */  { UD_Ifdivr,       O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 32 */  { UD_Ifdivr,       O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 33 */  { UD_Ifdivr,       O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 34 */  { UD_Ifdivr,       O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 35 */  { UD_Ifdivr,       O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 36 */  { UD_Ifdivr,       O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 37 */  { UD_Ifdivr,       O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 38 */  { UD_Ifdiv,        O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 39 */  { UD_Ifdiv,        O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 3A */  { UD_Ifdiv,        O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 3B */  { UD_Ifdiv,        O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 3C */  { UD_Ifdiv,        O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 3D */  { UD_Ifdiv,        O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 3E */  { UD_Ifdiv,        O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 3F */  { UD_Ifdiv,        O_ST7,   O_ST0,   O_NONE,  P_none },+};++static struct ud_itab_entry itab__1byte__op_dd__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DD__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DD__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_dd__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifld,         O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifisttp,      O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ifst,         O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ifstp,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifrstor,      O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ifnsave,      O_M,     O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifnstsw,      O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_dd__mod__op_01__x87[64] = {+  /* 00 */  { UD_Iffree,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iffree,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 02 */  { UD_Iffree,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 03 */  { UD_Iffree,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 04 */  { UD_Iffree,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 05 */  { UD_Iffree,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 06 */  { UD_Iffree,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 07 */  { UD_Iffree,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 08 */  { UD_Ifxch4,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 09 */  { UD_Ifxch4,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 0A */  { UD_Ifxch4,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 0B */  { UD_Ifxch4,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 0C */  { UD_Ifxch4,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 0D */  { UD_Ifxch4,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 0E */  { UD_Ifxch4,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 0F */  { UD_Ifxch4,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 10 */  { UD_Ifst,         O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 11 */  { UD_Ifst,         O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 12 */  { UD_Ifst,         O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 13 */  { UD_Ifst,         O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 14 */  { UD_Ifst,         O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 15 */  { UD_Ifst,         O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 16 */  { UD_Ifst,         O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 17 */  { UD_Ifst,         O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 18 */  { UD_Ifstp,        O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 19 */  { UD_Ifstp,        O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 1A */  { UD_Ifstp,        O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 1B */  { UD_Ifstp,        O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 1C */  { UD_Ifstp,        O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 1D */  { UD_Ifstp,        O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 1E */  { UD_Ifstp,        O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 1F */  { UD_Ifstp,        O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 20 */  { UD_Ifucom,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 21 */  { UD_Ifucom,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 22 */  { UD_Ifucom,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 23 */  { UD_Ifucom,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 24 */  { UD_Ifucom,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 25 */  { UD_Ifucom,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 26 */  { UD_Ifucom,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 27 */  { UD_Ifucom,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 28 */  { UD_Ifucomp,      O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 29 */  { UD_Ifucomp,      O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 2A */  { UD_Ifucomp,      O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 2B */  { UD_Ifucomp,      O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 2C */  { UD_Ifucomp,      O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 2D */  { UD_Ifucomp,      O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 2E */  { UD_Ifucomp,      O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 2F */  { UD_Ifucomp,      O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_de__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DE__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DE__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_de__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifiadd,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifimul,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ificom,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ificomp,      O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifisub,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ifisubr,      O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ifidiv,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifidivr,      O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_de__mod__op_01__x87[64] = {+  /* 00 */  { UD_Ifaddp,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 01 */  { UD_Ifaddp,       O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 02 */  { UD_Ifaddp,       O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 03 */  { UD_Ifaddp,       O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 04 */  { UD_Ifaddp,       O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 05 */  { UD_Ifaddp,       O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 06 */  { UD_Ifaddp,       O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 07 */  { UD_Ifaddp,       O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 08 */  { UD_Ifmulp,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 09 */  { UD_Ifmulp,       O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 0A */  { UD_Ifmulp,       O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 0B */  { UD_Ifmulp,       O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 0C */  { UD_Ifmulp,       O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 0D */  { UD_Ifmulp,       O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 0E */  { UD_Ifmulp,       O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 0F */  { UD_Ifmulp,       O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 10 */  { UD_Ifcomp5,      O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 11 */  { UD_Ifcomp5,      O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 12 */  { UD_Ifcomp5,      O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 13 */  { UD_Ifcomp5,      O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 14 */  { UD_Ifcomp5,      O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 15 */  { UD_Ifcomp5,      O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 16 */  { UD_Ifcomp5,      O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 17 */  { UD_Ifcomp5,      O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 18 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 19 */  { UD_Ifcompp,      O_NONE,  O_NONE,  O_NONE,  P_none },+  /* 1A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 20 */  { UD_Ifsubrp,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 21 */  { UD_Ifsubrp,      O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 22 */  { UD_Ifsubrp,      O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 23 */  { UD_Ifsubrp,      O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 24 */  { UD_Ifsubrp,      O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 25 */  { UD_Ifsubrp,      O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 26 */  { UD_Ifsubrp,      O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 27 */  { UD_Ifsubrp,      O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 28 */  { UD_Ifsubp,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 29 */  { UD_Ifsubp,       O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 2A */  { UD_Ifsubp,       O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 2B */  { UD_Ifsubp,       O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 2C */  { UD_Ifsubp,       O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 2D */  { UD_Ifsubp,       O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 2E */  { UD_Ifsubp,       O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 2F */  { UD_Ifsubp,       O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 30 */  { UD_Ifdivrp,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 31 */  { UD_Ifdivrp,      O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 32 */  { UD_Ifdivrp,      O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 33 */  { UD_Ifdivrp,      O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 34 */  { UD_Ifdivrp,      O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 35 */  { UD_Ifdivrp,      O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 36 */  { UD_Ifdivrp,      O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 37 */  { UD_Ifdivrp,      O_ST7,   O_ST0,   O_NONE,  P_none },+  /* 38 */  { UD_Ifdivp,       O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 39 */  { UD_Ifdivp,       O_ST1,   O_ST0,   O_NONE,  P_none },+  /* 3A */  { UD_Ifdivp,       O_ST2,   O_ST0,   O_NONE,  P_none },+  /* 3B */  { UD_Ifdivp,       O_ST3,   O_ST0,   O_NONE,  P_none },+  /* 3C */  { UD_Ifdivp,       O_ST4,   O_ST0,   O_NONE,  P_none },+  /* 3D */  { UD_Ifdivp,       O_ST5,   O_ST0,   O_NONE,  P_none },+  /* 3E */  { UD_Ifdivp,       O_ST6,   O_ST0,   O_NONE,  P_none },+  /* 3F */  { UD_Ifdivp,       O_ST7,   O_ST0,   O_NONE,  P_none },+};++static struct ud_itab_entry itab__1byte__op_df__mod[2] = {+  /* 00 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DF__MOD__OP_00__REG },+  /* 01 */  { UD_Igrp_x87,     O_NONE, O_NONE, O_NONE,    ITAB__1BYTE__OP_DF__MOD__OP_01__X87 },+};++static struct ud_itab_entry itab__1byte__op_df__mod__op_00__reg[8] = {+  /* 00 */  { UD_Ifild,        O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Ifisttp,      O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Ifist,        O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ifistp,       O_Mw,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ifbld,        O_Mt,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ifild,        O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ifbstp,       O_Mt,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Ifistp,       O_Mq,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_df__mod__op_01__x87[64] = {+  /* 00 */  { UD_Iffreep,      O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 01 */  { UD_Iffreep,      O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 02 */  { UD_Iffreep,      O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 03 */  { UD_Iffreep,      O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 04 */  { UD_Iffreep,      O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 05 */  { UD_Iffreep,      O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 06 */  { UD_Iffreep,      O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 07 */  { UD_Iffreep,      O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 08 */  { UD_Ifxch7,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 09 */  { UD_Ifxch7,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 0A */  { UD_Ifxch7,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 0B */  { UD_Ifxch7,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 0C */  { UD_Ifxch7,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 0D */  { UD_Ifxch7,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 0E */  { UD_Ifxch7,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 0F */  { UD_Ifxch7,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 10 */  { UD_Ifstp8,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 11 */  { UD_Ifstp8,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 12 */  { UD_Ifstp8,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 13 */  { UD_Ifstp8,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 14 */  { UD_Ifstp8,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 15 */  { UD_Ifstp8,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 16 */  { UD_Ifstp8,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 17 */  { UD_Ifstp8,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 18 */  { UD_Ifstp9,       O_ST0,   O_NONE,  O_NONE,  P_none },+  /* 19 */  { UD_Ifstp9,       O_ST1,   O_NONE,  O_NONE,  P_none },+  /* 1A */  { UD_Ifstp9,       O_ST2,   O_NONE,  O_NONE,  P_none },+  /* 1B */  { UD_Ifstp9,       O_ST3,   O_NONE,  O_NONE,  P_none },+  /* 1C */  { UD_Ifstp9,       O_ST4,   O_NONE,  O_NONE,  P_none },+  /* 1D */  { UD_Ifstp9,       O_ST5,   O_NONE,  O_NONE,  P_none },+  /* 1E */  { UD_Ifstp9,       O_ST6,   O_NONE,  O_NONE,  P_none },+  /* 1F */  { UD_Ifstp9,       O_ST7,   O_NONE,  O_NONE,  P_none },+  /* 20 */  { UD_Ifnstsw,      O_AX,    O_NONE,  O_NONE,  P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Ifucomip,     O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 29 */  { UD_Ifucomip,     O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 2A */  { UD_Ifucomip,     O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 2B */  { UD_Ifucomip,     O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 2C */  { UD_Ifucomip,     O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 2D */  { UD_Ifucomip,     O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 2E */  { UD_Ifucomip,     O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 2F */  { UD_Ifucomip,     O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 30 */  { UD_Ifcomip,      O_ST0,   O_ST0,   O_NONE,  P_none },+  /* 31 */  { UD_Ifcomip,      O_ST0,   O_ST1,   O_NONE,  P_none },+  /* 32 */  { UD_Ifcomip,      O_ST0,   O_ST2,   O_NONE,  P_none },+  /* 33 */  { UD_Ifcomip,      O_ST0,   O_ST3,   O_NONE,  P_none },+  /* 34 */  { UD_Ifcomip,      O_ST0,   O_ST4,   O_NONE,  P_none },+  /* 35 */  { UD_Ifcomip,      O_ST0,   O_ST5,   O_NONE,  P_none },+  /* 36 */  { UD_Ifcomip,      O_ST0,   O_ST6,   O_NONE,  P_none },+  /* 37 */  { UD_Ifcomip,      O_ST0,   O_ST7,   O_NONE,  P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_e3__asize[3] = {+  /* 00 */  { UD_Ijcxz,        O_Jb,    O_NONE,  O_NONE,  P_aso },+  /* 01 */  { UD_Ijecxz,       O_Jb,    O_NONE,  O_NONE,  P_aso },+  /* 02 */  { UD_Ijrcxz,       O_Jb,    O_NONE,  O_NONE,  P_aso },+};++static struct ud_itab_entry itab__1byte__op_f6__reg[8] = {+  /* 00 */  { UD_Itest,        O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Itest,        O_Eb,    O_Ib,    O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Inot,         O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ineg,         O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Imul,         O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Iimul,        O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Idiv,         O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Iidiv,        O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_f7__reg[8] = {+  /* 00 */  { UD_Itest,        O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Itest,        O_Ev,    O_Iz,    O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Inot,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Ineg,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Imul,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Iimul,        O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Idiv,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Iidiv,        O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__1byte__op_fe__reg[8] = {+  /* 00 */  { UD_Iinc,         O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Idec,         O_Eb,    O_NONE,  O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__1byte__op_ff__reg[8] = {+  /* 00 */  { UD_Iinc,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 01 */  { UD_Idec,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 02 */  { UD_Icall,        O_Ev,    O_NONE,  O_NONE,  P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 03 */  { UD_Icall,        O_Ep,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 04 */  { UD_Ijmp,         O_Ev,    O_NONE,  O_NONE,  P_c1|P_def64|P_depM|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 05 */  { UD_Ijmp,         O_Ep,    O_NONE,  O_NONE,  P_c1|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 06 */  { UD_Ipush,        O_Ev,    O_NONE,  O_NONE,  P_c1|P_def64|P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__3dnow[256] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 08 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 09 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 11 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 12 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 13 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 14 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 15 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 16 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 17 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 18 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 19 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 29 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 40 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 41 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 42 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 43 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 44 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 45 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 46 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 47 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 48 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 49 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 50 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 51 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 52 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 53 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 54 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 55 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 56 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 57 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 58 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 59 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 60 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 61 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 62 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 63 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 64 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 65 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 66 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 67 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 68 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 69 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 70 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 71 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 72 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 73 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 74 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 75 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 76 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 77 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 78 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 79 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 80 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 81 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 82 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 83 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 84 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 85 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 86 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 87 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 88 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 89 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 90 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 91 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 92 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 93 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 94 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 95 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 96 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 97 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 98 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 99 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* ED */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_sse66__0f[256] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 08 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 09 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Imovupd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 11 */  { UD_Imovupd,      O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 12 */  { UD_Imovlpd,      O_V,     O_M,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 13 */  { UD_Imovlpd,      O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 14 */  { UD_Iunpcklpd,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 15 */  { UD_Iunpckhpd,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 16 */  { UD_Imovhpd,      O_V,     O_M,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 17 */  { UD_Imovhpd,      O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 18 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 19 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Imovapd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 29 */  { UD_Imovapd,      O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2A */  { UD_Icvtpi2pd,    O_V,     O_Q,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2B */  { UD_Imovntpd,     O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2C */  { UD_Icvttpd2pi,   O_P,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2D */  { UD_Icvtpd2pi,    O_P,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2E */  { UD_Iucomisd,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 2F */  { UD_Icomisd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 40 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 41 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 42 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 43 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 44 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 45 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 46 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 47 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 48 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 49 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 50 */  { UD_Imovmskpd,    O_Gd,    O_VR,    O_NONE,  P_oso|P_rexr|P_rexb },+  /* 51 */  { UD_Isqrtpd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 52 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 53 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 54 */  { UD_Iandpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 55 */  { UD_Iandnpd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 56 */  { UD_Iorpd,        O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 57 */  { UD_Ixorpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 58 */  { UD_Iaddpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 59 */  { UD_Imulpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5A */  { UD_Icvtpd2ps,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5B */  { UD_Icvtps2dq,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5C */  { UD_Isubpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5D */  { UD_Iminpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5E */  { UD_Idivpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5F */  { UD_Imaxpd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 60 */  { UD_Ipunpcklbw,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 61 */  { UD_Ipunpcklwd,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 62 */  { UD_Ipunpckldq,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 63 */  { UD_Ipacksswb,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 64 */  { UD_Ipcmpgtb,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 65 */  { UD_Ipcmpgtw,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 66 */  { UD_Ipcmpgtd,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 67 */  { UD_Ipackuswb,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 68 */  { UD_Ipunpckhbw,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 69 */  { UD_Ipunpckhwd,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6A */  { UD_Ipunpckhdq,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6B */  { UD_Ipackssdw,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6C */  { UD_Ipunpcklqdq,  O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6D */  { UD_Ipunpckhqdq,  O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 6E */  { UD_Imovd,        O_V,     O_Ex,    O_NONE,  P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 6F */  { UD_Imovqa,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 70 */  { UD_Ipshufd,      O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* 71 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSE66__0F__OP_71__REG },+  /* 72 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSE66__0F__OP_72__REG },+  /* 73 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSE66__0F__OP_73__REG },+  /* 74 */  { UD_Ipcmpeqb,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 75 */  { UD_Ipcmpeqw,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 76 */  { UD_Ipcmpeqd,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 77 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 78 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 79 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7C */  { UD_Ihaddpd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 7D */  { UD_Ihsubpd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 7E */  { UD_Imovd,        O_Ex,    O_V,     O_NONE,  P_c1|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 7F */  { UD_Imovdqa,      O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 80 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 81 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 82 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 83 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 84 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 85 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 86 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 87 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 88 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 89 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 90 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 91 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 92 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 93 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 94 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 95 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 96 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 97 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 98 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 99 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C0 */  { UD_Ixadd,        O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C1 */  { UD_Ixadd,        O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C2 */  { UD_Icmppd,       O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* C3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C4 */  { UD_Ipinsrw,      O_V,     O_Ew,    O_Ib,    P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C5 */  { UD_Ipextrw,      O_Gd,    O_VR,    O_Ib,    P_aso|P_rexr|P_rexb },+  /* C6 */  { UD_Ishufpd,      O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* C7 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSE66__0F__OP_C7__REG },+  /* C8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D0 */  { UD_Iaddsubpd,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D1 */  { UD_Ipsrlw,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D2 */  { UD_Ipsrld,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D3 */  { UD_Ipsrlq,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D4 */  { UD_Ipaddq,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D5 */  { UD_Ipmullw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D6 */  { UD_Imovq,        O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D7 */  { UD_Ipmovmskb,    O_Gd,    O_VR,    O_NONE,  P_rexr|P_rexb },+  /* D8 */  { UD_Ipsubusb,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D9 */  { UD_Ipsubusw,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DA */  { UD_Ipminub,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DB */  { UD_Ipand,        O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DC */  { UD_Ipsubusb,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DD */  { UD_Ipunpckhbw,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DE */  { UD_Ipmaxub,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* DF */  { UD_Ipandn,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E0 */  { UD_Ipavgb,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E1 */  { UD_Ipsraw,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E2 */  { UD_Ipsrad,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E3 */  { UD_Ipavgw,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E4 */  { UD_Ipmulhuw,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E5 */  { UD_Ipmulhw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E6 */  { UD_Icvttpd2dq,   O_V,     O_W,     O_NONE,  P_none },+  /* E7 */  { UD_Imovntdq,     O_M,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E8 */  { UD_Ipsubsb,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E9 */  { UD_Ipsubsw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EA */  { UD_Ipminsw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EB */  { UD_Ipor,         O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EC */  { UD_Ipaddsb,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* ED */  { UD_Ipaddsw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EE */  { UD_Ipmaxsw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* EF */  { UD_Ipxor,        O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F1 */  { UD_Ipsllw,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F2 */  { UD_Ipslld,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F3 */  { UD_Ipsllq,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F4 */  { UD_Ipmuludq,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F5 */  { UD_Ipmaddwd,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F6 */  { UD_Ipsadbw,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F7 */  { UD_Imaskmovq,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F8 */  { UD_Ipsubb,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F9 */  { UD_Ipsubw,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FA */  { UD_Ipsubd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FB */  { UD_Ipsubq,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FC */  { UD_Ipaddb,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FD */  { UD_Ipaddw,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* FE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_sse66__0f__op_71__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ipsrlw,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Ipsraw,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ipsllw,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_sse66__0f__op_72__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ipsrld,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Ipsrad,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ipslld,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_sse66__0f__op_73__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Ipsrlq,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 03 */  { UD_Ipsrldq,      O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Ipsllq,       O_VR,    O_Ib,    O_NONE,  P_rexb },+  /* 07 */  { UD_Ipslldq,      O_VR,    O_Ib,    O_NONE,  P_rexb },+};++static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg[8] = {+  /* 00 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_sse66__0f__op_c7__reg__op_00__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmclear,     O_Mq,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+};++static struct ud_itab_entry itab__pfx_ssef2__0f[256] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 08 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 09 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Imovsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 11 */  { UD_Imovsd,       O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 12 */  { UD_Imovddup,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 13 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 14 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 15 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 16 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 17 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 18 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 19 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 29 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2A */  { UD_Icvtsi2sd,    O_V,     O_Ex,    O_NONE,  P_c2|P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* 2B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2C */  { UD_Icvttsd2si,   O_Gvw,   O_W,     O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 2D */  { UD_Icvtsd2si,    O_Gvw,   O_W,     O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 2E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 40 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 41 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 42 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 43 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 44 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 45 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 46 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 47 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 48 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 49 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 50 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 51 */  { UD_Isqrtsd,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 52 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 53 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 54 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 55 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 56 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 57 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 58 */  { UD_Iaddsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 59 */  { UD_Imulsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5A */  { UD_Icvtsd2ss,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 5C */  { UD_Isubsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5D */  { UD_Iminsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5E */  { UD_Idivsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5F */  { UD_Imaxsd,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 60 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 61 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 62 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 63 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 64 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 65 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 66 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 67 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 68 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 69 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 70 */  { UD_Ipshuflw,     O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* 71 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 72 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 73 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 74 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 75 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 76 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 77 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 78 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 79 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7C */  { UD_Ihaddps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 7D */  { UD_Ihsubps,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 7E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 80 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 81 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 82 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 83 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 84 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 85 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 86 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 87 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 88 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 89 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 90 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 91 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 92 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 93 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 94 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 95 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 96 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 97 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 98 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 99 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C0 */  { UD_Ixadd,        O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C1 */  { UD_Ixadd,        O_Ev,    O_Gv,    O_NONE,  P_aso|P_oso|P_rexr|P_rexx|P_rexb },+  /* C2 */  { UD_Icmpsd,       O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* C3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D0 */  { UD_Iaddsubps,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* D1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D6 */  { UD_Imovdq2q,     O_P,     O_VR,    O_NONE,  P_aso|P_rexb },+  /* D7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E6 */  { UD_Icvtpd2dq,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* ED */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F0 */  { UD_Ilddqu,       O_V,     O_M,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* F1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_ssef3__0f[256] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 08 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 09 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 0F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 10 */  { UD_Imovss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 11 */  { UD_Imovss,       O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 12 */  { UD_Imovsldup,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 13 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 14 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 15 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 16 */  { UD_Imovshdup,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 17 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 18 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 19 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 1F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 20 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 21 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 22 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 23 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 24 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 25 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 26 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 27 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 28 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 29 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2A */  { UD_Icvtsi2ss,    O_V,     O_Ex,    O_NONE,  P_c2|P_aso|P_rexr|P_rexx|P_rexb },+  /* 2B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2C */  { UD_Icvttss2si,   O_Gvw,   O_W,     O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 2D */  { UD_Icvtss2si,    O_Gvw,   O_W,     O_NONE,  P_c1|P_aso|P_rexr|P_rexx|P_rexb },+  /* 2E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 2F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 30 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 31 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 32 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 33 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 34 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 35 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 36 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 37 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 38 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 39 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 3F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 40 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 41 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 42 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 43 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 44 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 45 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 46 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 47 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 48 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 49 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 4F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 50 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 51 */  { UD_Isqrtss,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 52 */  { UD_Irsqrtss,     O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 53 */  { UD_Ircpss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 54 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 55 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 56 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 57 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 58 */  { UD_Iaddss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 59 */  { UD_Imulss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5A */  { UD_Icvtss2sd,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5B */  { UD_Icvttps2dq,   O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5C */  { UD_Isubss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5D */  { UD_Iminss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5E */  { UD_Idivss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 5F */  { UD_Imaxss,       O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 60 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 61 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 62 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 63 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 64 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 65 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 66 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 67 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 68 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 69 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 6F */  { UD_Imovdqu,      O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 70 */  { UD_Ipshufhw,     O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* 71 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 72 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 73 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 74 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 75 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 76 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 77 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 78 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 79 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 7E */  { UD_Imovq,        O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 7F */  { UD_Imovdqu,      O_W,     O_V,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* 80 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 81 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 82 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 83 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 84 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 85 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 86 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 87 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 88 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 89 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 8F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 90 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 91 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 92 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 93 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 94 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 95 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 96 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 97 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 98 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 99 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9A */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9B */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9C */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9D */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9E */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 9F */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* A9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* AF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* B9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* BF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C0 */  { UD_Ixadd,        O_Eb,    O_Gb,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C1 */  { UD_Ixadd,        O_Ev,    O_Gv,    O_NONE,  P_aso|P_rexw|P_rexr|P_rexx|P_rexb },+  /* C2 */  { UD_Icmpss,       O_V,     O_W,     O_Ib,    P_aso|P_rexr|P_rexx|P_rexb },+  /* C3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C7 */  { UD_Igrp_reg,     O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSEF3__0F__OP_C7__REG },+  /* C8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* C9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* CF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D6 */  { UD_Imovq2dq,     O_V,     O_PR,    O_NONE,  P_aso },+  /* D7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* D9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* DF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E6 */  { UD_Icvtdq2pd,    O_V,     O_W,     O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+  /* E7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* E9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* ED */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* EF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F0 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F1 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F2 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F3 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F4 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F5 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F6 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F7 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F8 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* F9 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FA */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FB */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FC */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FD */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FE */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* FF */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+};++static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg[8] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 02 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 03 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 04 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 05 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 06 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 07 */  { UD_Igrp_vendor,  O_NONE, O_NONE, O_NONE,    ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR },+};++static struct ud_itab_entry itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor[2] = {+  /* 00 */  { UD_Iinvalid,     O_NONE, O_NONE, O_NONE,    P_none },+  /* 01 */  { UD_Ivmxon,       O_Mq,    O_NONE,  O_NONE,  P_aso|P_rexr|P_rexx|P_rexb },+};++/* the order of this table matches enum ud_itab_index */+struct ud_itab_entry * ud_itab_list[] = {+  itab__0f,+  itab__0f__op_00__reg,+  itab__0f__op_01__reg,+  itab__0f__op_01__reg__op_00__mod,+  itab__0f__op_01__reg__op_00__mod__op_01__rm,+  itab__0f__op_01__reg__op_00__mod__op_01__rm__op_01__vendor,+  itab__0f__op_01__reg__op_00__mod__op_01__rm__op_03__vendor,+  itab__0f__op_01__reg__op_00__mod__op_01__rm__op_04__vendor,+  itab__0f__op_01__reg__op_01__mod,+  itab__0f__op_01__reg__op_01__mod__op_01__rm,+  itab__0f__op_01__reg__op_02__mod,+  itab__0f__op_01__reg__op_03__mod,+  itab__0f__op_01__reg__op_03__mod__op_01__rm,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_00__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_01__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_02__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_03__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_04__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_05__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_06__vendor,+  itab__0f__op_01__reg__op_03__mod__op_01__rm__op_07__vendor,+  itab__0f__op_01__reg__op_04__mod,+  itab__0f__op_01__reg__op_06__mod,+  itab__0f__op_01__reg__op_07__mod,+  itab__0f__op_01__reg__op_07__mod__op_01__rm,+  itab__0f__op_01__reg__op_07__mod__op_01__rm__op_01__vendor,+  itab__0f__op_0d__reg,+  itab__0f__op_18__reg,+  itab__0f__op_71__reg,+  itab__0f__op_72__reg,+  itab__0f__op_73__reg,+  itab__0f__op_ae__reg,+  itab__0f__op_ae__reg__op_05__mod,+  itab__0f__op_ae__reg__op_05__mod__op_01__rm,+  itab__0f__op_ae__reg__op_06__mod,+  itab__0f__op_ae__reg__op_06__mod__op_01__rm,+  itab__0f__op_ae__reg__op_07__mod,+  itab__0f__op_ae__reg__op_07__mod__op_01__rm,+  itab__0f__op_ba__reg,+  itab__0f__op_c7__reg,+  itab__0f__op_c7__reg__op_00__vendor,+  itab__0f__op_c7__reg__op_07__vendor,+  itab__0f__op_d9__mod,+  itab__0f__op_d9__mod__op_01__x87,+  itab__1byte,+  itab__1byte__op_60__osize,+  itab__1byte__op_61__osize,+  itab__1byte__op_63__mode,+  itab__1byte__op_6d__osize,+  itab__1byte__op_6f__osize,+  itab__1byte__op_80__reg,+  itab__1byte__op_81__reg,+  itab__1byte__op_82__reg,+  itab__1byte__op_83__reg,+  itab__1byte__op_8f__reg,+  itab__1byte__op_98__osize,+  itab__1byte__op_99__osize,+  itab__1byte__op_9c__mode,+  itab__1byte__op_9c__mode__op_00__osize,+  itab__1byte__op_9c__mode__op_01__osize,+  itab__1byte__op_9d__mode,+  itab__1byte__op_9d__mode__op_00__osize,+  itab__1byte__op_9d__mode__op_01__osize,+  itab__1byte__op_a5__osize,+  itab__1byte__op_a7__osize,+  itab__1byte__op_ab__osize,+  itab__1byte__op_ad__osize,+  itab__1byte__op_ae__mod,+  itab__1byte__op_ae__mod__op_00__reg,+  itab__1byte__op_af__osize,+  itab__1byte__op_c0__reg,+  itab__1byte__op_c1__reg,+  itab__1byte__op_c6__reg,+  itab__1byte__op_c7__reg,+  itab__1byte__op_cf__osize,+  itab__1byte__op_d0__reg,+  itab__1byte__op_d1__reg,+  itab__1byte__op_d2__reg,+  itab__1byte__op_d3__reg,+  itab__1byte__op_d8__mod,+  itab__1byte__op_d8__mod__op_00__reg,+  itab__1byte__op_d8__mod__op_01__x87,+  itab__1byte__op_d9__mod,+  itab__1byte__op_d9__mod__op_00__reg,+  itab__1byte__op_d9__mod__op_01__x87,+  itab__1byte__op_da__mod,+  itab__1byte__op_da__mod__op_00__reg,+  itab__1byte__op_da__mod__op_01__x87,+  itab__1byte__op_db__mod,+  itab__1byte__op_db__mod__op_00__reg,+  itab__1byte__op_db__mod__op_01__x87,+  itab__1byte__op_dc__mod,+  itab__1byte__op_dc__mod__op_00__reg,+  itab__1byte__op_dc__mod__op_01__x87,+  itab__1byte__op_dd__mod,+  itab__1byte__op_dd__mod__op_00__reg,+  itab__1byte__op_dd__mod__op_01__x87,+  itab__1byte__op_de__mod,+  itab__1byte__op_de__mod__op_00__reg,+  itab__1byte__op_de__mod__op_01__x87,+  itab__1byte__op_df__mod,+  itab__1byte__op_df__mod__op_00__reg,+  itab__1byte__op_df__mod__op_01__x87,+  itab__1byte__op_e3__asize,+  itab__1byte__op_f6__reg,+  itab__1byte__op_f7__reg,+  itab__1byte__op_fe__reg,+  itab__1byte__op_ff__reg,+  itab__3dnow,+  itab__pfx_sse66__0f,+  itab__pfx_sse66__0f__op_71__reg,+  itab__pfx_sse66__0f__op_72__reg,+  itab__pfx_sse66__0f__op_73__reg,+  itab__pfx_sse66__0f__op_c7__reg,+  itab__pfx_sse66__0f__op_c7__reg__op_00__vendor,+  itab__pfx_ssef2__0f,+  itab__pfx_ssef3__0f,+  itab__pfx_ssef3__0f__op_c7__reg,+  itab__pfx_ssef3__0f__op_c7__reg__op_07__vendor,+};
+ udis86-1.7/libudis86/itab.h view
@@ -0,0 +1,719 @@++/* itab.h -- auto generated by opgen.py, do not edit. */++#ifndef UD_ITAB_H+#define UD_ITAB_H++++enum ud_itab_vendor_index {+  ITAB__VENDOR_INDX__AMD,+  ITAB__VENDOR_INDX__INTEL,+};+++enum ud_itab_mode_index {+  ITAB__MODE_INDX__16,+  ITAB__MODE_INDX__32,+  ITAB__MODE_INDX__64+};+++enum ud_itab_mod_index {+  ITAB__MOD_INDX__NOT_11,+  ITAB__MOD_INDX__11+};+++enum ud_itab_index {+  ITAB__0F,+  ITAB__0F__OP_00__REG,+  ITAB__0F__OP_01__REG,+  ITAB__0F__OP_01__REG__OP_00__MOD,+  ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM,+  ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_01__VENDOR,+  ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_03__VENDOR,+  ITAB__0F__OP_01__REG__OP_00__MOD__OP_01__RM__OP_04__VENDOR,+  ITAB__0F__OP_01__REG__OP_01__MOD,+  ITAB__0F__OP_01__REG__OP_01__MOD__OP_01__RM,+  ITAB__0F__OP_01__REG__OP_02__MOD,+  ITAB__0F__OP_01__REG__OP_03__MOD,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_00__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_01__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_02__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_03__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_04__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_05__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_06__VENDOR,+  ITAB__0F__OP_01__REG__OP_03__MOD__OP_01__RM__OP_07__VENDOR,+  ITAB__0F__OP_01__REG__OP_04__MOD,+  ITAB__0F__OP_01__REG__OP_06__MOD,+  ITAB__0F__OP_01__REG__OP_07__MOD,+  ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM,+  ITAB__0F__OP_01__REG__OP_07__MOD__OP_01__RM__OP_01__VENDOR,+  ITAB__0F__OP_0D__REG,+  ITAB__0F__OP_18__REG,+  ITAB__0F__OP_71__REG,+  ITAB__0F__OP_72__REG,+  ITAB__0F__OP_73__REG,+  ITAB__0F__OP_AE__REG,+  ITAB__0F__OP_AE__REG__OP_05__MOD,+  ITAB__0F__OP_AE__REG__OP_05__MOD__OP_01__RM,+  ITAB__0F__OP_AE__REG__OP_06__MOD,+  ITAB__0F__OP_AE__REG__OP_06__MOD__OP_01__RM,+  ITAB__0F__OP_AE__REG__OP_07__MOD,+  ITAB__0F__OP_AE__REG__OP_07__MOD__OP_01__RM,+  ITAB__0F__OP_BA__REG,+  ITAB__0F__OP_C7__REG,+  ITAB__0F__OP_C7__REG__OP_00__VENDOR,+  ITAB__0F__OP_C7__REG__OP_07__VENDOR,+  ITAB__0F__OP_D9__MOD,+  ITAB__0F__OP_D9__MOD__OP_01__X87,+  ITAB__1BYTE,+  ITAB__1BYTE__OP_60__OSIZE,+  ITAB__1BYTE__OP_61__OSIZE,+  ITAB__1BYTE__OP_63__MODE,+  ITAB__1BYTE__OP_6D__OSIZE,+  ITAB__1BYTE__OP_6F__OSIZE,+  ITAB__1BYTE__OP_80__REG,+  ITAB__1BYTE__OP_81__REG,+  ITAB__1BYTE__OP_82__REG,+  ITAB__1BYTE__OP_83__REG,+  ITAB__1BYTE__OP_8F__REG,+  ITAB__1BYTE__OP_98__OSIZE,+  ITAB__1BYTE__OP_99__OSIZE,+  ITAB__1BYTE__OP_9C__MODE,+  ITAB__1BYTE__OP_9C__MODE__OP_00__OSIZE,+  ITAB__1BYTE__OP_9C__MODE__OP_01__OSIZE,+  ITAB__1BYTE__OP_9D__MODE,+  ITAB__1BYTE__OP_9D__MODE__OP_00__OSIZE,+  ITAB__1BYTE__OP_9D__MODE__OP_01__OSIZE,+  ITAB__1BYTE__OP_A5__OSIZE,+  ITAB__1BYTE__OP_A7__OSIZE,+  ITAB__1BYTE__OP_AB__OSIZE,+  ITAB__1BYTE__OP_AD__OSIZE,+  ITAB__1BYTE__OP_AE__MOD,+  ITAB__1BYTE__OP_AE__MOD__OP_00__REG,+  ITAB__1BYTE__OP_AF__OSIZE,+  ITAB__1BYTE__OP_C0__REG,+  ITAB__1BYTE__OP_C1__REG,+  ITAB__1BYTE__OP_C6__REG,+  ITAB__1BYTE__OP_C7__REG,+  ITAB__1BYTE__OP_CF__OSIZE,+  ITAB__1BYTE__OP_D0__REG,+  ITAB__1BYTE__OP_D1__REG,+  ITAB__1BYTE__OP_D2__REG,+  ITAB__1BYTE__OP_D3__REG,+  ITAB__1BYTE__OP_D8__MOD,+  ITAB__1BYTE__OP_D8__MOD__OP_00__REG,+  ITAB__1BYTE__OP_D8__MOD__OP_01__X87,+  ITAB__1BYTE__OP_D9__MOD,+  ITAB__1BYTE__OP_D9__MOD__OP_00__REG,+  ITAB__1BYTE__OP_D9__MOD__OP_01__X87,+  ITAB__1BYTE__OP_DA__MOD,+  ITAB__1BYTE__OP_DA__MOD__OP_00__REG,+  ITAB__1BYTE__OP_DA__MOD__OP_01__X87,+  ITAB__1BYTE__OP_DB__MOD,+  ITAB__1BYTE__OP_DB__MOD__OP_00__REG,+  ITAB__1BYTE__OP_DB__MOD__OP_01__X87,+  ITAB__1BYTE__OP_DC__MOD,+  ITAB__1BYTE__OP_DC__MOD__OP_00__REG,+  ITAB__1BYTE__OP_DC__MOD__OP_01__X87,+  ITAB__1BYTE__OP_DD__MOD,+  ITAB__1BYTE__OP_DD__MOD__OP_00__REG,+  ITAB__1BYTE__OP_DD__MOD__OP_01__X87,+  ITAB__1BYTE__OP_DE__MOD,+  ITAB__1BYTE__OP_DE__MOD__OP_00__REG,+  ITAB__1BYTE__OP_DE__MOD__OP_01__X87,+  ITAB__1BYTE__OP_DF__MOD,+  ITAB__1BYTE__OP_DF__MOD__OP_00__REG,+  ITAB__1BYTE__OP_DF__MOD__OP_01__X87,+  ITAB__1BYTE__OP_E3__ASIZE,+  ITAB__1BYTE__OP_F6__REG,+  ITAB__1BYTE__OP_F7__REG,+  ITAB__1BYTE__OP_FE__REG,+  ITAB__1BYTE__OP_FF__REG,+  ITAB__3DNOW,+  ITAB__PFX_SSE66__0F,+  ITAB__PFX_SSE66__0F__OP_71__REG,+  ITAB__PFX_SSE66__0F__OP_72__REG,+  ITAB__PFX_SSE66__0F__OP_73__REG,+  ITAB__PFX_SSE66__0F__OP_C7__REG,+  ITAB__PFX_SSE66__0F__OP_C7__REG__OP_00__VENDOR,+  ITAB__PFX_SSEF2__0F,+  ITAB__PFX_SSEF3__0F,+  ITAB__PFX_SSEF3__0F__OP_C7__REG,+  ITAB__PFX_SSEF3__0F__OP_C7__REG__OP_07__VENDOR,+};+++enum ud_mnemonic_code {+  UD_I3dnow,+  UD_Iaaa,+  UD_Iaad,+  UD_Iaam,+  UD_Iaas,+  UD_Iadc,+  UD_Iadd,+  UD_Iaddpd,+  UD_Iaddps,+  UD_Iaddsd,+  UD_Iaddss,+  UD_Iaddsubpd,+  UD_Iaddsubps,+  UD_Iand,+  UD_Iandpd,+  UD_Iandps,+  UD_Iandnpd,+  UD_Iandnps,+  UD_Iarpl,+  UD_Imovsxd,+  UD_Ibound,+  UD_Ibsf,+  UD_Ibsr,+  UD_Ibswap,+  UD_Ibt,+  UD_Ibtc,+  UD_Ibtr,+  UD_Ibts,+  UD_Icall,+  UD_Icbw,+  UD_Icwde,+  UD_Icdqe,+  UD_Iclc,+  UD_Icld,+  UD_Iclflush,+  UD_Iclgi,+  UD_Icli,+  UD_Iclts,+  UD_Icmc,+  UD_Icmovo,+  UD_Icmovno,+  UD_Icmovb,+  UD_Icmovae,+  UD_Icmovz,+  UD_Icmovnz,+  UD_Icmovbe,+  UD_Icmova,+  UD_Icmovs,+  UD_Icmovns,+  UD_Icmovp,+  UD_Icmovnp,+  UD_Icmovl,+  UD_Icmovge,+  UD_Icmovle,+  UD_Icmovg,+  UD_Icmp,+  UD_Icmppd,+  UD_Icmpps,+  UD_Icmpsb,+  UD_Icmpsw,+  UD_Icmpsd,+  UD_Icmpsq,+  UD_Icmpss,+  UD_Icmpxchg,+  UD_Icmpxchg8b,+  UD_Icomisd,+  UD_Icomiss,+  UD_Icpuid,+  UD_Icvtdq2pd,+  UD_Icvtdq2ps,+  UD_Icvtpd2dq,+  UD_Icvtpd2pi,+  UD_Icvtpd2ps,+  UD_Icvtpi2ps,+  UD_Icvtpi2pd,+  UD_Icvtps2dq,+  UD_Icvtps2pi,+  UD_Icvtps2pd,+  UD_Icvtsd2si,+  UD_Icvtsd2ss,+  UD_Icvtsi2ss,+  UD_Icvtss2si,+  UD_Icvtss2sd,+  UD_Icvttpd2pi,+  UD_Icvttpd2dq,+  UD_Icvttps2dq,+  UD_Icvttps2pi,+  UD_Icvttsd2si,+  UD_Icvtsi2sd,+  UD_Icvttss2si,+  UD_Icwd,+  UD_Icdq,+  UD_Icqo,+  UD_Idaa,+  UD_Idas,+  UD_Idec,+  UD_Idiv,+  UD_Idivpd,+  UD_Idivps,+  UD_Idivsd,+  UD_Idivss,+  UD_Iemms,+  UD_Ienter,+  UD_If2xm1,+  UD_Ifabs,+  UD_Ifadd,+  UD_Ifaddp,+  UD_Ifbld,+  UD_Ifbstp,+  UD_Ifchs,+  UD_Ifclex,+  UD_Ifcmovb,+  UD_Ifcmove,+  UD_Ifcmovbe,+  UD_Ifcmovu,+  UD_Ifcmovnb,+  UD_Ifcmovne,+  UD_Ifcmovnbe,+  UD_Ifcmovnu,+  UD_Ifucomi,+  UD_Ifcom,+  UD_Ifcom2,+  UD_Ifcomp3,+  UD_Ifcomi,+  UD_Ifucomip,+  UD_Ifcomip,+  UD_Ifcomp,+  UD_Ifcomp5,+  UD_Ifcompp,+  UD_Ifcos,+  UD_Ifdecstp,+  UD_Ifdiv,+  UD_Ifdivp,+  UD_Ifdivr,+  UD_Ifdivrp,+  UD_Ifemms,+  UD_Iffree,+  UD_Iffreep,+  UD_Ificom,+  UD_Ificomp,+  UD_Ifild,+  UD_Ifncstp,+  UD_Ifninit,+  UD_Ifiadd,+  UD_Ifidivr,+  UD_Ifidiv,+  UD_Ifisub,+  UD_Ifisubr,+  UD_Ifist,+  UD_Ifistp,+  UD_Ifisttp,+  UD_Ifld,+  UD_Ifld1,+  UD_Ifldl2t,+  UD_Ifldl2e,+  UD_Ifldlpi,+  UD_Ifldlg2,+  UD_Ifldln2,+  UD_Ifldz,+  UD_Ifldcw,+  UD_Ifldenv,+  UD_Ifmul,+  UD_Ifmulp,+  UD_Ifimul,+  UD_Ifnop,+  UD_Ifpatan,+  UD_Ifprem,+  UD_Ifprem1,+  UD_Ifptan,+  UD_Ifrndint,+  UD_Ifrstor,+  UD_Ifnsave,+  UD_Ifscale,+  UD_Ifsin,+  UD_Ifsincos,+  UD_Ifsqrt,+  UD_Ifstp,+  UD_Ifstp1,+  UD_Ifstp8,+  UD_Ifstp9,+  UD_Ifst,+  UD_Ifnstcw,+  UD_Ifnstenv,+  UD_Ifnstsw,+  UD_Ifsub,+  UD_Ifsubp,+  UD_Ifsubr,+  UD_Ifsubrp,+  UD_Iftst,+  UD_Ifucom,+  UD_Ifucomp,+  UD_Ifucompp,+  UD_Ifxam,+  UD_Ifxch,+  UD_Ifxch4,+  UD_Ifxch7,+  UD_Ifxrstor,+  UD_Ifxsave,+  UD_Ifpxtract,+  UD_Ifyl2x,+  UD_Ifyl2xp1,+  UD_Ihaddpd,+  UD_Ihaddps,+  UD_Ihlt,+  UD_Ihsubpd,+  UD_Ihsubps,+  UD_Iidiv,+  UD_Iin,+  UD_Iimul,+  UD_Iinc,+  UD_Iinsb,+  UD_Iinsw,+  UD_Iinsd,+  UD_Iint1,+  UD_Iint3,+  UD_Iint,+  UD_Iinto,+  UD_Iinvd,+  UD_Iinvlpg,+  UD_Iinvlpga,+  UD_Iiretw,+  UD_Iiretd,+  UD_Iiretq,+  UD_Ijo,+  UD_Ijno,+  UD_Ijb,+  UD_Ijae,+  UD_Ijz,+  UD_Ijnz,+  UD_Ijbe,+  UD_Ija,+  UD_Ijs,+  UD_Ijns,+  UD_Ijp,+  UD_Ijnp,+  UD_Ijl,+  UD_Ijge,+  UD_Ijle,+  UD_Ijg,+  UD_Ijcxz,+  UD_Ijecxz,+  UD_Ijrcxz,+  UD_Ijmp,+  UD_Ilahf,+  UD_Ilar,+  UD_Ilddqu,+  UD_Ildmxcsr,+  UD_Ilds,+  UD_Ilea,+  UD_Iles,+  UD_Ilfs,+  UD_Ilgs,+  UD_Ilidt,+  UD_Ilss,+  UD_Ileave,+  UD_Ilfence,+  UD_Ilgdt,+  UD_Illdt,+  UD_Ilmsw,+  UD_Ilock,+  UD_Ilodsb,+  UD_Ilodsw,+  UD_Ilodsd,+  UD_Ilodsq,+  UD_Iloopnz,+  UD_Iloope,+  UD_Iloop,+  UD_Ilsl,+  UD_Iltr,+  UD_Imaskmovq,+  UD_Imaxpd,+  UD_Imaxps,+  UD_Imaxsd,+  UD_Imaxss,+  UD_Imfence,+  UD_Iminpd,+  UD_Iminps,+  UD_Iminsd,+  UD_Iminss,+  UD_Imonitor,+  UD_Imov,+  UD_Imovapd,+  UD_Imovaps,+  UD_Imovd,+  UD_Imovddup,+  UD_Imovdqa,+  UD_Imovdqu,+  UD_Imovdq2q,+  UD_Imovhpd,+  UD_Imovhps,+  UD_Imovlhps,+  UD_Imovlpd,+  UD_Imovlps,+  UD_Imovhlps,+  UD_Imovmskpd,+  UD_Imovmskps,+  UD_Imovntdq,+  UD_Imovnti,+  UD_Imovntpd,+  UD_Imovntps,+  UD_Imovntq,+  UD_Imovq,+  UD_Imovqa,+  UD_Imovq2dq,+  UD_Imovsb,+  UD_Imovsw,+  UD_Imovsd,+  UD_Imovsq,+  UD_Imovsldup,+  UD_Imovshdup,+  UD_Imovss,+  UD_Imovsx,+  UD_Imovupd,+  UD_Imovups,+  UD_Imovzx,+  UD_Imul,+  UD_Imulpd,+  UD_Imulps,+  UD_Imulsd,+  UD_Imulss,+  UD_Imwait,+  UD_Ineg,+  UD_Inop,+  UD_Inot,+  UD_Ior,+  UD_Iorpd,+  UD_Iorps,+  UD_Iout,+  UD_Ioutsb,+  UD_Ioutsw,+  UD_Ioutsd,+  UD_Ioutsq,+  UD_Ipacksswb,+  UD_Ipackssdw,+  UD_Ipackuswb,+  UD_Ipaddb,+  UD_Ipaddw,+  UD_Ipaddq,+  UD_Ipaddsb,+  UD_Ipaddsw,+  UD_Ipaddusb,+  UD_Ipaddusw,+  UD_Ipand,+  UD_Ipandn,+  UD_Ipause,+  UD_Ipavgb,+  UD_Ipavgw,+  UD_Ipcmpeqb,+  UD_Ipcmpeqw,+  UD_Ipcmpeqd,+  UD_Ipcmpgtb,+  UD_Ipcmpgtw,+  UD_Ipcmpgtd,+  UD_Ipextrw,+  UD_Ipinsrw,+  UD_Ipmaddwd,+  UD_Ipmaxsw,+  UD_Ipmaxub,+  UD_Ipminsw,+  UD_Ipminub,+  UD_Ipmovmskb,+  UD_Ipmulhuw,+  UD_Ipmulhw,+  UD_Ipmullw,+  UD_Ipmuludq,+  UD_Ipop,+  UD_Ipopa,+  UD_Ipopad,+  UD_Ipopfw,+  UD_Ipopfd,+  UD_Ipopfq,+  UD_Ipor,+  UD_Iprefetch,+  UD_Iprefetchnta,+  UD_Iprefetcht0,+  UD_Iprefetcht1,+  UD_Iprefetcht2,+  UD_Ipsadbw,+  UD_Ipshufd,+  UD_Ipshufhw,+  UD_Ipshuflw,+  UD_Ipshufw,+  UD_Ipslldq,+  UD_Ipsllw,+  UD_Ipslld,+  UD_Ipsllq,+  UD_Ipsraw,+  UD_Ipsrad,+  UD_Ipsrlw,+  UD_Ipsrld,+  UD_Ipsrlq,+  UD_Ipsrldq,+  UD_Ipsubb,+  UD_Ipsubw,+  UD_Ipsubd,+  UD_Ipsubq,+  UD_Ipsubsb,+  UD_Ipsubsw,+  UD_Ipsubusb,+  UD_Ipsubusw,+  UD_Ipunpckhbw,+  UD_Ipunpckhwd,+  UD_Ipunpckhdq,+  UD_Ipunpckhqdq,+  UD_Ipunpcklbw,+  UD_Ipunpcklwd,+  UD_Ipunpckldq,+  UD_Ipunpcklqdq,+  UD_Ipi2fw,+  UD_Ipi2fd,+  UD_Ipf2iw,+  UD_Ipf2id,+  UD_Ipfnacc,+  UD_Ipfpnacc,+  UD_Ipfcmpge,+  UD_Ipfmin,+  UD_Ipfrcp,+  UD_Ipfrsqrt,+  UD_Ipfsub,+  UD_Ipfadd,+  UD_Ipfcmpgt,+  UD_Ipfmax,+  UD_Ipfrcpit1,+  UD_Ipfrspit1,+  UD_Ipfsubr,+  UD_Ipfacc,+  UD_Ipfcmpeq,+  UD_Ipfmul,+  UD_Ipfrcpit2,+  UD_Ipmulhrw,+  UD_Ipswapd,+  UD_Ipavgusb,+  UD_Ipush,+  UD_Ipusha,+  UD_Ipushad,+  UD_Ipushfw,+  UD_Ipushfd,+  UD_Ipushfq,+  UD_Ipxor,+  UD_Ircl,+  UD_Ircr,+  UD_Irol,+  UD_Iror,+  UD_Ircpps,+  UD_Ircpss,+  UD_Irdmsr,+  UD_Irdpmc,+  UD_Irdtsc,+  UD_Irdtscp,+  UD_Irepne,+  UD_Irep,+  UD_Iret,+  UD_Iretf,+  UD_Irsm,+  UD_Irsqrtps,+  UD_Irsqrtss,+  UD_Isahf,+  UD_Isal,+  UD_Isalc,+  UD_Isar,+  UD_Ishl,+  UD_Ishr,+  UD_Isbb,+  UD_Iscasb,+  UD_Iscasw,+  UD_Iscasd,+  UD_Iscasq,+  UD_Iseto,+  UD_Isetno,+  UD_Isetb,+  UD_Isetnb,+  UD_Isetz,+  UD_Isetnz,+  UD_Isetbe,+  UD_Iseta,+  UD_Isets,+  UD_Isetns,+  UD_Isetp,+  UD_Isetnp,+  UD_Isetl,+  UD_Isetge,+  UD_Isetle,+  UD_Isetg,+  UD_Isfence,+  UD_Isgdt,+  UD_Ishld,+  UD_Ishrd,+  UD_Ishufpd,+  UD_Ishufps,+  UD_Isidt,+  UD_Isldt,+  UD_Ismsw,+  UD_Isqrtps,+  UD_Isqrtpd,+  UD_Isqrtsd,+  UD_Isqrtss,+  UD_Istc,+  UD_Istd,+  UD_Istgi,+  UD_Isti,+  UD_Iskinit,+  UD_Istmxcsr,+  UD_Istosb,+  UD_Istosw,+  UD_Istosd,+  UD_Istosq,+  UD_Istr,+  UD_Isub,+  UD_Isubpd,+  UD_Isubps,+  UD_Isubsd,+  UD_Isubss,+  UD_Iswapgs,+  UD_Isyscall,+  UD_Isysenter,+  UD_Isysexit,+  UD_Isysret,+  UD_Itest,+  UD_Iucomisd,+  UD_Iucomiss,+  UD_Iud2,+  UD_Iunpckhpd,+  UD_Iunpckhps,+  UD_Iunpcklps,+  UD_Iunpcklpd,+  UD_Iverr,+  UD_Iverw,+  UD_Ivmcall,+  UD_Ivmclear,+  UD_Ivmxon,+  UD_Ivmptrld,+  UD_Ivmptrst,+  UD_Ivmresume,+  UD_Ivmxoff,+  UD_Ivmrun,+  UD_Ivmmcall,+  UD_Ivmload,+  UD_Ivmsave,+  UD_Iwait,+  UD_Iwbinvd,+  UD_Iwrmsr,+  UD_Ixadd,+  UD_Ixchg,+  UD_Ixlatb,+  UD_Ixor,+  UD_Ixorpd,+  UD_Ixorps,+  UD_Idb,+  UD_Iinvalid,+  UD_Id3vil,+  UD_Ina,+  UD_Igrp_reg,+  UD_Igrp_rm,+  UD_Igrp_vendor,+  UD_Igrp_x87,+  UD_Igrp_mode,+  UD_Igrp_osize,+  UD_Igrp_asize,+  UD_Igrp_mod,+  UD_Inone,+};++++extern const char* ud_mnemonics_str[];;+extern struct ud_itab_entry* ud_itab_list[];++#endif
+ udis86-1.7/libudis86/syn-att.c view
@@ -0,0 +1,211 @@+/* -----------------------------------------------------------------------------+ * syn-att.c+ *+ * Copyright (c) 2004, 2005, 2006 Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See (LICENSE)+ * -----------------------------------------------------------------------------+ */++#include "types.h"+#include "extern.h"+#include "decode.h"+#include "itab.h"+#include "syn.h"++/* -----------------------------------------------------------------------------+ * opr_cast() - Prints an operand cast.+ * -----------------------------------------------------------------------------+ */+static void +opr_cast(struct ud* u, struct ud_operand* op)+{+  switch(op->size) {+	case 16 : case 32 :+		mkasm(u, "*");   break;+	default: break;+  }+}++/* -----------------------------------------------------------------------------+ * gen_operand() - Generates assembly output for each operand.+ * -----------------------------------------------------------------------------+ */+static void +gen_operand(struct ud* u, struct ud_operand* op)+{+  switch(op->type) {+	case UD_OP_REG:+		mkasm(u, "%%%s", ud_reg_tab[op->base - UD_R_AL]);+		break;++	case UD_OP_MEM:+		if (u->br_far) opr_cast(u, op);+		if (u->pfx_seg)+			mkasm(u, "%%%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]);+		if (op->offset == 8) {+			if (op->lval.sbyte < 0)+				mkasm(u, "-0x%x", (-op->lval.sbyte) & 0xff);+			else	mkasm(u, "0x%x", op->lval.sbyte);+		} +		else if (op->offset == 16) +			mkasm(u, "0x%x", op->lval.uword);+		else if (op->offset == 32) +			mkasm(u, "0x%lx", op->lval.udword);+		else if (op->offset == 64) +			mkasm(u, "0x" FMT64 "x", op->lval.uqword);++		if (op->base)+			mkasm(u, "(%%%s", ud_reg_tab[op->base - UD_R_AL]);+		if (op->index) {+			if (op->base)+				mkasm(u, ",");+			else mkasm(u, "(");+			mkasm(u, "%%%s", ud_reg_tab[op->index - UD_R_AL]);+		}+		if (op->scale)+			mkasm(u, ",%d", op->scale);+		if (op->base || op->index)+			mkasm(u, ")");+		break;++	case UD_OP_IMM:+		switch (op->size) {+			case  8: mkasm(u, "$0x%x", op->lval.ubyte);    break;+			case 16: mkasm(u, "$0x%x", op->lval.uword);    break;+			case 32: mkasm(u, "$0x%lx", op->lval.udword);  break;+			case 64: mkasm(u, "$0x" FMT64 "x", op->lval.uqword); break;+			default: break;+		}+		break;++	case UD_OP_JIMM:+		switch (op->size) {+			case  8:+				mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); +				break;+			case 16:+				mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword);+				break;+			case 32:+				mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword);+				break;+			default:break;+		}+		break;++	case UD_OP_PTR:+		switch (op->size) {+			case 32:+				mkasm(u, "$0x%x, $0x%x", op->lval.ptr.seg, +					op->lval.ptr.off & 0xFFFF);+				break;+			case 48:+				mkasm(u, "$0x%x, $0x%lx", op->lval.ptr.seg, +					op->lval.ptr.off);+				break;+		}+		break;+			+	default: return;+  }+}++/* =============================================================================+ * translates to AT&T syntax + * =============================================================================+ */+extern void +ud_translate_att(struct ud *u)+{+  int size = 0;++  /* check if P_OSO prefix is used */+  if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) {+	switch (u->dis_mode) {+		case 16: +			mkasm(u, "o32 ");+			break;+		case 32:+		case 64:+ 			mkasm(u, "o16 ");+			break;+	}+  }++  /* check if P_ASO prefix was used */+  if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) {+	switch (u->dis_mode) {+		case 16: +			mkasm(u, "a32 ");+			break;+		case 32:+ 			mkasm(u, "a16 ");+			break;+		case 64:+ 			mkasm(u, "a32 ");+			break;+	}+  }++  if (u->pfx_lock)+  	mkasm(u,  "lock ");+  if (u->pfx_rep)+	mkasm(u,  "rep ");+  if (u->pfx_repne)+		mkasm(u,  "repne ");++  /* special instructions */+  switch (u->mnemonic) {+	case UD_Iretf: +		mkasm(u, "lret "); +		break;+	case UD_Idb:+		mkasm(u, ".byte 0x%x", u->operand[0].lval.ubyte);+		return;+	case UD_Ijmp:+	case UD_Icall:+		if (u->br_far) mkasm(u,  "l");+		mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic));+		break;+	case UD_Ibound:+	case UD_Ienter:+		if (u->operand[0].type != UD_NONE)+			gen_operand(u, &u->operand[0]);+		if (u->operand[1].type != UD_NONE) {+			mkasm(u, ",");+			gen_operand(u, &u->operand[1]);+		}+		return;+	default:+		mkasm(u, "%s", ud_lookup_mnemonic(u->mnemonic));+  }++  if (u->c1)+	size = u->operand[0].size;+  else if (u->c2)+	size = u->operand[1].size;+  else if (u->c3)+	size = u->operand[2].size;++  if (size == 8)+	mkasm(u, "b");+  else if (size == 16)+	mkasm(u, "w");+  else if (size == 64)+ 	mkasm(u, "q");++  mkasm(u, " ");++  if (u->operand[2].type != UD_NONE) {+	gen_operand(u, &u->operand[2]);+	mkasm(u, ", ");+  }++  if (u->operand[1].type != UD_NONE) {+	gen_operand(u, &u->operand[1]);+	mkasm(u, ", ");+  }++  if (u->operand[0].type != UD_NONE)+	gen_operand(u, &u->operand[0]);+}
+ udis86-1.7/libudis86/syn-intel.c view
@@ -0,0 +1,208 @@+/* -----------------------------------------------------------------------------+ * syn-intel.c+ *+ * Copyright (c) 2002, 2003, 2004 Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See (LICENSE)+ * -----------------------------------------------------------------------------+ */++#include "types.h"+#include "extern.h"+#include "decode.h"+#include "itab.h"+#include "syn.h"++/* -----------------------------------------------------------------------------+ * opr_cast() - Prints an operand cast.+ * -----------------------------------------------------------------------------+ */+static void +opr_cast(struct ud* u, struct ud_operand* op)+{+  switch(op->size) {+	case  8: mkasm(u, "byte " ); break;+	case 16: mkasm(u, "word " ); break;+	case 32: mkasm(u, "dword "); break;+	case 64: mkasm(u, "qword "); break;+	case 80: mkasm(u, "tword "); break;+	default: break;+  }+  if (u->br_far)+	mkasm(u, "far "); +  else if (u->br_near)+	mkasm(u, "near ");+}++/* -----------------------------------------------------------------------------+ * gen_operand() - Generates assembly output for each operand.+ * -----------------------------------------------------------------------------+ */+static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast)+{+  switch(op->type) {+	case UD_OP_REG:+		mkasm(u, ud_reg_tab[op->base - UD_R_AL]);+		break;++	case UD_OP_MEM: {++		int op_f = 0;++		if (syn_cast) +			opr_cast(u, op);++		mkasm(u, "[");++		if (u->pfx_seg)+			mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]);++		if (op->base) {+			mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]);+			op_f = 1;+		}++		if (op->index) {+			if (op_f)+				mkasm(u, "+");+			mkasm(u, "%s", ud_reg_tab[op->index - UD_R_AL]);+			op_f = 1;+		}++		if (op->scale)+			mkasm(u, "*%d", op->scale);++		if (op->offset == 8) {+			if (op->lval.sbyte < 0)+				mkasm(u, "-0x%x", -op->lval.sbyte);+			else	mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sbyte);+		}+		else if (op->offset == 16)+			mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.uword);+		else if (op->offset == 32) {+			if (u->adr_mode == 64) {+				if (op->lval.sdword < 0)+					mkasm(u, "-0x%x", -op->lval.sdword);+				else	mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sdword);+			} +			else	mkasm(u, "%s0x%lx", (op_f) ? "+" : "", op->lval.udword);+		}+		else if (op->offset == 64) +			mkasm(u, "%s0x" FMT64 "x", (op_f) ? "+" : "", op->lval.uqword);++		mkasm(u, "]");+		break;+	}+			+	case UD_OP_IMM:+		if (syn_cast) opr_cast(u, op);+		switch (op->size) {+			case  8: mkasm(u, "0x%x", op->lval.ubyte);    break;+			case 16: mkasm(u, "0x%x", op->lval.uword);    break;+			case 32: mkasm(u, "0x%lx", op->lval.udword);  break;+			case 64: mkasm(u, "0x" FMT64 "x", op->lval.uqword); break;+			default: break;+		}+		break;++	case UD_OP_JIMM:+		if (syn_cast) opr_cast(u, op);+		switch (op->size) {+			case  8:+				mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte); +				break;+			case 16:+				mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword);+				break;+			case 32:+				mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword);+				break;+			default:break;+		}+		break;++	case UD_OP_PTR:+		switch (op->size) {+			case 32:+				mkasm(u, "word 0x%x:0x%x", op->lval.ptr.seg, +					op->lval.ptr.off & 0xFFFF);+				break;+			case 48:+				mkasm(u, "dword 0x%x:0x%lx", op->lval.ptr.seg, +					op->lval.ptr.off);+				break;+		}+		break;++	case UD_OP_CONST:+		if (syn_cast) opr_cast(u, op);+		mkasm(u, "%d", op->lval.udword);+		break;++	default: return;+  }+}++/* =============================================================================+ * translates to intel syntax + * =============================================================================+ */+extern void ud_translate_intel(struct ud* u)+{+  /* -- prefixes -- */++  /* check if P_OSO prefix is used */+  if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) {+	switch (u->dis_mode) {+		case 16: +			mkasm(u, "o32 ");+			break;+		case 32:+		case 64:+ 			mkasm(u, "o16 ");+			break;+	}+  }++  /* check if P_ASO prefix was used */+  if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) {+	switch (u->dis_mode) {+		case 16: +			mkasm(u, "a32 ");+			break;+		case 32:+ 			mkasm(u, "a16 ");+			break;+		case 64:+ 			mkasm(u, "a32 ");+			break;+	}+  }++  if (u->pfx_lock)+	mkasm(u, "lock ");+  if (u->pfx_rep)+	mkasm(u, "rep ");+  if (u->pfx_repne)+	mkasm(u, "repne ");+  if (u->implicit_addr && u->pfx_seg)+	mkasm(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]);++  /* print the instruction mnemonic */+  mkasm(u, "%s ", ud_lookup_mnemonic(u->mnemonic));++  /* operand 1 */+  if (u->operand[0].type != UD_NONE) {+	gen_operand(u, &u->operand[0], u->c1);+  }+  /* operand 2 */+  if (u->operand[1].type != UD_NONE) {+	mkasm(u, ", ");+	gen_operand(u, &u->operand[1], u->c2);+  }++  /* operand 3 */+  if (u->operand[2].type != UD_NONE) {+	mkasm(u, ", ");+	gen_operand(u, &u->operand[2], u->c3);+  }+}
+ udis86-1.7/libudis86/syn.c view
@@ -0,0 +1,61 @@+/* -----------------------------------------------------------------------------+ * syn.c+ *+ * Copyright (c) 2002, 2003, 2004 Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See (LICENSE)+ * -----------------------------------------------------------------------------+ */++/* -----------------------------------------------------------------------------+ * Intel Register Table - Order Matters (types.h)!+ * -----------------------------------------------------------------------------+ */+const char* ud_reg_tab[] = +{+  "al",		"cl",		"dl",		"bl",+  "ah",		"ch",		"dh",		"bh",+  "spl",	"bpl",		"sil",		"dil",+  "r8b",	"r9b",		"r10b",		"r11b",+  "r12b",	"r13b",		"r14b",		"r15b",++  "ax",		"cx",		"dx",		"bx",+  "sp",		"bp",		"si",		"di",+  "r8w",	"r9w",		"r10w",		"r11w",+  "r12w",	"r13W"	,	"r14w",		"r15w",+	+  "eax",	"ecx",		"edx",		"ebx",+  "esp",	"ebp",		"esi",		"edi",+  "r8d",	"r9d",		"r10d",		"r11d",+  "r12d",	"r13d",		"r14d",		"r15d",+	+  "rax",	"rcx",		"rdx",		"rbx",+  "rsp",	"rbp",		"rsi",		"rdi",+  "r8",		"r9",		"r10",		"r11",+  "r12",	"r13",		"r14",		"r15",++  "es",		"cs",		"ss",		"ds",+  "fs",		"gs",	++  "cr0",	"cr1",		"cr2",		"cr3",+  "cr4",	"cr5",		"cr6",		"cr7",+  "cr8",	"cr9",		"cr10",		"cr11",+  "cr12",	"cr13",		"cr14",		"cr15",+	+  "dr0",	"dr1",		"dr2",		"dr3",+  "dr4",	"dr5",		"dr6",		"dr7",+  "dr8",	"dr9",		"dr10",		"dr11",+  "dr12",	"dr13",		"dr14",		"dr15",++  "mm0",	"mm1",		"mm2",		"mm3",+  "mm4",	"mm5",		"mm6",		"mm7",++  "st0",	"st1",		"st2",		"st3",+  "st4",	"st5",		"st6",		"st7", ++  "xmm0",	"xmm1",		"xmm2",		"xmm3",+  "xmm4",	"xmm5",		"xmm6",		"xmm7",+  "xmm8",	"xmm9",		"xmm10",	"xmm11",+  "xmm12",	"xmm13",	"xmm14",	"xmm15",++  "rip"+};
+ udis86-1.7/libudis86/syn.h view
@@ -0,0 +1,25 @@+/* -----------------------------------------------------------------------------+ * syn.h+ *+ * Copyright (c) 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */+#ifndef UD_SYN_H+#define UD_SYN_H++#include <stdio.h>+#include <stdarg.h>+#include "types.h"++extern const char* ud_reg_tab[];++static void mkasm(struct ud* u, const char* fmt, ...)+{+  va_list ap;+  va_start(ap, fmt);+  u->insn_fill += vsprintf((char*) u->insn_buffer + u->insn_fill, fmt, ap);+  va_end(ap);+}++#endif
+ udis86-1.7/libudis86/types.h view
@@ -0,0 +1,200 @@+/* -----------------------------------------------------------------------------+ * types.h+ *+ * Copyright (c) 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */+#ifndef UD_TYPES_H+#define UD_TYPES_H++#include <stdio.h>++#ifdef _MSC_VER+# define FMT64 "%I64"+  typedef unsigned __int8 uint8_t;+  typedef unsigned __int16 uint16_t;+  typedef unsigned __int32 uint32_t;+  typedef unsigned __int64 uint64_t;+  typedef __int8 int8_t;+  typedef __int16 int16_t;+  typedef __int32 int32_t;+  typedef __int64 int64_t;+#else+# define FMT64 "%ll"+# include <inttypes.h>+#endif++#include "itab.h"++/* -----------------------------------------------------------------------------+ * All possible "types" of objects in udis86. Order is Important!+ * -----------------------------------------------------------------------------+ */+enum ud_type+{+  UD_NONE,++  /* 8 bit GPRs */+  UD_R_AL,	UD_R_CL,	UD_R_DL,	UD_R_BL,+  UD_R_AH,	UD_R_CH,	UD_R_DH,	UD_R_BH,+  UD_R_SPL,	UD_R_BPL,	UD_R_SIL,	UD_R_DIL,+  UD_R_R8B,	UD_R_R9B,	UD_R_R10B,	UD_R_R11B,+  UD_R_R12B,	UD_R_R13B,	UD_R_R14B,	UD_R_R15B,++  /* 16 bit GPRs */+  UD_R_AX,	UD_R_CX,	UD_R_DX,	UD_R_BX,+  UD_R_SP,	UD_R_BP,	UD_R_SI,	UD_R_DI,+  UD_R_R8W,	UD_R_R9W,	UD_R_R10W,	UD_R_R11W,+  UD_R_R12W,	UD_R_R13W,	UD_R_R14W,	UD_R_R15W,+	+  /* 32 bit GPRs */+  UD_R_EAX,	UD_R_ECX,	UD_R_EDX,	UD_R_EBX,+  UD_R_ESP,	UD_R_EBP,	UD_R_ESI,	UD_R_EDI,+  UD_R_R8D,	UD_R_R9D,	UD_R_R10D,	UD_R_R11D,+  UD_R_R12D,	UD_R_R13D,	UD_R_R14D,	UD_R_R15D,+	+  /* 64 bit GPRs */+  UD_R_RAX,	UD_R_RCX,	UD_R_RDX,	UD_R_RBX,+  UD_R_RSP,	UD_R_RBP,	UD_R_RSI,	UD_R_RDI,+  UD_R_R8,	UD_R_R9,	UD_R_R10,	UD_R_R11,+  UD_R_R12,	UD_R_R13,	UD_R_R14,	UD_R_R15,++  /* segment registers */+  UD_R_ES,	UD_R_CS,	UD_R_SS,	UD_R_DS,+  UD_R_FS,	UD_R_GS,	++  /* control registers*/+  UD_R_CR0,	UD_R_CR1,	UD_R_CR2,	UD_R_CR3,+  UD_R_CR4,	UD_R_CR5,	UD_R_CR6,	UD_R_CR7,+  UD_R_CR8,	UD_R_CR9,	UD_R_CR10,	UD_R_CR11,+  UD_R_CR12,	UD_R_CR13,	UD_R_CR14,	UD_R_CR15,+	+  /* debug registers */+  UD_R_DR0,	UD_R_DR1,	UD_R_DR2,	UD_R_DR3,+  UD_R_DR4,	UD_R_DR5,	UD_R_DR6,	UD_R_DR7,+  UD_R_DR8,	UD_R_DR9,	UD_R_DR10,	UD_R_DR11,+  UD_R_DR12,	UD_R_DR13,	UD_R_DR14,	UD_R_DR15,++  /* mmx registers */+  UD_R_MM0,	UD_R_MM1,	UD_R_MM2,	UD_R_MM3,+  UD_R_MM4,	UD_R_MM5,	UD_R_MM6,	UD_R_MM7,++  /* x87 registers */+  UD_R_ST0,	UD_R_ST1,	UD_R_ST2,	UD_R_ST3,+  UD_R_ST4,	UD_R_ST5,	UD_R_ST6,	UD_R_ST7, ++  /* extended multimedia registers */+  UD_R_XMM0,	UD_R_XMM1,	UD_R_XMM2,	UD_R_XMM3,+  UD_R_XMM4,	UD_R_XMM5,	UD_R_XMM6,	UD_R_XMM7,+  UD_R_XMM8,	UD_R_XMM9,	UD_R_XMM10,	UD_R_XMM11,+  UD_R_XMM12,	UD_R_XMM13,	UD_R_XMM14,	UD_R_XMM15,++  UD_R_RIP,++  /* Operand Types */+  UD_OP_REG,	UD_OP_MEM,	UD_OP_PTR,	UD_OP_IMM,	+  UD_OP_JIMM,	UD_OP_CONST+};++/* -----------------------------------------------------------------------------+ * struct ud_operand - Disassembled instruction Operand.+ * -----------------------------------------------------------------------------+ */+struct ud_operand +{+  enum ud_type		type;+  uint8_t		size;+  union {+	int8_t		sbyte;+	uint8_t		ubyte;+	int16_t		sword;+	uint16_t	uword;+	int32_t		sdword;+	uint32_t	udword;+	int64_t		sqword;+	uint64_t	uqword;++	struct {+		uint16_t seg;+		uint32_t off;+	} ptr;+  } lval;++  enum ud_type		base;+  enum ud_type		index;+  uint8_t		offset;+  uint8_t		scale;	+};++/* -----------------------------------------------------------------------------+ * struct ud - The udis86 object.+ * -----------------------------------------------------------------------------+ */+struct ud+{+  int 			(*inp_hook) (struct ud*);+  uint8_t		inp_curr;+  uint8_t		inp_fill;+  FILE*			inp_file;+  uint8_t		inp_ctr;+  uint8_t*		inp_buff;+  uint8_t*		inp_buff_end;+  uint8_t		inp_end;+  void			(*translator)(struct ud*);+  uint64_t		insn_offset;+  char			insn_hexcode[32];+  char			insn_buffer[64];+  unsigned int		insn_fill;+  uint8_t		dis_mode;+  uint64_t		pc;+  uint8_t		vendor;+  struct map_entry*	mapen;+  enum ud_mnemonic_code	mnemonic;+  struct ud_operand	operand[3];+  uint8_t		error;+  uint8_t	 	pfx_rex;+  uint8_t 		pfx_seg;+  uint8_t 		pfx_opr;+  uint8_t 		pfx_adr;+  uint8_t 		pfx_lock;+  uint8_t 		pfx_rep;+  uint8_t 		pfx_repe;+  uint8_t 		pfx_repne;+  uint8_t 		pfx_insn;+  uint8_t		default64;+  uint8_t		opr_mode;+  uint8_t		adr_mode;+  uint8_t		br_far;+  uint8_t		br_near;+  uint8_t		implicit_addr;+  uint8_t		c1;+  uint8_t		c2;+  uint8_t		c3;+  uint8_t 		inp_cache[256];+  uint8_t		inp_sess[64];+  struct ud_itab_entry * itab_entry;+};++/* -----------------------------------------------------------------------------+ * Type-definitions+ * -----------------------------------------------------------------------------+ */+typedef enum ud_type 		ud_type_t;+typedef enum ud_mnemonic_code	ud_mnemonic_code_t;++typedef struct ud 		ud_t;+typedef struct ud_operand 	ud_operand_t;++#define UD_SYN_INTEL		ud_translate_intel+#define UD_SYN_ATT		ud_translate_att+#define UD_EOI			-1+#define UD_INP_CACHE_SZ		32+#define UD_VENDOR_AMD		0+#define UD_VENDOR_INTEL		1++#define bail_out(ud,error_code) longjmp( (ud)->bailout, error_code )+#define try_decode(ud) if ( setjmp( (ud)->bailout ) == 0 )+#define catch_error() else++#endif
+ udis86-1.7/libudis86/udis86.c view
@@ -0,0 +1,154 @@+/* -----------------------------------------------------------------------------+ * udis86.c+ *+ * Copyright (c) 2004, 2005, 2006, Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See LICENSE+ * -----------------------------------------------------------------------------+ */++#include <stdlib.h>+#include <stdio.h>+#include <string.h>++#include "input.h"+#include "extern.h"++/* =============================================================================+ * ud_init() - Initializes ud_t object.+ * =============================================================================+ */+extern void +ud_init(struct ud* u)+{+  memset((void*)u, 0, sizeof(struct ud));+  ud_set_mode(u, 16);+  u->mnemonic = UD_Iinvalid;+  ud_set_pc(u, 0);+#ifndef __UD_STANDALONE__+  ud_set_input_file(u, stdin);+#endif /* __UD_STANDALONE__ */+}++/* =============================================================================+ * ud_disassemble() - disassembles one instruction and returns the number of + * bytes disassembled. A zero means end of disassembly.+ * =============================================================================+ */+extern unsigned int+ud_disassemble(struct ud* u)+{+  if (ud_input_end(u))+	return 0;++ +  u->insn_buffer[0] = u->insn_hexcode[0] = 0;++ +  if (ud_decode(u) == 0)+	return 0;+  if (u->translator)+	u->translator(u);+  return ud_insn_len(u);+}++/* =============================================================================+ * ud_set_mode() - Set Disassemly Mode.+ * =============================================================================+ */+extern void +ud_set_mode(struct ud* u, uint8_t m)+{+  switch(m) {+	case 16:+	case 32:+	case 64: u->dis_mode = m ; return;+	default: u->dis_mode = 16; return;+  }+}++/* =============================================================================+ * ud_set_vendor() - Set vendor.+ * =============================================================================+ */+extern void +ud_set_vendor(struct ud* u, unsigned v)+{+  switch(v) {+	case UD_VENDOR_INTEL:+		u->vendor = v;+		break;+	default:+		u->vendor = UD_VENDOR_AMD;+  }+}++/* =============================================================================+ * ud_set_pc() - Sets code origin. + * =============================================================================+ */+extern void +ud_set_pc(struct ud* u, uint64_t o)+{+  u->pc = o;+}++/* =============================================================================+ * ud_set_syntax() - Sets the output syntax.+ * =============================================================================+ */+extern void +ud_set_syntax(struct ud* u, void (*t)(struct ud*))+{+  u->translator = t;+}++/* =============================================================================+ * ud_insn() - returns the disassembled instruction+ * =============================================================================+ */+extern char* +ud_insn_asm(struct ud* u) +{+  return u->insn_buffer;+}++/* =============================================================================+ * ud_insn_offset() - Returns the offset.+ * =============================================================================+ */+extern uint64_t+ud_insn_off(struct ud* u) +{+  return u->insn_offset;+}+++/* =============================================================================+ * ud_insn_hex() - Returns hex form of disassembled instruction.+ * =============================================================================+ */+extern char* +ud_insn_hex(struct ud* u) +{+  return u->insn_hexcode;+}++/* =============================================================================+ * ud_insn_ptr() - Returns code disassembled.+ * =============================================================================+ */+extern uint8_t* +ud_insn_ptr(struct ud* u) +{+  return u->inp_sess;+}++/* =============================================================================+ * ud_insn_len() - Returns the count of bytes disassembled.+ * =============================================================================+ */+extern unsigned int +ud_insn_len(struct ud* u) +{+  return u->inp_ctr;+}
+ udis86-1.7/udis86.h view
@@ -0,0 +1,16 @@+/* -----------------------------------------------------------------------------+ * udis86.h+ *+ * Copyright (c) 2002, 2003, 2004 Vivek Mohan <vivek@sig9.com>+ * All rights reserved. See (LICENSE)+ * -----------------------------------------------------------------------------+ */++#ifndef UDIS86_H+#define UDIS86_H++#include "libudis86/types.h"+#include "libudis86/extern.h"+#include "libudis86/itab.h"++#endif