diff --git a/CHANGELOG.md b/CHANGELOG.md
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,3 +1,7 @@
+# Version [0.1.2.0](https://github.com/DistRap/data-svd/compare/0.1.1.0...0.1.2.0) (2024-02-09)
+
+* Added few more continuity check ignores due to aliased fields in stm32-rs
+
 # Version [0.1.1.0](https://github.com/DistRap/data-svd/compare/0.1.0.0...0.1.1.0) (2023-12-25)
 
 * Added `Data.SVD.Pretty.Explore` with `exploreRegister`
diff --git a/data-svd.cabal b/data-svd.cabal
--- a/data-svd.cabal
+++ b/data-svd.cabal
@@ -1,6 +1,6 @@
 cabal-version:       2.2
 name:                data-svd
-version:             0.1.1.0
+version:             0.1.2.0
 synopsis:            SVD (System view description) file handling
 description:         Parse, print, diff SVD files
 homepage:            https://github.com/DistRap/data-svd
diff --git a/src/Data/SVD/Util.hs b/src/Data/SVD/Util.hs
--- a/src/Data/SVD/Util.hs
+++ b/src/Data/SVD/Util.hs
@@ -134,17 +134,28 @@
   -> Either String Register
 
 -- Some ignores
--- TIM5.CNT is 32 bit but has an aliased UIFCPY field
+-- TIM2.CNT, TIM5.CNT is 32 bit but has an aliased UIFCPY field
 continuityCheckReg d p r
   | d ^. name `elem` [ "STM32F730", "STM32F745", "STM32F750", "STM32F765"
                      , "STM32F7x2", "STM32F7x3", "STM32F7x6", "STM32F7x7", "STM32F7x9" ]
-  && p ^. name == "TIM5" && r ^. name == "CNT" = pure r
+  && p ^. name `elem` [ "TIM2", "TIM5" ]
+  && r ^. name == "CNT" = pure r
+-- similar for Gs
+--
+continuityCheckReg d p r
+  | d ^. name `elem` [ "STM32G431xx", "STM32G441xx", "STM32G471xx", "STM32G473xx"
+                     , "STM32G474xx", "STM32G483xx", "STM32G484xx", "STM32G491xx", "STM32G4A1xx" ]
+  && p ^. name == "TIM2" && r ^. name == "CNT" = pure r
 -- G4 TIM2.CCR5, might be a bug in stm32-rs
 continuityCheckReg d p r
   | d ^. name `elem` [ "STM32G431xx", "STM32G441xx", "STM32G471xx", "STM32G473xx"
                      , "STM32G474xx", "STM32G483xx", "STM32G484xx", "STM32G491xx", "STM32G4A1xx" ]
   && p ^. name == "TIM2" && r ^. name == "CCR5" = pure r
+-- F101, F103 TIM10.CCMR1_Output aliased OC1FE field
 continuityCheckReg d p r
+  | d ^. name `elem` [ "STM32F101", "STM32F103" ]
+  && p ^. name == "TIM10" && r ^. name == "CCMR1_Output" = pure r
+continuityCheckReg d p r
   | d ^. name == "STM32H73x"
   && p ^. name == "CRYP" && r ^. name == "K2LR" = pure r
 continuityCheckReg d p r
@@ -162,6 +173,9 @@
 continuityCheckReg d p r
   | d ^. name == "STM32WB55"
   && p ^.name == "TIM2" && r ^. name == "CNT" = pure r
+-- lots of errors in TIMx, GPDMA1
+continuityCheckReg d _p r
+  | "STM32H5" `Data.List.isPrefixOf` (d ^. name) = pure r
 continuityCheckReg d p r =
   go
     ( reverse