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clash-vhdl 0.6.3 → 0.6.4

raw patch · 3 files changed

+20/−15 lines, 3 filesPVP ok

version bump matches the API change (PVP)

API changes (from Hackage documentation)

Files

CHANGELOG.md view
@@ -1,5 +1,9 @@ # Changelog for the [`clash-vhdl`](http://hackage.haskell.org/package/clash-vhdl) package +## 0.6.4 *November 17th 2015*+* Fixes bugs:+  * Integer literals should only be capped to 32-bit when used in assignments.+ ## 0.6.3 *November 12th 2015* * Fixes bugs:   * Do not generate overlapping literal patterns [#91](https://github.com/clash-lang/clash-compiler/issues/91)
clash-vhdl.cabal view
@@ -1,5 +1,5 @@ Name:                 clash-vhdl-Version:              0.6.3+Version:              0.6.4 Synopsis:             CAES Language for Synchronous Hardware - VHDL backend Description:   CλaSH (pronounced ‘clash’) is a functional hardware description language that
src/CLaSH/Backend/VHDL.hs view
@@ -579,21 +579,22 @@ vectorChain _                                       = Nothing  exprLit :: Maybe (HWType,Size) -> Literal -> VHDLM Doc-exprLit Nothing (NumLit i) =-  let integerLow  = -2^(31 :: Integer) :: Integer-      integerHigh = 2^(31 :: Integer) - 1 :: Integer-      i' = if i < integerLow-              then integerLow-              else if i > integerHigh-                   then integerHigh-                   else i-  in  parenIf (i' < 0) (integer i')+exprLit Nothing (NumLit i) = integer i+ exprLit (Just (hty,sz)) (NumLit i) = case hty of-                                       Unsigned _  -> "unsigned'" <> parens blit-                                       Signed   _  -> "signed'" <> parens blit-                                       BitVector _ -> "std_logic_vector'" <> parens blit-                                       Integer     -> integer i-                                       _           -> blit+  Unsigned _  -> "unsigned'" <> parens blit+  Signed   _  -> "signed'" <> parens blit+  BitVector _ -> "std_logic_vector'" <> parens blit+  Integer ->+    let integerLow  = -2^(31 :: Integer) :: Integer+        integerHigh = 2^(31 :: Integer) - 1 :: Integer+        i' = if i < integerLow+                then integerLow+                else if i > integerHigh+                     then integerHigh+                     else i+    in  parenIf (i' < 0) (integer i')+  _           -> blit    where     blit = bits (toBits sz i)