clash-vhdl 0.5.5 → 0.5.6

raw patch · 3 files changed

+6/−2 lines, 3 filesPVP ok

version bump matches the API change (PVP)

API changes (from Hackage documentation)

Files

CHANGELOG.md +4/−0
clash-vhdl.cabal +1/−1
src/CLaSH/Backend/VHDL.hs +1/−1

CHANGELOG.md view

@@ -1,5 +1,9 @@ # Changelog for the [`clash-vhdl`](http://hackage.haskell.org/package/clash-vhdl) package +## 0.5.6 *June 5th 2015*+* Fixes bugs:+  * Incorrect extraction of `Bool` value out of a Sum-of-Product type+ ## 0.5.5 *June 3rd 2015* * New features:   * Compile against `clash-lib-0.5.6`

clash-vhdl.cabal view

@@ -1,5 +1,5 @@ Name:                 clash-vhdl-Version:              0.5.5+Version:              0.5.6 Synopsis:             CAES Language for Synchronous Hardware - VHDL backend Description:   CλaSH (pronounced ‘clash’) is a functional hardware description language that

src/CLaSH/Backend/VHDL.hs view

@@ -616,7 +616,7 @@ toSLV hty      e = error $ $(curLoc) ++  "toSLV: ty:" ++ show hty ++ "\n expr: " ++ show e  fromSLV :: HWType -> Identifier -> Int -> Int -> VHDLM Doc-fromSLV Bool              id_ start _   = "fromSLV" <> parens (text id_ <> parens (int start))+fromSLV Bool              id_ start _   = "fromSLV" <> parens (text id_ <> parens (int start <+> "downto" <+> int start)) fromSLV Integer           id_ start end = "to_integer" <> parens (fromSLV (Signed 32) id_ start end) fromSLV (BitVector _)     id_ start end = text id_ <> parens (int start <+> "downto" <+> int end) fromSLV (Index _)         id_ start end = "unsigned" <> parens (text id_ <> parens (int start <+> "downto" <+> int end))