diff --git a/CHANGELOG.md b/CHANGELOG.md --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,5 +1,15 @@ # Changelog for the Clash project +## 1.4.2 *May 18th 2021* +Fixed: + + * Erroneous examples in `Clash.Annotation.TopEntity` documentation [#646](https://github.com/clash-lang/clash-compiler/issues/646) and [#654](https://github.com/clash-lang/clash-compiler/issues/654) + * `unconcat` cannot be used as initial/reset value for a `register` [#1756](https://github.com/clash-lang/clash-compiler/issues/1756) + * `showX` now doesn't crash if a spine of a `Vec` is undefined + * `~ISACTIVEENABLE` in blackboxes works again, and now acts on `Signal dom Bool` in addition to `Enable dom`. Since [#1368](https://github.com/clash-lang/clash-compiler/pull/1368), enable lines were always generated even if they were known to be always enabled. Fixes [#1786](https://github.com/clash-lang/clash-compiler/issues/1786). + * clash --show-options now shows -fclash-* options in GHC 9.0 [#1787](https://github.com/clash-lang/clash-compiler/issues/1787) + * `makeRecursiveGroups` now correctly identifies mutual recursion between global binders ([#1796](https://github.com/clash-lang/clash-compiler/issues/1796)). + ## 1.4.1 *April 6th 2021* Fixed: diff --git a/clash-prelude.cabal b/clash-prelude.cabal --- a/clash-prelude.cabal +++ b/clash-prelude.cabal @@ -1,6 +1,6 @@ Cabal-version: 2.2 Name: clash-prelude -Version: 1.4.1 +Version: 1.4.2 Synopsis: Clash: a functional hardware description language - Prelude library Description: Clash is a functional hardware description language that borrows both its @@ -70,10 +70,6 @@ Generate instances for classes such as `NFDataX` and `BitPack` for tuples up to and including 62 elements - the GHC imposed maximum. This greatly increases compile times for `clash-prelude`. - -- I have no idea to pass cabal flags to nix, so the comment below, - -- "-- large-tuples", is there to enable a call to 'sed' that replaces - -- True with False. This is done to prevent OOM on CircleCI. - -- large-tuples default: False manual: True @@ -418,6 +414,7 @@ Clash.Tests.SizedNum Clash.Tests.TopEntityGeneration Clash.Tests.Unsigned + Clash.Tests.Vector Clash.Tests.Laws.Enum Clash.Tests.Laws.SaturatingNum diff --git a/src/Clash/Annotations/Primitive.hs b/src/Clash/Annotations/Primitive.hs --- a/src/Clash/Annotations/Primitive.hs +++ b/src/Clash/Annotations/Primitive.hs @@ -241,6 +241,7 @@ -- nicer multiline strings. -- -- @ +-- {\-\# LANGUAGE QuasiQuotes \#-\} -- module InlinePrimitive where -- -- import Clash.Annotations.Primitive diff --git a/src/Clash/Annotations/TopEntity.hs b/src/Clash/Annotations/TopEntity.hs --- a/src/Clash/Annotations/TopEntity.hs +++ b/src/Clash/Annotations/TopEntity.hs @@ -61,21 +61,54 @@ import Clash.Prelude import Clash.Intel.ClockGen -type Dom50 = Dom \"System\" 20000 +'Clash.Explicit.Signal.createDomain' vSystem{vName=\"DomInput\", vPeriod=20000} +'Clash.Explicit.Signal.createDomain' vSystem{vName=\"Dom50\", vPeriod=50000} topEntity - :: Clock Dom50 - -> Reset Dom50 + :: Clock DomInput + -> Reset DomInput + -> Enable Dom50 -> Signal Dom50 Bit -> Signal Dom50 (BitVector 8) -topEntity clk rst key1 = - let (pllOut,pllStable) = 'Clash.Intel.ClockGen.altpll' (SSymbol @ "altpll50") clk rst - rstSync = 'Clash.Signal.resetSynchronizer' pllOut ('Clash.Signal.unsafeToAsyncReset' pllStable) - in 'Clash.Signal.exposeClockResetEnable' leds pllOut rstSync - where - key1R = 'Clash.Prelude.isRising' 1 key1 - leds = 'Clash.Prelude.mealy' blinkerT (1,False,0) key1R +topEntity clk20 rstBtn enaBtn modeBtn = + 'Clash.Signal.exposeClockResetEnable' + ('Clash.Prelude.mealy' blinkerT initialStateBlinkerT . 'Clash.Prelude.isRising' 1) + clk50 + rstSync + enaBtn + modeBtn + where + -- Start with the first LED turned on, in rotate mode, with the counter on zero + initialStateBlinkerT = (1, False, 0) + -- Signal coming from the reset button is low when pressed, and high when + -- not pressed. We convert this signal to the polarity of our domain with + -- /unsafeFromLowPolarity/. + rst = 'Clash.Signal.unsafeFromLowPolarity' ('Clash.Signal.unsafeFromReset' rstBtn) + + -- Instantiate a PLL: this stabilizes the incoming clock signal and indicates + -- when the signal is stable. We're also using it to transform an incoming + -- clock signal running at 20 MHz to a clock signal running at 50 MHz. + (clk50, pllStable) = + 'Clash.Intel.ClockGen.altpll' + \@Dom50 + (SSymbol @"altpll50") + clk20 + rst + + -- Synchronize reset to clock signal coming from PLL. We want the reset to + -- remain active while the PLL is NOT stable, hence the conversion with + -- /unsafeFromLowPolarity/ + rstSync = + 'Clash.Prelude.resetSynchronizer' + clk50 + ('Clash.Signal.unsafeFromLowPolarity' pllStable) + enableGen + +blinkerT + :: (BitVector 8, Bool, Index 16650001) + -> Bool + -> ((BitVector 8, Bool, Index 16650001), BitVector 8) blinkerT (leds,mode,cntr) key1R = ((leds',mode',cntr'),leds) where -- clock frequency = 50e6 (50 MHz) @@ -94,7 +127,7 @@ @ The Clash compiler would normally generate the following -@blinker_topentity.vhdl@ file: +@topEntity.vhdl@ file: @ -- Automatically generated VHDL-93 @@ -104,25 +137,21 @@ use IEEE.MATH_REAL.ALL; use std.textio.all; use work.all; -use work.blinker_types.all; +use work.Blinker_topEntity_types.all; -entity blinker_topentity is +entity topEntity is port(-- clock - input_0 : in std_logic; - -- asynchronous reset: active high - input_1 : in std_logic; - input_2 : in std_logic_vector(0 downto 0); - output_0 : out std_logic_vector(7 downto 0)); + clk20 : in Blinker_topEntity_types.clk_DomInput; + -- reset + rstBtn : in Blinker_topEntity_types.rst_DomInput; + -- enable + enaBtn : in Blinker_topEntity_types.en_Dom50; + modeBtn : in std_logic; + result : out std_logic_vector(7 downto 0)); end; -architecture structural of blinker_topentity is -begin - blinker_topentity_0_inst : entity blinker_topentity_0 - port map - (clk => input_0 - ,rst => input_1 - ,key1 => input_2 - ,result => output_0); +architecture structural of topEntity is + ... end; @ @@ -134,7 +163,8 @@ { t_name = "blinker" , t_inputs = [ PortName \"CLOCK_50\" , PortName \"KEY0\" - , PortName \"KEY1\" ] + , PortName \"KEY1\" + , PortName \"KEY2\" ] , t_output = PortName \"LED\" }) \#-\} @ @@ -153,28 +183,24 @@ entity blinker is port(-- clock - CLOCK_50 : in std_logic; - -- asynchronous reset: active high - KEY0 : in std_logic; - KEY1 : in std_logic_vector(0 downto 0); + CLOCK_50 : in blinker_types.clk_DomInput; + -- reset + KEY0 : in blinker_types.rst_DomInput; + -- enable + KEY1 : in blinker_types.en_Dom50; + KEY2 : in std_logic; LED : out std_logic_vector(7 downto 0)); end; architecture structural of blinker is -begin - blinker_topentity_inst : entity blinker_topentity - port map - (clk => CLOCK_50 - ,rst => KEY0 - ,key1 => KEY1 - ,result => LED); + ... end; @ Where we now have: * A top-level component that is called @blinker@. -* Inputs and outputs that have a /user/-chosen name: @CLOCK_50@, @KEY0@, @KEY1@, @LED@, etc. +* Inputs and outputs that have a /user/-chosen name: @CLOCK_50@, @KEY0@, @KEY1@, @KEY2@, @LED@, etc. See the documentation of 'Synthesize' for the meaning of all its fields. @@ -275,7 +301,7 @@ -- @ -- data T = MkT Int Bool -- --- {\-\# ANN topEntity (defSyn "f") \#-\} +-- {\-\# ANN f (defSyn "f") \#-\} -- f :: Int -> T -> (T,Bool) -- f a b = ... -- @ @@ -284,19 +310,17 @@ -- -- @ -- entity f is --- port(input_0 : in signed(63 downto 0); --- input_1_0 : in signed(63 downto 0); --- input_1_1 : in boolean; --- output_0_0_0 : out signed(63 downto 0); --- output_0_0_1 : out boolean; --- output_0_1 : out boolean); +-- port(a : in signed(63 downto 0); +-- b_0 : in signed(63 downto 0); +-- b_1 : in boolean; +-- result : out std_logic_vector(65 downto 0)); -- end; -- @ -- -- However, we can change this by using 'PortName's. So by: -- -- @ --- {\-\# ANN topEntity +-- {\-\# ANN f -- (Synthesize -- { t_name = "f" -- , t_inputs = [ PortName \"a\" @@ -311,15 +335,15 @@ -- @ -- entity f is -- port(a : in signed(63 downto 0); --- b : in f_types.t; --- res : out f_types.tup2); +-- b : in std_logic_vector(64 downto 0); +-- res : out std_logic_vector(65 downto 0)); -- end; -- @ -- -- If we want to name fields for tuples/records we have to use 'PortProduct' -- -- @ --- {\-\# ANN topEntity +-- {\-\# ANN f -- (Synthesize -- { t_name = "f" -- , t_inputs = [ PortName \"a\" @@ -336,7 +360,7 @@ -- port(a : in signed(63 downto 0); -- b : in signed(63 downto 0); -- c : in boolean; --- q : out f_types.t; +-- res_q : out std_logic_vector(64 downto 0); -- res_1 : out boolean); -- end; -- @ @@ -347,7 +371,7 @@ = PortName String -- ^ You want a port, with the given name, for the entire argument\/type -- - -- You can use an empty String ,\"\" , in case you want an auto-generated name. + -- You can use an empty String ,@""@ , in case you want an auto-generated name. | PortProduct String [PortName] -- ^ You want to assign ports to fields of a product argument\/type -- @@ -357,7 +381,7 @@ -- -- 2. The prefix for any unnamed ports below the 'PortProduct' -- - -- You can use an empty String ,\"\" , in case you want an auto-generated name. + -- You can use an empty String ,@""@ , in case you want an auto-generated name. deriving (Eq,Data,Show,Generic,Lift) -- | Default 'Synthesize' annotation which has no specified names for the input diff --git a/src/Clash/CPP.hs b/src/Clash/CPP.hs --- a/src/Clash/CPP.hs +++ b/src/Clash/CPP.hs @@ -27,7 +27,11 @@ #define MAX_TUPLE_SIZE (fromIntegral mAX_TUPLE_SIZE) #else +#ifdef HADDOCK_ONLY +#define MAX_TUPLE_SIZE 3 +#else #define MAX_TUPLE_SIZE 12 +#endif #endif #endif diff --git a/src/Clash/Class/AutoReg/Instances.hs b/src/Clash/Class/AutoReg/Instances.hs --- a/src/Clash/Class/AutoReg/Instances.hs +++ b/src/Clash/Class/AutoReg/Instances.hs @@ -7,6 +7,7 @@ {-# LANGUAGE TemplateHaskell #-} {-# OPTIONS_GHC -Wno-orphans #-} +-- {-# OPTIONS_GHC -ddump-splices #-} module Clash.Class.AutoReg.Instances where @@ -27,4 +28,8 @@ deriveAutoReg ''Ratio +-- | __N.B.__: The documentation only shows instances up to /3/-tuples. By +-- default, instances up to and including /12/-tuples will exist. If the flag +-- @large-tuples@ is set instances up to the GHC imposed limit will exist. The +-- GHC imposed limit is either 62 or 64 depending on the GHC version. deriveAutoRegTuples [2..maxTupleSize] diff --git a/src/Clash/Class/BitPack.hs b/src/Clash/Class/BitPack.hs --- a/src/Clash/Class/BitPack.hs +++ b/src/Clash/Class/BitPack.hs @@ -273,6 +273,10 @@ pack _ = minBound unpack _ = () +-- | __N.B.__: The documentation only shows instances up to /3/-tuples. By +-- default, instances up to and including /12/-tuples will exist. If the flag +-- @large-tuples@ is set instances up to the GHC imposed limit will exist. The +-- GHC imposed limit is either 62 or 64 depending on the GHC version. instance (BitPack a, BitPack b) => BitPack (a,b) where type BitSize (a,b) = BitSize a + BitSize b diff --git a/src/Clash/Explicit/Signal/Delayed.hs b/src/Clash/Explicit/Signal/Delayed.hs --- a/src/Clash/Explicit/Signal/Delayed.hs +++ b/src/Clash/Explicit/Signal/Delayed.hs @@ -182,7 +182,7 @@ -- delayN2 = 'delayN' d2 -- @ -- --- >>> printX $ sampleN 6 (toSignal (delayN2 (-1) enableGen systemClockGen (dfromList [1..]))) +-- >>> printX $ sampleN 6 (delayN2 (-1) enableGen systemClockGen (dfromList [1..])) -- [-1,-1,1,2,3,4] delayN :: forall dom a d n @@ -214,12 +214,12 @@ -- delayI2 = 'delayI' -- @ -- --- >>> sampleN 6 (toSignal (delayI2 (-1) enableGen systemClockGen (dfromList [1..]))) +-- >>> sampleN 6 (delayI2 (-1) enableGen systemClockGen (dfromList [1..])) -- [-1,-1,1,2,3,4] -- -- You can also use type application to do the same: -- --- >>> sampleN 6 (toSignal (delayI @2 (-1) enableGen systemClockGen (dfromList [1..]))) +-- >>> sampleN 6 (delayI @2 (-1) enableGen systemClockGen (dfromList [1..])) -- [-1,-1,1,2,3,4] delayI :: forall d n a dom @@ -246,10 +246,10 @@ -- countingSignals = repeat (dfromList [0..]) -- @ -- --- >>> printX $ sampleN 6 (toSignal (delayedFold d1 (-1) (+) enableGen systemClockGen countingSignals)) +-- >>> printX $ sampleN 6 (delayedFold d1 (-1) (+) enableGen systemClockGen countingSignals) -- [-1,-2,0,4,8,12] -- --- >>> printX $ sampleN 8 (toSignal (delayedFold d2 (-1) (*) enableGen systemClockGen countingSignals)) +-- >>> printX $ sampleN 8 (delayedFold d2 (-1) (*) enableGen systemClockGen countingSignals) -- [-1,-1,1,1,0,1,16,81] delayedFold :: forall dom n delay k a diff --git a/src/Clash/Signal/Bundle.hs b/src/Clash/Signal/Bundle.hs --- a/src/Clash/Signal/Bundle.hs +++ b/src/Clash/Signal/Bundle.hs @@ -146,6 +146,10 @@ instance Bundle (Signed n) instance Bundle (Unsigned n) +-- | __N.B.__: The documentation only shows instances up to /3/-tuples. By +-- default, instances up to and including /12/-tuples will exist. If the flag +-- @large-tuples@ is set instances up to the GHC imposed limit will exist. The +-- GHC imposed limit is either 62 or 64 depending on the GHC version. deriveBundleTuples ''Bundle ''Unbundled 'bundle 'unbundle instance KnownNat n => Bundle (Vec n a) where diff --git a/src/Clash/Signal/Delayed.hs b/src/Clash/Signal/Delayed.hs --- a/src/Clash/Signal/Delayed.hs +++ b/src/Clash/Signal/Delayed.hs @@ -64,7 +64,7 @@ >>> let delay3 = delayed (-1 :> -1 :> -1 :> Nil) >>> let delay2 = delayedI :: HiddenClockResetEnable dom => Int -> DSignal dom n Int -> DSignal dom (n + 2) Int >>> let delayN2 = delayN d2 ->>> let delayI2 = delayI :: HiddenClockResetEnable dom => Int -> DSignal dom n Int -> DSignal dom (n + 2) Int +>>> let delayI2 = delayI :: (HiddenClock dom, HiddenEnable dom) => Int -> DSignal dom n Int -> DSignal dom (n + 2) Int >>> let countingSignals = Clash.Prelude.repeat (dfromList [0..]) :: Vec 4 (DSignal dom 0 Int) -} diff --git a/src/Clash/Signal/Delayed/Internal.hs b/src/Clash/Signal/Delayed/Internal.hs --- a/src/Clash/Signal/Delayed/Internal.hs +++ b/src/Clash/Signal/Delayed/Internal.hs @@ -54,18 +54,24 @@ >>> :m -Clash.Signal >>> import Clash.Explicit.Prelude >>> :{ -let mac :: Clock System - -> Reset System - -> Enable System - -> DSignal System 0 Int -> DSignal System 0 Int - -> DSignal System 0 Int +let mac + :: forall dom + . KnownDomain dom + => Clock dom + -> Reset dom + -> Enable dom + -> DSignal dom 0 Int + -> DSignal dom 0 Int + -> DSignal dom 0 Int mac clk rst en x y = feedback (mac' x y) where - mac' :: DSignal System 0 Int -> DSignal System 0 Int - -> DSignal System 0 Int - -> (DSignal System 0 Int, DSignal System 1 Int) + mac' + :: DSignal dom 0 Int + -> DSignal dom 0 Int + -> DSignal dom 0 Int + -> (DSignal dom 0 Int, DSignal dom 1 Int) mac' a b acc = let acc' = a * b + acc - in (acc, delayed clk rst en (singleton 0) acc') + in (acc, delayedI clk rst en 0 acc') :} -} @@ -94,7 +100,7 @@ -- Every element in the list will correspond to a value of the signal for one -- clock cycle. -- --- >>> sampleN 2 (dfromList [1,2,3,4,5]) +-- >>> sampleN 2 (toSignal (dfromList [1,2,3,4,5])) -- [1,2] -- -- __NB__: This function is not synthesizable @@ -106,7 +112,7 @@ -- Every element in the list will correspond to a value of the signal for one -- clock cycle. -- --- >>> sampleN 2 (dfromList [1,2,3,4,5]) +-- >>> sampleN 2 (toSignal (dfromList [1,2,3,4,5])) -- [1,2] -- -- __NB__: This function is not synthesizable @@ -116,17 +122,27 @@ -- | Feed the delayed result of a function back to its input: -- -- @ --- mac :: Clock dom -> Reset dom -> Enable dom --- -> 'DSignal' dom 0 Int -> 'DSignal' dom 0 Int -> 'DSignal' dom 0 Int +-- mac +-- :: forall dom +-- . KnownDomain dom +-- => Clock dom +-- -> Reset dom +-- -> Enable dom +-- -> 'DSignal' dom 0 Int +-- -> 'DSignal' dom 0 Int +-- -> 'DSignal' dom 0 Int -- mac clk rst en x y = 'feedback' (mac' x y) -- where --- mac' :: 'DSignal' dom 0 Int -> 'DSignal' dom 0 Int -> 'DSignal' dom 0 Int --- -> ('DSignal' dom 0 Int, 'DSignal' dom 1 Int) +-- mac' +-- :: 'DSignal' dom 0 Int +-- -> 'DSignal' dom 0 Int +-- -> 'DSignal' dom 0 Int +-- -> ('DSignal' dom 0 Int, 'DSignal' dom 1 Int) -- mac' a b acc = let acc' = a * b + acc -- in (acc, 'Clash.Explicit.Signal.Delayed.delayedI' clk rst en 0 acc') -- @ -- --- >>> sampleN 7 (mac systemClockGen systemResetGen enableGen (dfromList [0..]) (dfromList [0..])) +-- >>> sampleN 7 (toSignal (mac systemClockGen systemResetGen enableGen (dfromList [0..]) (dfromList [0..]))) -- [0,0,1,5,14,30,55] feedback :: (DSignal dom n a -> (DSignal dom n a,DSignal dom (n + m + 1) a)) @@ -134,8 +150,6 @@ feedback f = let (o,r) = f (coerce r) in o -- | 'Signal's are not delayed --- --- > sample s == dsample (fromSignal s) fromSignal :: Signal dom a -> DSignal dom 0 a fromSignal = coerce @@ -153,8 +167,14 @@ -- Access a /delayed/ signal in the present. -- -- @ --- mac :: Clock dom -> Reset dom -> Enable dom --- -> 'DSignal' dom 0 Int -> 'DSignal' dom 0 Int -> 'DSignal' dom 0 Int +-- mac +-- :: KnownDomain dom +-- => Clock dom +-- -> Reset dom +-- -> Enable dom +-- -> 'DSignal' dom 0 Int +-- -> 'DSignal' dom 0 Int +-- -> 'DSignal' dom 0 Int -- mac clk rst en x y = acc' -- where -- acc' = (x * y) + 'antiDelay' d1 acc diff --git a/src/Clash/Sized/Vector.hs b/src/Clash/Sized/Vector.hs --- a/src/Clash/Sized/Vector.hs +++ b/src/Clash/Sized/Vector.hs @@ -144,7 +144,7 @@ import Clash.Class.BitPack (packXWith, BitPack (..)) import Clash.XException - (ShowX (..), NFDataX (..), showsX, showsPrecXWith, seqX, isX) + (ShowX (..), NFDataX (..), showsX, seqX, isX) {- $setup >>> :set -XDataKinds @@ -313,14 +313,13 @@ punc (x `Cons` xs) = \s -> shows x (',':punc xs s) instance ShowX a => ShowX (Vec n a) where - showsPrecX = showsPrecXWith go - where - go _ vs = \s -> '<': punc vs ('>':s) - where - punc :: Vec m a -> ShowS - punc Nil = id - punc (x `Cons` Nil) = showsX x - punc (x `Cons` xs) = \s -> showsX x (',':punc xs s) + showsPrecX _n vs = showString "<" . punc vs + where + punc :: Vec m a -> ShowS + punc (isX -> Left _) = showString "X" + punc Nil = showString ">" + punc (Cons x (isX -> Right Nil)) = showsX x . ('>':) + punc (Cons x xs) = showsX x . showString "," . punc xs instance (KnownNat n, Eq a) => Eq (Vec n a) where (==) Nil _ = True diff --git a/src/Clash/XException.hs b/src/Clash/XException.hs --- a/src/Clash/XException.hs +++ b/src/Clash/XException.hs @@ -659,7 +659,16 @@ instance NFDataX a => NFDataX (SG.Option a) #endif +-- | __N.B.__: The documentation only shows instances up to /3/-tuples. By +-- default, instances up to and including /12/-tuples will exist. If the flag +-- @large-tuples@ is set instances up to the GHC imposed limit will exist. The +-- GHC imposed limit is either 62 or 64 depending on the GHC version. mkShowXTupleInstances [2..maxTupleSize] + +-- | __N.B.__: The documentation only shows instances up to /3/-tuples. By +-- default, instances up to and including /12/-tuples will exist. If the flag +-- @large-tuples@ is set instances up to the GHC imposed limit will exist. The +-- GHC imposed limit is either 62 or 64 depending on the GHC version. mkNFDataXTupleInstances [2..maxTupleSize] -- | Call to 'errorX' with default string diff --git a/tests/Clash/Tests/Vector.hs b/tests/Clash/Tests/Vector.hs new file mode 100644 --- /dev/null +++ b/tests/Clash/Tests/Vector.hs @@ -0,0 +1,33 @@ +{-# LANGUAGE TemplateHaskell #-} + +module Clash.Tests.Vector where + +import Clash.Sized.Vector (Vec((:>), Nil)) +import Clash.XException + +import Test.Tasty +import Test.Tasty.HUnit +import Test.Tasty.TH + +i :: Int -> Int +i = id + +case_showXVector :: Assertion +case_showXVector = "<1,2,X" @=? showX (1 :> i 2 :> errorX "def") + +case_showX2DVector :: Assertion +case_showX2DVector = "<<1,X,<3,5>>" @=? showX ((1 :> errorX "def") :> (3 :> i 5 :> Nil) :> Nil) + +tests :: TestTree +tests = testGroup "All" + [ $(testGroupGenerator) + ] + +-- Run with: +-- +-- ./repld p:tests -T Clash.Tests.Vector.main +-- +-- Add -W if you want to run tests in spite of warnings +-- +main :: IO () +main = defaultMain tests diff --git a/tests/unittests.hs b/tests/unittests.hs --- a/tests/unittests.hs +++ b/tests/unittests.hs @@ -15,6 +15,7 @@ import qualified Clash.Tests.Signed import qualified Clash.Tests.TopEntityGeneration import qualified Clash.Tests.Unsigned +import qualified Clash.Tests.Vector import qualified Clash.Tests.Laws.Enum import qualified Clash.Tests.Laws.SaturatingNum @@ -34,6 +35,7 @@ , Clash.Tests.Signed.tests , Clash.Tests.TopEntityGeneration.tests , Clash.Tests.Unsigned.tests + , Clash.Tests.Vector.tests , testGroup "Laws" [ Clash.Tests.Laws.Enum.tests , Clash.Tests.Laws.SaturatingNum.tests