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clash-prelude 1.4.0 → 1.4.1

raw patch · 13 files changed

+99/−60 lines, 13 filesdep +ghcdep ~singletonsPVP: major bump suggested

API removals or changes: PVP suggests a major version bump

Dependencies added: ghc

Dependency ranges changed: singletons

API changes (from Hackage documentation)

- Clash.Prelude: romFile :: (KnownNat m, KnownNat n, HiddenClock dom, HiddenEnable dom) => SNat n -> FilePath -> Signal dom (Unsigned n) -> Signal dom (BitVector m)
+ Clash.Prelude: romFile :: (KnownNat m, KnownNat n, HiddenClock dom, HiddenEnable dom, Enum addr) => SNat n -> FilePath -> Signal dom addr -> Signal dom (BitVector m)
- Clash.Prelude.ROM.File: romFile :: (KnownNat m, KnownNat n, HiddenClock dom, HiddenEnable dom) => SNat n -> FilePath -> Signal dom (Unsigned n) -> Signal dom (BitVector m)
+ Clash.Prelude.ROM.File: romFile :: (KnownNat m, KnownNat n, HiddenClock dom, HiddenEnable dom, Enum addr) => SNat n -> FilePath -> Signal dom addr -> Signal dom (BitVector m)
- Clash.Signal.Delayed: delayI :: forall d n a dom. (HiddenClockResetEnable dom, NFDataX a, KnownNat d) => a -> DSignal dom n a -> DSignal dom (n + d) a
+ Clash.Signal.Delayed: delayI :: forall d n a dom. (HiddenClock dom, HiddenEnable dom, NFDataX a, KnownNat d) => a -> DSignal dom n a -> DSignal dom (n + d) a

Files

CHANGELOG.md view
@@ -1,5 +1,21 @@ # Changelog for the Clash project-## 1.4.0 *March 12th 2020*++## 1.4.1 *April 6th 2021*+Fixed:++ * Broken VHDL primitive template for setSlice# [#1715](https://github.com/clash-lang/clash-compiler/issues/1715)+ * Unable to reduce nested type families [#1721](https://github.com/clash-lang/clash-compiler/issues/1721)+ * DEC transformation fails for functions applied to more than 62 arguments [#1669](https://github.com/clash-lang/clash-compiler/issues/1669)+ * Erroneous examples in BlockRam.File and ROM.File documentation [#1608](https://github.com/clash-lang/clash-compiler/issues/1608)+ * Blackboxes of `Clash.Sized.Vector` functions error on vectors containing `Clocks`, `Reset`, or `Enable` [#1606](https://github.com/clash-lang/clash-compiler/issues/1606)+ * `Clash.Signal.Delayed.delayI` cannot be reset, the `HiddenReset` constraint was unintentional. Asserting its reset has never worked. Removed the constraint [#1739](https://github.com/clash-lang/clash-compiler/pull/1739).+ * Annotate attributes cannot use type families [#1742](https://github.com/clash-lang/clash-compiler/issues/1742)++Changed:++ * `Clash.Prelude.ROM.File.romFile` now takes an `Enum addr => addr` as address argument, making it actually useful. [#407](https://github.com/clash-lang/clash-compiler/issues/407)++## 1.4.0 *March 12th 2021* Highlighted changes (repeated in other categories):    * Clash no longer disables the monomorphism restriction. See [#1270](https://github.com/clash-lang/clash-compiler/issues/1270), and mentioned issues, as to why. This can cause, among other things, certain eta-reduced descriptions of sequential circuits to no longer type-check. See [#1349](https://github.com/clash-lang/clash-compiler/pull/1349) for code hints on what kind of changes to make to your own code in case it no longer type-checks due to this change.
clash-prelude.cabal view
@@ -1,6 +1,6 @@ Cabal-version:        2.2 Name:                 clash-prelude-Version:              1.4.0+Version:              1.4.1 Synopsis:             Clash: a functional hardware description language - Prelude library Description:   Clash is a functional hardware description language that borrows both its@@ -333,7 +333,7 @@                       recursion-schemes         >= 5.1     && < 5.3,                       QuickCheck                >= 2.7     && < 2.15,                       reflection                >= 2       && < 2.2,-                      singletons                >= 1.0     && < 3.0,+                      singletons                >= 2.0     && < 3.1,                       template-haskell          >= 2.12.0.0 && < 2.18,                       th-abstraction            >= 0.2.10 && < 0.5.0,                       th-lift                   >= 0.7.0    && < 0.9,@@ -350,6 +350,8 @@     Build-Depends:    ghc-bignum                >= 1.0      && < 1.1   else     Build-Depends:    integer-gmp               >= 1.0.1.0  && < 2.0+  if flag(large-tuples)+    Build-Depends:    ghc  test-suite doctests   type:             exitcode-stdio-1.0
src/Clash/CPP.hs view
@@ -8,14 +8,6 @@  {-# OPTIONS_HADDOCK hide #-} -#ifndef MAX_TUPLE_SIZE-#ifdef LARGE_TUPLES-#define MAX_TUPLE_SIZE 62-#else-#define MAX_TUPLE_SIZE 12-#endif-#endif- module Clash.CPP  ( maxTupleSize @@ -23,6 +15,21 @@  , fSuperStrict  , fStrictMapSignal  ) where++#ifndef MAX_TUPLE_SIZE+#ifdef LARGE_TUPLES++#if MIN_VERSION_ghc(9,0,0)+import GHC.Settings.Constants (mAX_TUPLE_SIZE)+#else+import Constants (mAX_TUPLE_SIZE)+#endif+#define MAX_TUPLE_SIZE (fromIntegral mAX_TUPLE_SIZE)++#else+#define MAX_TUPLE_SIZE 12+#endif+#endif  maxTupleSize :: Num a => a maxTupleSize = MAX_TUPLE_SIZE
src/Clash/Class/AutoReg/Internal.hs view
@@ -49,17 +49,8 @@ import           Language.Haskell.TH.Ppr  import           Control.Lens.Internal.TH     (conAppsT)--#if MIN_VERSION_base(4,15,0)--- | Return 'Name' contained in a 'TyVarBndr'.-bndrName :: TyVarBndr a -> Name-bndrName (PlainTV  n _) = n-bndrName (KindedTV n _ _) = n-#else--- | Return 'Name' contained in a 'TyVarBndr'.-bndrName :: TyVarBndr -> Name-bndrName (PlainTV  n) = n-bndrName (KindedTV n _) = n+#if !(MIN_VERSION_th_abstraction(0,4,0))+import           Control.Lens.Internal.TH     (bndrName) #endif  -- $setup@@ -272,7 +263,9 @@   tyNm = datatypeName tyInfo   tyVarBndrs = datatypeVars tyInfo -#if MIN_VERSION_th_abstraction(0,3,0)+#if MIN_VERSION_th_abstraction(0,4,0)+  toTyVar = VarT . tvName+#elif MIN_VERSION_th_abstraction(0,3,0)   toTyVar = VarT . bndrName #else   toTyVar t = case t of
src/Clash/Explicit/BlockRam/File.hs view
@@ -34,11 +34,11 @@ We can instantiate a BlockRAM using the content of the above file like so:  @-f-  :: Clock  dom+f :: Clock  dom+  -> Enable dom   -> Signal dom (Unsigned 3)   -> Signal dom (Unsigned 9)-f clk rd = 'Clash.Class.BitPack.unpack' '<$>' 'blockRamFile' clk d7 \"memory.bin\" rd (signal Nothing)+f clk ena rd = 'Clash.Class.BitPack.unpack' '<$>' 'blockRamFile' clk ena d7 \"memory.bin\" rd (signal Nothing) @  In the example above, we basically treat the BlockRAM as an synchronous ROM.@@ -46,7 +46,7 @@  @ __>>> import qualified Data.List as L__-__>>> L.tail $ sampleN 4 $ f systemClockGen (fromList [3..5])__+__>>> L.tail $ sampleN 4 $ f systemClockGen enableGen (fromList [3..5])__ [10,11,12] @ @@ -54,18 +54,18 @@ number, and a 3-bit signed number:  @-g-  :: Clock  dom+g :: Clock  dom+  -> Enable dom   -> Signal dom (Unsigned 3)   -> Signal dom (Unsigned 6,Signed 3)-g clk rd = 'Clash.Class.BitPack.unpack' '<$>' 'blockRamFile' clk d7 \"memory.bin\" rd (signal Nothing)+g clk ena rd = 'Clash.Class.BitPack.unpack' '<$>' 'blockRamFile' clk ena d7 \"memory.bin\" rd (signal Nothing) @  And then we would see:  @ __>>> import qualified Data.List as L__-__>>> L.tail $ sampleN 4 $ g systemClockGen (fromList [3..5])__+__>>> L.tail $ sampleN 4 $ g systemClockGen enableGen (fromList [3..5])__ [(1,2),(1,3)(1,-4)] @
src/Clash/Explicit/ROM/File.hs view
@@ -34,11 +34,11 @@ so:  @-f-  :: Clock  dom+f :: Clock  dom+  -> Enable dom   -> Signal dom (Unsigned 3)   -> Signal dom (Unsigned 9)-f clk rd = 'Clash.Class.BitPack.unpack' '<$>' 'romFile' clk d7 \"memory.bin\" rd+f clk ena rd = 'Clash.Class.BitPack.unpack' '<$>' 'romFile' clk ena d7 \"memory.bin\" rd @  And see that it works as expected:@@ -53,11 +53,11 @@ number, and a 3-bit signed number:  @-g-  :: Clock  dom Regular+g :: Clock  dom+  -> Enable dom   -> Signal dom (Unsigned 3)   -> Signal dom (Unsigned 6,Signed 3)-g clk rd = 'Clash.Class.BitPack.unpack' '<$>' 'romFile' clk d7 \"memory.bin\" rd+g clk ena rd = 'Clash.Class.BitPack.unpack' '<$>' 'romFile' clk ena d7 \"memory.bin\" rd @  And then we would see:
src/Clash/Explicit/Signal/Delayed.hs view
@@ -49,7 +49,7 @@ import Data.Coerce                (coerce) import Data.Kind                  (Type) import Data.Proxy                 (Proxy (..))-import Data.Singletons.Prelude    (Apply, TyFun, type (@@))+import Data.Singletons            (Apply, TyFun, type (@@)) import GHC.TypeLits               (KnownNat, Nat, type (+), type (^), type (*))  import Clash.Sized.Vector
src/Clash/Prelude/BlockRam/File.hs view
@@ -34,8 +34,10 @@ We can instantiate a BlockRAM using the content of the above file like so:  @-f :: HiddenClock dom  -> Signal dom (Unsigned 3) -> Signal dom (Unsigned 9)-f rd = 'Clash.Class.BitPack.unpack' '<$>' exposeClock 'blockRamFile' clk d7 \"memory.bin\" rd (pure Nothing)+f :: (HiddenClock dom, HiddenEnable dom)+  => Signal dom (Unsigned 3)+  -> Signal dom (Unsigned 9)+f rd = 'Clash.Class.BitPack.unpack' '<$>' 'blockRamFile' d7 \"memory.bin\" rd (pure Nothing) @  In the example above, we basically treat the BlockRAM as an synchronous ROM.@@ -51,8 +53,10 @@ number, and a 3-bit signed number:  @-g :: HiddenClock dom  -> Signal dom (Unsigned 3) -> Signal dom (Unsigned 6,Signed 3)-g clk rd = 'Clash.Class.BitPack.unpack' '<$>' exposeClock 'blockRamFile' clk d7 \"memory.bin\" rd (pure Nothing)+g :: (HiddenClock dom, HiddenEnable dom)+   => Signal dom (Unsigned 3)+   -> Signal dom (Unsigned 6,Signed 3)+g clk rd = 'Clash.Class.BitPack.unpack' '<$>' 'blockRamFile' d7 \"memory.bin\" rd (pure Nothing) @  And then we would see:
src/Clash/Prelude/ROM/File.hs view
@@ -34,7 +34,9 @@ so:  @-f :: HiddenClock dom  => Signal dom (Unsigned 3) -> Signal dom (Unsigned 9)+f :: (HiddenClock dom, HiddenEnable dom)+   => Signal dom (Unsigned 3)+   -> Signal dom (Unsigned 9) f rd = 'Clash.Class.BitPack.unpack' '<$>' 'romFile' d7 \"memory.bin\" rd @ @@ -50,7 +52,9 @@ number, and a 3-bit signed number:  @-g :: HiddenClock dom  => Signal dom (Unsigned 3) -> Signal dom (Unsigned 6,Signed 3)+g :: (HiddenClock dom, HiddenEnable dom)+  => Signal dom (Unsigned 3)+  -> Signal dom (Unsigned 6,Signed 3) g rd = 'Clash.Class.BitPack.unpack' '<$>' 'romFile' d7 \"memory.bin\" rd @ @@ -269,12 +273,13 @@      , KnownNat n      , HiddenClock dom      , HiddenEnable dom+     , Enum addr      )   => SNat n   -- ^ Size of the ROM   -> FilePath   -- ^ File describing the content of the ROM-  -> Signal dom (Unsigned n)+  -> Signal dom addr   -- ^ Read address @rd@   -> Signal dom (BitVector m)   -- ^ The value of the ROM at address @rd@ from the previous clock cycle
src/Clash/Signal/Delayed.hs view
@@ -127,7 +127,8 @@ -- -- @ -- delayN2---   :: HiddenClockResetEnable dom+--   :: ( HiddenClock dom+--      , HiddenEnable dom ) --   => Int --   -> 'DSignal' dom n Int --   -> 'DSignal' dom (n + 2) Int@@ -153,7 +154,8 @@ -- -- @ -- delayI2---   :: HiddenClockResetEnable dom+--   :: ( HiddenClock dom+--      , HiddenEnable dom ) --   => Int --   -> 'DSignal' dom n Int --   -> 'DSignal' dom (n + 2) Int@@ -169,14 +171,15 @@ -- [-1,-1,1,2,3,4] delayI   :: forall d n a dom-   . ( HiddenClockResetEnable dom+   . ( HiddenClock dom+     , HiddenEnable dom      , NFDataX a      , KnownNat d )   => a   -- ^ Initial value   -> DSignal dom n a   -> DSignal dom (n+d) a-delayI dflt = delayN (SNat :: SNat d) dflt+delayI dflt = hideClock (hideEnable (E.delayI dflt))  -- | Tree fold over a 'Vec' of 'DSignal's with a combinatorial function, -- and delaying @delay@ cycles after each application.
src/Clash/Sized/RTree.hs view
@@ -55,7 +55,7 @@ import Data.Either                 (isLeft) import Data.Foldable               (toList) import Data.Kind                   (Type)-import Data.Singletons.Prelude     (Apply, TyFun, type (@@))+import Data.Singletons             (Apply, TyFun, type (@@)) import Data.Proxy                  (Proxy (..)) import GHC.TypeLits                (KnownNat, Nat, type (+), type (^), type (*)) import Language.Haskell.TH.Syntax  (Lift(..))@@ -85,7 +85,7 @@ >>> :set -XUndecidableInstances >>> import Clash.Prelude >>> import Data.Kind->>> import Data.Singletons.Prelude (Apply, TyFun)+>>> import Data.Singletons (Apply, TyFun) >>> import Data.Proxy >>> data IIndex (f :: TyFun Nat Type) :: Type >>> type instance Apply IIndex l = Index ((2^l)+1)@@ -333,7 +333,7 @@  @ {\-\# LANGUAGE UndecidableInstances \#-\}-import Data.Singletons.Prelude+import Data.Singletons import Data.Proxy  data IIndex (f :: 'TyFun' Nat *) :: *
src/Clash/Sized/Vector.hs view
@@ -109,7 +109,7 @@ import qualified Data.Foldable    as F import Data.Kind                  (Type) import Data.Proxy                 (Proxy (..))-import Data.Singletons.Prelude    (TyFun,Apply,type (@@))+import Data.Singletons            (TyFun,Apply,type (@@)) import GHC.TypeLits               (CmpNat, KnownNat, Nat, type (+), type (-), type (*),                                    type (^), type (<=), natVal) import GHC.Base                   (Int(I#),Int#,isTrue#)@@ -2128,7 +2128,7 @@ -- now correctly define /append'/: -- -- @--- import Data.Singletons.Prelude+-- import Data.Singletons -- import Data.Proxy -- -- data Append (m :: Nat) (a :: *) (f :: 'TyFun' Nat *) :: *@@ -2258,7 +2258,7 @@  @ {\-\# LANGUAGE UndecidableInstances \#-\}-import Data.Singletons.Prelude+import Data.Singletons import Data.Proxy  data IIndex (f :: 'TyFun' Nat *) :: *
src/Clash/Tutorial.hs view
@@ -223,13 +223,22 @@  {- $working This tutorial can be followed best whilst having the Clash interpreter running-at the same time. If you followed the installation instructions, you already-know how to start the Clash compiler in interpretive mode:+at the same time. If you followed the installation instructions based on+<https://docs.haskellstack.org/en/stable/README/#how-to-install Stack>, you can+start the Clash compiler in interpretive mode by:  @-clash.clashi  # When installed from source, use @clashi@+stack exec --package clash-ghc -- clashi @ +If you followed the installation instruction based on+<https://snapcraft.io/clash snap> (Linux only), you can start the Clash compiler+in interpretive mode by:++@+clash.clashi+@+ For those familiar with Haskell/GHC, this is indeed just @GHCi@, with three added commands (@:vhdl@, @:verilog@, and @:systemverilog@). You can load files into the interpreter using the @:l \<FILENAME\>@ command. Now, depending on your@@ -442,7 +451,7 @@ The complete sequential MAC circuit can now be specified as:  @-mac = 'mealy' macT 0+mac inp = 'mealy' macT 0 inp @  Where the first argument of @'mealy'@ is our @macT@ function, and the second@@ -492,7 +501,7 @@     acc' = ma acc (x,y)     o    = acc -mac = 'mealy' macT 0+mac inp = 'mealy' macT 0 inp  topEntity   :: 'Clock' 'System'