diff --git a/CHANGELOG.md b/CHANGELOG.md
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,5 +1,8 @@
 # Changelog for [`clash-prelude` package](http://hackage.haskell.org/package/clash-prelude)
 
+## 0.10.7 *April 7th 2016*
+* Support doctest-0.11.0
+
 ## 0.10.6 *February 10th 2016*
 * Fixes bugs:
   * `CLaSH.Prelude.DataFlow.parNDF` is not lazy enough
diff --git a/clash-prelude.cabal b/clash-prelude.cabal
--- a/clash-prelude.cabal
+++ b/clash-prelude.cabal
@@ -1,5 +1,5 @@
 Name:                 clash-prelude
-Version:              0.10.6
+Version:              0.10.7
 Synopsis:             CAES Language for Synchronous Hardware - Prelude library
 Description:
   CλaSH (pronounced ‘clash’) is a functional hardware description language that
@@ -189,4 +189,4 @@
   else
     build-depends:
       base    >= 4     && < 5,
-      doctest >= 0.9.1 && < 0.11
+      doctest >= 0.9.1 && < 0.12
diff --git a/src/CLaSH/Annotations/TopEntity.hs b/src/CLaSH/Annotations/TopEntity.hs
--- a/src/CLaSH/Annotations/TopEntity.hs
+++ b/src/CLaSH/Annotations/TopEntity.hs
@@ -205,8 +205,8 @@
   -- * __Verilog__: @[n-1:0]@
   -- * __SystemVerilog__: @logic [n-1:0]@
   , t_extraOut :: [(String,Int)]
-  -- ^ Extra output ports, where every tuple holds the name of the input port
-  -- and the number of bits are used for that input port.
+  -- ^ Extra output ports, where every tuple holds the name of the output port
+  -- and the number of bits are used for that output port.
   --
   -- So given a bit-width @n@, the port has type:
   --
diff --git a/src/CLaSH/Tutorial.hs b/src/CLaSH/Tutorial.hs
--- a/src/CLaSH/Tutorial.hs
+++ b/src/CLaSH/Tutorial.hs
@@ -1226,7 +1226,7 @@
 
 @
 { \"BlackBox\" :
-    { "name"      : "CLaSH.Prelude.BlockRam.blockRam'"
+    { "name"      : "CLaSH.Prelude.BlockRam.blockRam#"
     , "templateD" :
 "// blockRam
 ~SIGD[RAM_~SYM[0]][2];