diff --git a/CHANGELOG.md b/CHANGELOG.md
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,5 +1,12 @@
 # Changelog for the [`clash-lib`](http://hackage.haskell.org/package/clash-lib) package
 
+## 0.3.2 *June 5th 2014*
+
+* Fixes bugs:
+  * VHDL array constant ambiguous [#18](https://github.com/christiaanb/clash2/issues/18)
+  * Exception: can't create selector [#24](https://github.com/christiaanb/clash2/issues/24)
+  * Calls to `vhdlTypeMark` don't result to inclusion of VHDL type in types.vhdl [#28](https://github.com/christiaanb/clash2/issues/28)
+
 ## 0.3.1 *May 15th 2014*
 
 * New features:
diff --git a/README.md b/README.md
--- a/README.md
+++ b/README.md
@@ -1,5 +1,5 @@
 # Support
-For updates and questions join the mailing list clash-language@googlegroups.com or read the [forum](https://groups.google.com/d/forum/clash-language)
+For updates and questions join the mailing list clash-language+subscribe@googlegroups.com or read the [forum](https://groups.google.com/d/forum/clash-language)
 
 # `clash-lib`
   * See the LICENSE file for license and copyright details
diff --git a/clash-lib.cabal b/clash-lib.cabal
--- a/clash-lib.cabal
+++ b/clash-lib.cabal
@@ -1,5 +1,5 @@
 Name:                 clash-lib
-Version:              0.3.1
+Version:              0.3.2
 Synopsis:             CAES Language for Synchronous Hardware - As a Library
 Description:
   CλaSH (pronounced ‘clash’) is a functional hardware description language that
diff --git a/src/CLaSH/Netlist/VHDL.hs b/src/CLaSH/Netlist/VHDL.hs
--- a/src/CLaSH/Netlist/VHDL.hs
+++ b/src/CLaSH/Netlist/VHDL.hs
@@ -281,19 +281,23 @@
 
 -- | Convert a Netlist HWType to the root of a VHDL type
 vhdlTypeMark :: HWType -> VHDLM Doc
-vhdlTypeMark Bit             = "std_logic"
-vhdlTypeMark Bool            = "boolean"
-vhdlTypeMark (Clock _)       = "std_logic"
-vhdlTypeMark (Reset _)       = "std_logic"
-vhdlTypeMark Integer         = "integer"
-vhdlTypeMark (Signed _)      = "signed"
-vhdlTypeMark (Unsigned _)    = "unsigned"
-vhdlTypeMark (Vector _ Bit)  = "std_logic_vector"
-vhdlTypeMark (Vector _ elTy) = "array_of_" <> tyName elTy
-vhdlTypeMark (SP _ _)        = "std_logic_vector"
-vhdlTypeMark (Sum _ _)       = "unsigned"
-vhdlTypeMark t@(Product _ _) = tyName t
-vhdlTypeMark t               = error $ $(curLoc) ++ "vhdlTypeMark: " ++ show t
+vhdlTypeMark hwty = do
+  when (needsTyDec hwty) (_1 %= HashSet.insert (mkVecZ hwty))
+  vhdlTypeMark' hwty
+  where
+    vhdlTypeMark' Bit             = "std_logic"
+    vhdlTypeMark' Bool            = "boolean"
+    vhdlTypeMark' (Clock _)       = "std_logic"
+    vhdlTypeMark' (Reset _)       = "std_logic"
+    vhdlTypeMark' Integer         = "integer"
+    vhdlTypeMark' (Signed _)      = "signed"
+    vhdlTypeMark' (Unsigned _)    = "unsigned"
+    vhdlTypeMark' (Vector _ Bit)  = "std_logic_vector"
+    vhdlTypeMark' (Vector _ elTy) = "array_of_" <> tyName elTy
+    vhdlTypeMark' (SP _ _)        = "std_logic_vector"
+    vhdlTypeMark' (Sum _ _)       = "unsigned"
+    vhdlTypeMark' t@(Product _ _) = tyName t
+    vhdlTypeMark' t               = error $ $(curLoc) ++ "vhdlTypeMark: " ++ show t
 
 tyName :: HWType -> VHDLM Doc
 tyName Integer           = "integer"
@@ -392,9 +396,10 @@
     end   = typeSize ty - conSize ty
 
 expr _ (Identifier id_ (Just _)) = text id_
-expr _ (DataCon (Vector 1 _) _ [e])              = parens (int 0 <+> rarrow <+> expr False e)
-expr _ (vectorChain -> Just es)                  = tupled (mapM (expr False) es)
-expr _ (DataCon (Vector _ _) _ [e1,e2])          = expr False e1 <+> "&" <+> expr False e2
+expr _ (DataCon ty@(Vector 1 _) _ [e])           = vhdlTypeMark ty <> "'" <> parens (int 0 <+> rarrow <+> expr False e)
+expr _ e@(DataCon ty@(Vector _ _) _ [e1,e2])     = vhdlTypeMark ty <> "'" <> case vectorChain e of
+                                                     Just es -> tupled (mapM (expr False) es)
+                                                     Nothing -> parens (expr False e1 <+> "&" <+> expr False e2)
 expr _ (DataCon ty@(SP _ args) (Just (DC (_,i))) es) = assignExpr
   where
     argTys     = snd $ args !! i
@@ -404,7 +409,7 @@
     extraArg   = case typeSize ty - dcSize of
                    0 -> []
                    n -> [exprLit (Just n) (NumLit 0)]
-    assignExpr = hcat $ punctuate " & " $ sequence (dcExpr:argExprs ++ extraArg)
+    assignExpr = "std_logic_vector'" <> parens (hcat $ punctuate " & " $ sequence (dcExpr:argExprs ++ extraArg))
 
 expr _ (DataCon ty@(Sum _ _) (Just (DC (_,i))) []) = "to_unsigned" <> tupled (sequence [int i,int (typeSize ty)])
 expr _ (DataCon ty@(Product _ _) _ es)             = tupled $ zipWithM (\i e -> tName <> "_sel" <> int i <+> rarrow <+> expr False e) [0..] es
diff --git a/src/CLaSH/Normalize/Transformations.hs b/src/CLaSH/Normalize/Transformations.hs
--- a/src/CLaSH/Normalize/Transformations.hs
+++ b/src/CLaSH/Normalize/Transformations.hs
@@ -42,7 +42,8 @@
                                               unrec, name2String)
 import           Unbound.LocallyNameless.Ops (unsafeUnbind)
 
-import           CLaSH.Core.DataCon          (DataCon, dcTag, dcUnivTyVars)
+import           CLaSH.Core.DataCon          (DataCon, dcName, dcTag,
+                                              dcUnivTyVars)
 import           CLaSH.Core.FreeVars         (termFreeIds, termFreeTyVars,
                                               termFreeVars, typeFreeVars)
 import           CLaSH.Core.Pretty           (showDoc)
@@ -460,6 +461,8 @@
   e' <- makeANF (LamBody bndr:ctx) e
   return $ Lam (bind bndr e')
 
+makeANF _ (TyLam b) = return (TyLam b)
+
 makeANF ctx e
   = R $ do
     (e',bndrs) <- runR $ runWriterT $ bottomupR collectANF ctx e
@@ -498,8 +501,27 @@
       tell [(argId,embed body)]
       return argVar
 
+-- TODO: The code below special-cases ANF for the ':-' constructor for the
+-- 'Signal' type. The 'Signal' type is essentially treated as a "transparent"
+-- type by the CLaSH compiler, so observing its constructor leads to all kinds
+-- of problems. In this case that "CLaSH.Rewrite.Util.mkSelectorCase" will
+-- try to project the LHS and RHS of the ':-' constructor, however,
+-- 'mkSelectorCase' uses 'coreView' to find the "real" data-constructor.
+-- 'coreView' however looks through the 'Signal' type, and hence 'mkSelector'
+-- finds the data constructors for the element type of Signal. This resulted in
+-- error #24 (https://github.com/christiaanb/clash2/issues/24), where we
+-- try to get the first field out of the 'Vec's 'Nil' constructor.
+--
+-- Ultimately we should stop treating Signal as a "transparent" type and deal
+-- handling of the Signal type, and the involved co-recursive functions,
+-- properly. At the moment, CLaSH cannot deal with this recursive type and the
+-- recursive functions involved, hence the need for special-casing code. After
+-- everything is done properly, we should remove the two lines below.
+collectANF _ e@(Case _ _ [unsafeUnbind -> (DataPat dc _,_)])
+  | name2String (dcName $ unembed dc) == "CLaSH.Signal.Types.:-" = return e
+
 collectANF ctx (Case subj ty alts) = do
-    localVar           <- liftNormR $ isLocalVar subj
+    localVar     <- liftNormR $ isLocalVar subj
     (bndr,subj') <- if localVar || isConstant subj
       then return ([],subj)
       else do tcm <- Lens.use tcCache