clash-ghc 0.6.21 → 0.6.22
raw patch · 2 files changed
+13/−6 lines, 2 filesdep ~clash-libdep ~clash-preludedep ~clash-systemverilog
Dependency ranges changed: clash-lib, clash-prelude, clash-systemverilog, clash-verilog, clash-vhdl
Files
- CHANGELOG.md +7/−0
- clash-ghc.cabal +6/−6
CHANGELOG.md view
@@ -1,5 +1,12 @@ # Changelog for the [`clash-ghc`](http://hackage.haskell.org/package/clash-ghc) package +## 0.6.22 *August 3rd 2016*+* Fixes bugs:+ * Bug in DEC transformation overwrites case-alternatives+ * Bug in DEC transformation creates non-representable let-binders+ * VHDL: Incorrect primitive for `Integer`s `ltInteger#` and `geInteger#`+ * (System)Verilog: Fix primitive for CLaSH.Sized.Internal.Signed.mod# and GHC.Type.Integer.modInteger [#164](https://github.com/clash-lang/clash-compiler/issues/164)+ ## 0.6.21 *July 19th 2016* * Fixes bugs: * Rounding error in `logBase` calculation
clash-ghc.cabal view
@@ -1,5 +1,5 @@ Name: clash-ghc-Version: 0.6.21+Version: 0.6.22 Synopsis: CAES Language for Synchronous Hardware Description: CλaSH (pronounced ‘clash’) is a functional hardware description language that@@ -94,11 +94,11 @@ unbound-generics >= 0.1 && < 0.4, unordered-containers >= 0.2.1.0 && < 0.3, - clash-lib >= 0.6.19 && < 0.7,- clash-systemverilog >= 0.6.7 && < 0.7,- clash-vhdl >= 0.6.15 && < 0.7,- clash-verilog >= 0.6.7 && < 0.7,- clash-prelude >= 0.10.10 && < 0.11,+ clash-lib >= 0.6.20 && < 0.7,+ clash-systemverilog >= 0.6.8 && < 0.7,+ clash-vhdl >= 0.6.16 && < 0.7,+ clash-verilog >= 0.6.8 && < 0.7,+ clash-prelude >= 0.10.11 && < 0.11, ghc-typelits-extra >= 0.1.3 && < 0.2, ghc-typelits-natnormalise >= 0.4.3 && < 0.5, deepseq >= 1.3.0.2 && < 1.5,