diff --git a/Examples/Sklansky.hs b/Examples/Sklansky.hs
--- a/Examples/Sklansky.hs
+++ b/Examples/Sklansky.hs
@@ -1,4 +1,4 @@
-import Lava.Patterns
+import "Wired" Lava.Patterns
 import Wired
 import Libs.Nangate45.Wired
 import Analysis.Timing
diff --git a/Examples/UsingLava.hs b/Examples/UsingLava.hs
--- a/Examples/UsingLava.hs
+++ b/Examples/UsingLava.hs
@@ -1,9 +1,9 @@
-import Lava
-import Lava.Patterns
+import "Wired" Lava
+import "Wired" Lava.Patterns
 import Libs.Nangate45.Lava
 import Analysis.Timing
 
-import qualified Lava2000 as L
+import qualified "chalmers-lava2000" Lava as L
 
 import Control.Monad.Trans
 import Data.Logical.Let
@@ -50,10 +50,10 @@
 
 
 test1 = L.simulateSeq (toLava2000 circ2) L.domain
-  -- Simulation using Lava2000.
+  -- Simulation using Lava 2000.
 
 test2 = simulateSeq circ2 [(0,0),(1,1)]
-  -- Simulation in Lava (uses Lava2000 internally).
+  -- Simulation in Lava (uses Lava 2000 internally).
 
 test3 = verify circ2
   -- Check that output is always high.
diff --git a/Examples/UsingWired.hs b/Examples/UsingWired.hs
--- a/Examples/UsingWired.hs
+++ b/Examples/UsingWired.hs
@@ -1,4 +1,4 @@
-import Lava.Patterns
+import "Wired" Lava.Patterns
 import Wired
 import Libs.Nangate45.Wired
 import qualified Libs.Nangate45.Lava as L
diff --git a/Export/DEF.hs b/Export/DEF.hs
--- a/Export/DEF.hs
+++ b/Export/DEF.hs
@@ -113,7 +113,7 @@
     renderNet (nm,ps,gs,ts) = unwordS
          $ ["- " .+ showString nm]
         ++ map renderPin ps
-        ++ map renderGuide gs
+        -- XXX Temporarily ignoring guides ++ map renderGuide gs
         ++ [";"]
         ++ tags
       where
diff --git a/Lava/Misc.hs b/Lava/Misc.hs
--- a/Lava/Misc.hs
+++ b/Lava/Misc.hs
@@ -13,8 +13,8 @@
 import Lava.Port
 import Lava.Interpret
 
-import qualified Lava2000 as L
-import qualified Lava2000.Ref as L
+import qualified "chalmers-lava2000" Lava as L
+import qualified "chalmers-lava2000" Lava.Ref as L
 
 
 
diff --git a/Lava/Model.hs b/Lava/Model.hs
--- a/Lava/Model.hs
+++ b/Lava/Model.hs
@@ -14,7 +14,7 @@
 
 import Data.Hardware.Internal
 
-import qualified Lava2000 as L
+import qualified "chalmers-lava2000" Lava as L
 
 
 
diff --git a/Lava/Port.hs b/Lava/Port.hs
--- a/Lava/Port.hs
+++ b/Lava/Port.hs
@@ -13,7 +13,7 @@
 import Data.Hardware.Internal
 import Lava.Model
 
-import qualified Lava2000 as L
+import qualified "chalmers-lava2000" Lava as L
 
 
 
@@ -211,5 +211,5 @@
     construct (L.Object sym)  = One (L.Signal sym)
     construct (L.Compound ss) = List (map L.construct ss)
 
-  -- This Lava2000 class corresponds roughly to the Port class.
+  -- This Lava 2000 class corresponds roughly to the Port class.
 
diff --git a/Libs/Nangate45/Lava.hs b/Libs/Nangate45/Lava.hs
--- a/Libs/Nangate45/Lava.hs
+++ b/Libs/Nangate45/Lava.hs
@@ -63,8 +63,8 @@
 import Analysis.Timing.Library
 import Libs.Nangate45.Timing
 
-import qualified Lava2000 as L
-import qualified Lava2000.Arithmetic as L
+import qualified "chalmers-lava2000" Lava as L
+import qualified "chalmers-lava2000" Lava.Arithmetic as L
 
 data Nangate45 = AND2_X1 | AND2_X2 | AND2_X4 | BUF_X1 | BUF_X16 | BUF_X2 | BUF_X32 | BUF_X4 | BUF_X8 | FA_X1 | FILLCELL_X1 | FILLCELL_X16 | FILLCELL_X2 | FILLCELL_X32 | FILLCELL_X4 | FILLCELL_X8 | HA_X1 | INV_X1 | INV_X16 | INV_X2 | INV_X32 | INV_X4 | INV_X8 | LOGIC0_X1 | LOGIC1_X1 | NAND2_X1 | NAND2_X2 | NAND2_X4 | NOR2_X1 | NOR2_X2 | NOR2_X4 | OR2_X1 | OR2_X2 | OR2_X4 | XNOR2_X1 | XNOR2_X2 | XOR2_X1 | XOR2_X2
      deriving (Eq, Show)
@@ -358,11 +358,11 @@
     isFlop XOR2_X1 = False
     isFlop XOR2_X2 = False
 
-    lava2000Interp = Interp                      
+    lava2000Interp = Interp
         { defaultVal = error "Undefined signal"
-        , propagator = prop                      
-        }                                        
-      where                                      
+        , propagator = prop
+        }
+      where
         prop AND2_X1 = \[_, iA1, iA2] -> [Just (L.andl [iA1, iA2]), Nothing, Nothing]
         prop AND2_X2 = \[_, iA1, iA2] -> [Just (L.andl [iA1, iA2]), Nothing, Nothing]
         prop AND2_X4 = \[_, iA1, iA2] -> [Just (L.andl [iA1, iA2]), Nothing, Nothing]
diff --git a/Wired.cabal b/Wired.cabal
--- a/Wired.cabal
+++ b/Wired.cabal
@@ -1,12 +1,12 @@
 name:      Wired
-version:   0.2.1
+version:   0.2.2
 homepage:  http://www.cs.chalmers.se/~emax/wired/
 synopsis:  Wire-aware hardware description
 
 description:
   Wired is an extension to the hardware description library Lava targeting (not
   exclusively) semi-custom VLSI design. A particular aim of Wired is to give the
-  designer more control over the routing wires' effects on performance.
+  designer more control over on-chip wires' effects on performance.
   .
   The goal is a system with the following features:
   .
@@ -59,7 +59,7 @@
 copyright:      (c) 2008. Emil Axelsson <emax@chalmers.se>
 author:         Emil Axelsson <emax@chalmers.se>
 maintainer:     Emil Axelsson <emax@chalmers.se>
-cabal-version:  >= 1.2.3
+cabal-version:  >= 1.4
 build-type:     Simple
 
 data-files:
@@ -102,7 +102,7 @@
   c-sources:
     Libs/Nangate45/timing.c
 
-  build-Depends: base, chalmers-lava2000, containers, mtl, QuickCheck
+  build-Depends: base >= 3 && < 4, chalmers-lava2000 >= 1.1 && < 2, containers >= 0.2 && < 1, mtl >= 1.1 && < 2, QuickCheck >= 1 && < 2
 
   extensions:
     FlexibleContexts
@@ -113,6 +113,7 @@
     MultiParamTypeClasses
     OverlappingInstances
     OverloadedStrings
+    PackageImports
     PatternGuards
     Rank2Types
     RecursiveDo